clk/imx/clk-scu.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright 2018-2021 NXP
0004  *   Dong Aisheng <aisheng.dong@nxp.com>
0005  */
0006
0007 #ifndef __IMX_CLK_SCU_H
0008 #define __IMX_CLK_SCU_H
0009
0010 #include <linux/firmware/imx/sci.h>
0011 #include <linux/of.h>
0012
0013 #define IMX_SCU_GPR_CLK_GATE    BIT(0)
0014 #define IMX_SCU_GPR_CLK_DIV BIT(1)
0015 #define IMX_SCU_GPR_CLK_MUX BIT(2)
0016
0017 struct imx_clk_scu_rsrc_table {
0018     const u32 *rsrc;
0019     u8 num;
0020 };
0021
0022 extern struct list_head imx_scu_clks[];
0023 extern const struct dev_pm_ops imx_clk_lpcg_scu_pm_ops;
0024 extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8dxl;
0025 extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp;
0026 extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qm;
0027
0028 int imx_clk_scu_init(struct device_node *np,
0029              const struct imx_clk_scu_rsrc_table *data);
0030 struct clk_hw *imx_scu_of_clk_src_get(struct of_phandle_args *clkspec,
0031                       void *data);
0032 struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
0033                      const char * const *parents,
0034                      int num_parents, u32 rsrc_id, u8 clk_type);
0035
0036 struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
0037                  const char * const *parents, int num_parents,
0038                  u32 rsrc_id, u8 clk_type);
0039
0040 void imx_clk_scu_unregister(void);
0041
0042 struct clk_hw *__imx_clk_lpcg_scu(struct device *dev, const char *name,
0043                   const char *parent_name, unsigned long flags,
0044                   void __iomem *reg, u8 bit_idx, bool hw_gate);
0045 void imx_clk_lpcg_scu_unregister(struct clk_hw *hw);
0046
0047 struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_name,
0048                  int num_parents, u32 rsrc_id, u8 gpr_id, u8 flags,
0049                  bool invert);
0050
0051 static inline struct clk_hw *imx_clk_scu(const char *name, u32 rsrc_id,
0052                      u8 clk_type)
0053 {
0054     return imx_clk_scu_alloc_dev(name, NULL, 0, rsrc_id, clk_type);
0055 }
0056
0057 static inline struct clk_hw *imx_clk_scu2(const char *name, const char * const *parents,
0058                       int num_parents, u32 rsrc_id, u8 clk_type)
0059 {
0060     return imx_clk_scu_alloc_dev(name, parents, num_parents, rsrc_id, clk_type);
0061 }
0062
0063 static inline struct clk_hw *imx_clk_lpcg_scu_dev(struct device *dev, const char *name,
0064                           const char *parent_name, unsigned long flags,
0065                           void __iomem *reg, u8 bit_idx, bool hw_gate)
0066 {
0067     return __imx_clk_lpcg_scu(dev, name, parent_name, flags, reg,
0068                   bit_idx, hw_gate);
0069 }
0070
0071 static inline struct clk_hw *imx_clk_lpcg_scu(const char *name, const char *parent_name,
0072                           unsigned long flags, void __iomem *reg,
0073                           u8 bit_idx, bool hw_gate)
0074 {
0075     return __imx_clk_lpcg_scu(NULL, name, parent_name, flags, reg,
0076                   bit_idx, hw_gate);
0077 }
0078
0079 static inline struct clk_hw *imx_clk_gate_gpr_scu(const char *name, const char *parent_name,
0080                           u32 rsrc_id, u8 gpr_id, bool invert)
0081 {
0082     return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id,
0083                  IMX_SCU_GPR_CLK_GATE, invert);
0084 }
0085
0086 static inline struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name,
0087                              u32 rsrc_id, u8 gpr_id)
0088 {
0089     return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id,
0090                  IMX_SCU_GPR_CLK_DIV, 0);
0091 }
0092
0093 static inline struct clk_hw *imx_clk_mux_gpr_scu(const char *name, const char * const *parent_names,
0094                          int num_parents, u32 rsrc_id, u8 gpr_id)
0095 {
0096     return __imx_clk_gpr_scu(name, parent_names, num_parents, rsrc_id,
0097                  gpr_id, IMX_SCU_GPR_CLK_MUX, 0);
0098 }
0099 #endif