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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2012 Freescale Semiconductor, Inc.
0004  * Copyright 2012 Linaro Ltd.
0005  */
0006 
0007 #include <linux/clk-provider.h>
0008 #include <linux/io.h>
0009 #include <linux/slab.h>
0010 #include <linux/err.h>
0011 #include "clk.h"
0012 
0013 /**
0014  * struct clk_pfd - IMX PFD clock
0015  * @hw:     clock source
0016  * @reg:    PFD register address
0017  * @idx:    the index of PFD encoded in the register
0018  *
0019  * PFD clock found on i.MX6 series.  Each register for PFD has 4 clk_pfd
0020  * data encoded, and member idx is used to specify the one.  And each
0021  * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.
0022  */
0023 struct clk_pfd {
0024     struct clk_hw   hw;
0025     void __iomem    *reg;
0026     u8      idx;
0027 };
0028 
0029 #define to_clk_pfd(_hw) container_of(_hw, struct clk_pfd, hw)
0030 
0031 #define SET 0x4
0032 #define CLR 0x8
0033 #define OTG 0xc
0034 
0035 static int clk_pfd_enable(struct clk_hw *hw)
0036 {
0037     struct clk_pfd *pfd = to_clk_pfd(hw);
0038 
0039     writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR);
0040 
0041     return 0;
0042 }
0043 
0044 static void clk_pfd_disable(struct clk_hw *hw)
0045 {
0046     struct clk_pfd *pfd = to_clk_pfd(hw);
0047 
0048     writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET);
0049 }
0050 
0051 static unsigned long clk_pfd_recalc_rate(struct clk_hw *hw,
0052                      unsigned long parent_rate)
0053 {
0054     struct clk_pfd *pfd = to_clk_pfd(hw);
0055     u64 tmp = parent_rate;
0056     u8 frac = (readl_relaxed(pfd->reg) >> (pfd->idx * 8)) & 0x3f;
0057 
0058     tmp *= 18;
0059     do_div(tmp, frac);
0060 
0061     return tmp;
0062 }
0063 
0064 static long clk_pfd_round_rate(struct clk_hw *hw, unsigned long rate,
0065                    unsigned long *prate)
0066 {
0067     u64 tmp = *prate;
0068     u8 frac;
0069 
0070     tmp = tmp * 18 + rate / 2;
0071     do_div(tmp, rate);
0072     frac = tmp;
0073     if (frac < 12)
0074         frac = 12;
0075     else if (frac > 35)
0076         frac = 35;
0077     tmp = *prate;
0078     tmp *= 18;
0079     do_div(tmp, frac);
0080 
0081     return tmp;
0082 }
0083 
0084 static int clk_pfd_set_rate(struct clk_hw *hw, unsigned long rate,
0085         unsigned long parent_rate)
0086 {
0087     struct clk_pfd *pfd = to_clk_pfd(hw);
0088     u64 tmp = parent_rate;
0089     u8 frac;
0090 
0091     tmp = tmp * 18 + rate / 2;
0092     do_div(tmp, rate);
0093     frac = tmp;
0094     if (frac < 12)
0095         frac = 12;
0096     else if (frac > 35)
0097         frac = 35;
0098 
0099     writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR);
0100     writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET);
0101 
0102     return 0;
0103 }
0104 
0105 static int clk_pfd_is_enabled(struct clk_hw *hw)
0106 {
0107     struct clk_pfd *pfd = to_clk_pfd(hw);
0108 
0109     if (readl_relaxed(pfd->reg) & (1 << ((pfd->idx + 1) * 8 - 1)))
0110         return 0;
0111 
0112     return 1;
0113 }
0114 
0115 static const struct clk_ops clk_pfd_ops = {
0116     .enable     = clk_pfd_enable,
0117     .disable    = clk_pfd_disable,
0118     .recalc_rate    = clk_pfd_recalc_rate,
0119     .round_rate = clk_pfd_round_rate,
0120     .set_rate   = clk_pfd_set_rate,
0121     .is_enabled     = clk_pfd_is_enabled,
0122 };
0123 
0124 struct clk_hw *imx_clk_hw_pfd(const char *name, const char *parent_name,
0125             void __iomem *reg, u8 idx)
0126 {
0127     struct clk_pfd *pfd;
0128     struct clk_hw *hw;
0129     struct clk_init_data init;
0130     int ret;
0131 
0132     pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
0133     if (!pfd)
0134         return ERR_PTR(-ENOMEM);
0135 
0136     pfd->reg = reg;
0137     pfd->idx = idx;
0138 
0139     init.name = name;
0140     init.ops = &clk_pfd_ops;
0141     init.flags = 0;
0142     init.parent_names = &parent_name;
0143     init.num_parents = 1;
0144 
0145     pfd->hw.init = &init;
0146     hw = &pfd->hw;
0147 
0148     ret = clk_hw_register(NULL, hw);
0149     if (ret) {
0150         kfree(pfd);
0151         return ERR_PTR(ret);
0152     }
0153 
0154     return hw;
0155 }