clk/hisilicon/clk-hip04.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Hisilicon HiP04 clock driver
0004  *
0005  * Copyright (c) 2013-2014 Hisilicon Limited.
0006  * Copyright (c) 2013-2014 Linaro Limited.
0007  *
0008  * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
0009  */
0010
0011 #include <linux/kernel.h>
0012 #include <linux/clk-provider.h>
0013 #include <linux/io.h>
0014 #include <linux/of.h>
0015 #include <linux/of_address.h>
0016 #include <linux/of_device.h>
0017 #include <linux/slab.h>
0018
0019 #include <dt-bindings/clock/hip04-clock.h>
0020
0021 #include "clk.h"
0022
0023 /* fixed rate clocks */
0024 static struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = {
0025     { HIP04_OSC50M,   "osc50m",   NULL, 0, 50000000, },
0026     { HIP04_CLK_50M,  "clk50m",   NULL, 0, 50000000, },
0027     { HIP04_CLK_168M, "clk168m",  NULL, 0, 168750000, },
0028 };
0029
0030 static void __init hip04_clk_init(struct device_node *np)
0031 {
0032     struct hisi_clock_data *clk_data;
0033
0034     clk_data = hisi_clk_init(np, HIP04_NR_CLKS);
0035     if (!clk_data)
0036         return;
0037
0038     hisi_clk_register_fixed_rate(hip04_fixed_rate_clks,
0039                      ARRAY_SIZE(hip04_fixed_rate_clks),
0040                      clk_data);
0041 }
0042 CLK_OF_DECLARE(hip04_clk, "hisilicon,hip04-clock", hip04_clk_init);