OSCL-LXR

0001 # SPDX-License-Identifier: GPL-2.0
0002 #
0003 # Hisilicon Clock specific Makefile
0004 #
0005
0006 obj-y   += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
0007
0008 obj-$(CONFIG_ARCH_HI3xxx)       += clk-hi3620.o
0009 obj-$(CONFIG_ARCH_HIP04)        += clk-hip04.o
0010 obj-$(CONFIG_ARCH_HIX5HD2)      += clk-hix5hd2.o
0011 obj-$(CONFIG_COMMON_CLK_HI3516CV300)    += crg-hi3516cv300.o
0012 obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o
0013 obj-$(CONFIG_COMMON_CLK_HI3559A)        += clk-hi3559a.o
0014 obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
0015 obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
0016 obj-$(CONFIG_COMMON_CLK_HI3798CV200)    += crg-hi3798cv200.o
0017 obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
0018 obj-$(CONFIG_RESET_HISI)        += reset.o
0019 obj-$(CONFIG_STUB_CLK_HI6220)   += clk-hi6220-stub.o
0020 obj-$(CONFIG_STUB_CLK_HI3660)   += clk-hi3660-stub.o