0001
0002
0003
0004
0005
0006
0007
0008 #include <linux/clk-provider.h>
0009 #include <linux/clk/davinci.h>
0010 #include <linux/clk.h>
0011 #include <linux/clkdev.h>
0012 #include <linux/init.h>
0013 #include <linux/kernel.h>
0014 #include <linux/types.h>
0015
0016 #include "psc.h"
0017
0018 LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710");
0019 LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
0020 "fck", "davinci_mdio.0");
0021 LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL,
0022 NULL, "ti-aemif");
0023 LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0");
0024 LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1");
0025 LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
0026 LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
0027 LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2");
0028 LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
0029
0030 LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
0031 LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
0032
0033 static const struct davinci_lpsc_clk_info dm646x_psc_info[] = {
0034 LPSC(0, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0035
0036 LPSC(1, 0, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
0037 LPSC(4, 0, edma_cc, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0038 LPSC(5, 0, edma_tc0, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0039 LPSC(6, 0, edma_tc1, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0040 LPSC(7, 0, edma_tc2, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0041 LPSC(8, 0, edma_tc3, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0042 LPSC(10, 0, ide, pll1_sysclk4, ide_clkdev, 0),
0043 LPSC(14, 0, emac, pll1_sysclk3, emac_clkdev, 0),
0044 LPSC(16, 0, vpif0, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
0045 LPSC(17, 0, vpif1, ref_clk, NULL, LPSC_ALWAYS_ENABLED),
0046 LPSC(21, 0, aemif, pll1_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),
0047 LPSC(22, 0, mcasp0, pll1_sysclk3, mcasp0_clkdev, 0),
0048 LPSC(23, 0, mcasp1, pll1_sysclk3, mcasp1_clkdev, 0),
0049 LPSC(26, 0, uart0, aux_clkin, uart0_clkdev, 0),
0050 LPSC(27, 0, uart1, aux_clkin, uart1_clkdev, 0),
0051 LPSC(28, 0, uart2, aux_clkin, uart2_clkdev, 0),
0052
0053 LPSC(29, 0, pwm0, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
0054
0055 LPSC(30, 0, pwm1, pll1_sysclk3, NULL, LPSC_ALWAYS_ENABLED),
0056 LPSC(31, 0, i2c, pll1_sysclk3, i2c_clkdev, 0),
0057 LPSC(33, 0, gpio, pll1_sysclk3, gpio_clkdev, 0),
0058 LPSC(34, 0, timer0, pll1_sysclk3, timer0_clkdev, LPSC_ALWAYS_ENABLED),
0059 LPSC(35, 0, timer1, pll1_sysclk3, NULL, 0),
0060 { }
0061 };
0062
0063 int dm646x_psc_init(struct device *dev, void __iomem *base)
0064 {
0065 return davinci_psc_register_clocks(dev, dm646x_psc_info, 46, base);
0066 }
0067
0068 static struct clk_bulk_data dm646x_psc_parent_clks[] = {
0069 { .id = "ref_clk" },
0070 { .id = "aux_clkin" },
0071 { .id = "pll1_sysclk1" },
0072 { .id = "pll1_sysclk2" },
0073 { .id = "pll1_sysclk3" },
0074 { .id = "pll1_sysclk4" },
0075 { .id = "pll1_sysclk5" },
0076 };
0077
0078 const struct davinci_psc_init_data dm646x_psc_init_data = {
0079 .parent_clks = dm646x_psc_parent_clks,
0080 .num_parent_clks = ARRAY_SIZE(dm646x_psc_parent_clks),
0081 .psc_init = &dm646x_psc_init,
0082 };