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0008 #include <linux/clk-provider.h>
0009 #include <linux/clk/davinci.h>
0010 #include <linux/clk.h>
0011 #include <linux/clkdev.h>
0012 #include <linux/init.h>
0013 #include <linux/kernel.h>
0014 #include <linux/types.h>
0015
0016 #include "psc.h"
0017
0018 LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss");
0019 LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss");
0020 LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
0021 "fck", "davinci_mdio.0");
0022 LPSC_CLKDEV1(usb_clkdev, "usb", NULL);
0023 LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710");
0024 LPSC_CLKDEV2(aemif_clkdev, "aemif", NULL,
0025 NULL, "ti-aemif");
0026 LPSC_CLKDEV1(mmcsd_clkdev, NULL, "dm6441-mmc.0");
0027 LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp");
0028 LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
0029 LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
0030 LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
0031 LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2");
0032
0033 LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
0034 LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
0035 LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt");
0036
0037 static const struct davinci_lpsc_clk_info dm644x_psc_info[] = {
0038 LPSC(0, 0, vpss_master, pll1_sysclk3, vpss_master_clkdev, 0),
0039 LPSC(1, 0, vpss_slave, pll1_sysclk3, vpss_slave_clkdev, 0),
0040 LPSC(6, 0, emac, pll1_sysclk5, emac_clkdev, 0),
0041 LPSC(9, 0, usb, pll1_sysclk5, usb_clkdev, 0),
0042 LPSC(10, 0, ide, pll1_sysclk5, ide_clkdev, 0),
0043 LPSC(11, 0, vlynq, pll1_sysclk5, NULL, 0),
0044 LPSC(14, 0, aemif, pll1_sysclk5, aemif_clkdev, 0),
0045 LPSC(15, 0, mmcsd, pll1_sysclk5, mmcsd_clkdev, 0),
0046 LPSC(17, 0, asp0, pll1_sysclk5, asp0_clkdev, 0),
0047 LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),
0048 LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0),
0049 LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0),
0050 LPSC(21, 0, uart2, pll1_auxclk, uart2_clkdev, 0),
0051 LPSC(22, 0, spi, pll1_sysclk5, NULL, 0),
0052 LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0),
0053 LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0),
0054 LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0),
0055 LPSC(26, 0, gpio, pll1_sysclk5, gpio_clkdev, 0),
0056 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
0057 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
0058
0059 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
0060 LPSC(31, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0061
0062 LPSC(39, 1, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
0063
0064 LPSC(40, 1, vicp, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
0065 { }
0066 };
0067
0068 int dm644x_psc_init(struct device *dev, void __iomem *base)
0069 {
0070 return davinci_psc_register_clocks(dev, dm644x_psc_info, 41, base);
0071 }
0072
0073 static struct clk_bulk_data dm644x_psc_parent_clks[] = {
0074 { .id = "pll1_sysclk1" },
0075 { .id = "pll1_sysclk2" },
0076 { .id = "pll1_sysclk3" },
0077 { .id = "pll1_sysclk5" },
0078 { .id = "pll1_auxclk" },
0079 };
0080
0081 const struct davinci_psc_init_data dm644x_psc_init_data = {
0082 .parent_clks = dm644x_psc_parent_clks,
0083 .num_parent_clks = ARRAY_SIZE(dm644x_psc_parent_clks),
0084 .psc_init = &dm644x_psc_init,
0085 };