clk/davinci/psc-dm355.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * PSC clock descriptions for TI DaVinci DM355
0004  *
0005  * Copyright (C) 2018 David Lechner <david@lechnology.com>
0006  */
0007
0008 #include <linux/clk-provider.h>
0009 #include <linux/clk/davinci.h>
0010 #include <linux/clk.h>
0011 #include <linux/clkdev.h>
0012 #include <linux/init.h>
0013 #include <linux/kernel.h>
0014 #include <linux/types.h>
0015
0016 #include "psc.h"
0017
0018 LPSC_CLKDEV1(vpss_master_clkdev,    "master",   "vpss");
0019 LPSC_CLKDEV1(vpss_slave_clkdev,     "slave",    "vpss");
0020 LPSC_CLKDEV1(spi1_clkdev,       NULL,       "spi_davinci.1");
0021 LPSC_CLKDEV1(mmcsd1_clkdev,     NULL,       "dm6441-mmc.1");
0022 LPSC_CLKDEV1(mcbsp1_clkdev,     NULL,       "davinci-mcbsp.1");
0023 LPSC_CLKDEV1(usb_clkdev,        "usb",      NULL);
0024 LPSC_CLKDEV1(spi2_clkdev,       NULL,       "spi_davinci.2");
0025 LPSC_CLKDEV1(aemif_clkdev,      "aemif",    NULL);
0026 LPSC_CLKDEV1(mmcsd0_clkdev,     NULL,       "dm6441-mmc.0");
0027 LPSC_CLKDEV1(mcbsp0_clkdev,     NULL,       "davinci-mcbsp.0");
0028 LPSC_CLKDEV1(i2c_clkdev,        NULL,       "i2c_davinci.1");
0029 LPSC_CLKDEV1(uart0_clkdev,      NULL,       "serial8250.0");
0030 LPSC_CLKDEV1(uart1_clkdev,      NULL,       "serial8250.1");
0031 LPSC_CLKDEV1(uart2_clkdev,      NULL,       "serial8250.2");
0032 LPSC_CLKDEV1(spi0_clkdev,       NULL,       "spi_davinci.0");
0033 /* REVISIT: gpio-davinci.c should be modified to drop con_id */
0034 LPSC_CLKDEV1(gpio_clkdev,       "gpio",     NULL);
0035 LPSC_CLKDEV1(timer0_clkdev,     "timer0",   NULL);
0036 LPSC_CLKDEV1(timer2_clkdev,     NULL,       "davinci-wdt");
0037 LPSC_CLKDEV1(vpss_dac_clkdev,       "vpss_dac", NULL);
0038
0039 static const struct davinci_lpsc_clk_info dm355_psc_info[] = {
0040     LPSC(0,  0, vpss_master, pll1_sysclk4, vpss_master_clkdev, 0),
0041     LPSC(1,  0, vpss_slave,  pll1_sysclk4, vpss_slave_clkdev,  0),
0042     LPSC(5,  0, timer3,      pll1_auxclk,  NULL,               0),
0043     LPSC(6,  0, spi1,        pll1_sysclk2, spi1_clkdev,        0),
0044     LPSC(7,  0, mmcsd1,      pll1_sysclk2, mmcsd1_clkdev,      0),
0045     LPSC(8,  0, asp1,        pll1_sysclk2, mcbsp1_clkdev,      0),
0046     LPSC(9,  0, usb,         pll1_sysclk2, usb_clkdev,         0),
0047     LPSC(10, 0, pwm3,        pll1_auxclk,  NULL,               0),
0048     LPSC(11, 0, spi2,        pll1_sysclk2, spi2_clkdev,        0),
0049     LPSC(12, 0, rto,         pll1_auxclk,  NULL,               0),
0050     LPSC(14, 0, aemif,       pll1_sysclk2, aemif_clkdev,       0),
0051     LPSC(15, 0, mmcsd0,      pll1_sysclk2, mmcsd0_clkdev,      0),
0052     LPSC(17, 0, asp0,        pll1_sysclk2, mcbsp0_clkdev,      0),
0053     LPSC(18, 0, i2c,         pll1_auxclk,  i2c_clkdev,         0),
0054     LPSC(19, 0, uart0,       pll1_auxclk,  uart0_clkdev,       0),
0055     LPSC(20, 0, uart1,       pll1_auxclk,  uart1_clkdev,       0),
0056     LPSC(21, 0, uart2,       pll1_sysclk2, uart2_clkdev,       0),
0057     LPSC(22, 0, spi0,        pll1_sysclk2, spi0_clkdev,        0),
0058     LPSC(23, 0, pwm0,        pll1_auxclk,  NULL,               0),
0059     LPSC(24, 0, pwm1,        pll1_auxclk,  NULL,               0),
0060     LPSC(25, 0, pwm2,        pll1_auxclk,  NULL,               0),
0061     LPSC(26, 0, gpio,        pll1_sysclk2, gpio_clkdev,        0),
0062     LPSC(27, 0, timer0,      pll1_auxclk,  timer0_clkdev,      LPSC_ALWAYS_ENABLED),
0063     LPSC(28, 0, timer1,      pll1_auxclk,  NULL,               0),
0064     /* REVISIT: why can't this be disabled? */
0065     LPSC(29, 0, timer2,      pll1_auxclk,  timer2_clkdev,      LPSC_ALWAYS_ENABLED),
0066     LPSC(31, 0, arm,         pll1_sysclk1, NULL,               LPSC_ALWAYS_ENABLED),
0067     LPSC(40, 0, mjcp,        pll1_sysclk1, NULL,               0),
0068     LPSC(41, 0, vpss_dac,    pll1_sysclk3, vpss_dac_clkdev,    0),
0069     { }
0070 };
0071
0072 int dm355_psc_init(struct device *dev, void __iomem *base)
0073 {
0074     return davinci_psc_register_clocks(dev, dm355_psc_info, 42, base);
0075 }
0076
0077 static struct clk_bulk_data dm355_psc_parent_clks[] = {
0078     { .id = "pll1_sysclk1" },
0079     { .id = "pll1_sysclk2" },
0080     { .id = "pll1_sysclk3" },
0081     { .id = "pll1_sysclk4" },
0082     { .id = "pll1_auxclk"  },
0083 };
0084
0085 const struct davinci_psc_init_data dm355_psc_init_data = {
0086     .parent_clks        = dm355_psc_parent_clks,
0087     .num_parent_clks    = ARRAY_SIZE(dm355_psc_parent_clks),
0088     .psc_init       = &dm355_psc_init,
0089 };