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0009 #include <linux/module.h>
0010 #include <linux/slab.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/mfd/twl6040.h>
0013 #include <linux/clk-provider.h>
0014
0015 struct twl6040_pdmclk {
0016 struct twl6040 *twl6040;
0017 struct device *dev;
0018 struct clk_hw pdmclk_hw;
0019 int enabled;
0020 };
0021
0022 static int twl6040_pdmclk_is_prepared(struct clk_hw *hw)
0023 {
0024 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
0025 pdmclk_hw);
0026
0027 return pdmclk->enabled;
0028 }
0029
0030 static int twl6040_pdmclk_reset_one_clock(struct twl6040_pdmclk *pdmclk,
0031 unsigned int reg)
0032 {
0033 const u8 reset_mask = TWL6040_HPLLRST;
0034 int ret;
0035
0036 ret = twl6040_set_bits(pdmclk->twl6040, reg, reset_mask);
0037 if (ret < 0)
0038 return ret;
0039
0040 ret = twl6040_clear_bits(pdmclk->twl6040, reg, reset_mask);
0041 if (ret < 0)
0042 return ret;
0043
0044 return 0;
0045 }
0046
0047
0048
0049
0050
0051
0052 static int twl6040_pdmclk_quirk_reset_clocks(struct twl6040_pdmclk *pdmclk)
0053 {
0054 int ret;
0055
0056 ret = twl6040_pdmclk_reset_one_clock(pdmclk, TWL6040_REG_HPPLLCTL);
0057 if (ret)
0058 return ret;
0059
0060 ret = twl6040_pdmclk_reset_one_clock(pdmclk, TWL6040_REG_LPPLLCTL);
0061 if (ret)
0062 return ret;
0063
0064 return 0;
0065 }
0066
0067 static int twl6040_pdmclk_prepare(struct clk_hw *hw)
0068 {
0069 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
0070 pdmclk_hw);
0071 int ret;
0072
0073 ret = twl6040_power(pdmclk->twl6040, 1);
0074 if (ret)
0075 return ret;
0076
0077 ret = twl6040_pdmclk_quirk_reset_clocks(pdmclk);
0078 if (ret)
0079 goto out_err;
0080
0081 pdmclk->enabled = 1;
0082
0083 return 0;
0084
0085 out_err:
0086 dev_err(pdmclk->dev, "%s: error %i\n", __func__, ret);
0087 twl6040_power(pdmclk->twl6040, 0);
0088
0089 return ret;
0090 }
0091
0092 static void twl6040_pdmclk_unprepare(struct clk_hw *hw)
0093 {
0094 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
0095 pdmclk_hw);
0096 int ret;
0097
0098 ret = twl6040_power(pdmclk->twl6040, 0);
0099 if (!ret)
0100 pdmclk->enabled = 0;
0101
0102 }
0103
0104 static unsigned long twl6040_pdmclk_recalc_rate(struct clk_hw *hw,
0105 unsigned long parent_rate)
0106 {
0107 struct twl6040_pdmclk *pdmclk = container_of(hw, struct twl6040_pdmclk,
0108 pdmclk_hw);
0109
0110 return twl6040_get_sysclk(pdmclk->twl6040);
0111 }
0112
0113 static const struct clk_ops twl6040_pdmclk_ops = {
0114 .is_prepared = twl6040_pdmclk_is_prepared,
0115 .prepare = twl6040_pdmclk_prepare,
0116 .unprepare = twl6040_pdmclk_unprepare,
0117 .recalc_rate = twl6040_pdmclk_recalc_rate,
0118 };
0119
0120 static const struct clk_init_data twl6040_pdmclk_init = {
0121 .name = "pdmclk",
0122 .ops = &twl6040_pdmclk_ops,
0123 .flags = CLK_GET_RATE_NOCACHE,
0124 };
0125
0126 static int twl6040_pdmclk_probe(struct platform_device *pdev)
0127 {
0128 struct twl6040 *twl6040 = dev_get_drvdata(pdev->dev.parent);
0129 struct twl6040_pdmclk *clkdata;
0130 int ret;
0131
0132 clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL);
0133 if (!clkdata)
0134 return -ENOMEM;
0135
0136 clkdata->dev = &pdev->dev;
0137 clkdata->twl6040 = twl6040;
0138
0139 clkdata->pdmclk_hw.init = &twl6040_pdmclk_init;
0140 ret = devm_clk_hw_register(&pdev->dev, &clkdata->pdmclk_hw);
0141 if (ret)
0142 return ret;
0143
0144 platform_set_drvdata(pdev, clkdata);
0145
0146 return devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get,
0147 &clkdata->pdmclk_hw);
0148 }
0149
0150 static struct platform_driver twl6040_pdmclk_driver = {
0151 .driver = {
0152 .name = "twl6040-pdmclk",
0153 },
0154 .probe = twl6040_pdmclk_probe,
0155 };
0156
0157 module_platform_driver(twl6040_pdmclk_driver);
0158
0159 MODULE_DESCRIPTION("TWL6040 clock driver for McPDM functional clock");
0160 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
0161 MODULE_ALIAS("platform:twl6040-pdmclk");
0162 MODULE_LICENSE("GPL");