drivers/clk/clk-scpi.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * System Control and Power Interface (SCPI) Protocol based clock driver
0004  *
0005  * Copyright (C) 2015 ARM Ltd.
0006  */
0007
0008 #include <linux/clk-provider.h>
0009 #include <linux/device.h>
0010 #include <linux/err.h>
0011 #include <linux/of.h>
0012 #include <linux/module.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/scpi_protocol.h>
0016
0017 struct scpi_clk {
0018     u32 id;
0019     struct clk_hw hw;
0020     struct scpi_dvfs_info *info;
0021     struct scpi_ops *scpi_ops;
0022 };
0023
0024 #define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
0025
0026 static struct platform_device *cpufreq_dev;
0027
0028 static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
0029                       unsigned long parent_rate)
0030 {
0031     struct scpi_clk *clk = to_scpi_clk(hw);
0032
0033     return clk->scpi_ops->clk_get_val(clk->id);
0034 }
0035
0036 static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
0037                 unsigned long *parent_rate)
0038 {
0039     /*
0040      * We can't figure out what rate it will be, so just return the
0041      * rate back to the caller. scpi_clk_recalc_rate() will be called
0042      * after the rate is set and we'll know what rate the clock is
0043      * running at then.
0044      */
0045     return rate;
0046 }
0047
0048 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
0049                  unsigned long parent_rate)
0050 {
0051     struct scpi_clk *clk = to_scpi_clk(hw);
0052
0053     return clk->scpi_ops->clk_set_val(clk->id, rate);
0054 }
0055
0056 static const struct clk_ops scpi_clk_ops = {
0057     .recalc_rate = scpi_clk_recalc_rate,
0058     .round_rate = scpi_clk_round_rate,
0059     .set_rate = scpi_clk_set_rate,
0060 };
0061
0062 /* find closest match to given frequency in OPP table */
0063 static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)
0064 {
0065     int idx;
0066     unsigned long fmin = 0, fmax = ~0, ftmp;
0067     const struct scpi_opp *opp = clk->info->opps;
0068
0069     for (idx = 0; idx < clk->info->count; idx++, opp++) {
0070         ftmp = opp->freq;
0071         if (ftmp >= rate) {
0072             if (ftmp <= fmax)
0073                 fmax = ftmp;
0074             break;
0075         } else if (ftmp >= fmin) {
0076             fmin = ftmp;
0077         }
0078     }
0079     return fmax != ~0 ? fmax : fmin;
0080 }
0081
0082 static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
0083                        unsigned long parent_rate)
0084 {
0085     struct scpi_clk *clk = to_scpi_clk(hw);
0086     int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
0087     const struct scpi_opp *opp;
0088
0089     if (idx < 0)
0090         return 0;
0091
0092     opp = clk->info->opps + idx;
0093     return opp->freq;
0094 }
0095
0096 static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate,
0097                  unsigned long *parent_rate)
0098 {
0099     struct scpi_clk *clk = to_scpi_clk(hw);
0100
0101     return __scpi_dvfs_round_rate(clk, rate);
0102 }
0103
0104 static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)
0105 {
0106     int idx, max_opp = clk->info->count;
0107     const struct scpi_opp *opp = clk->info->opps;
0108
0109     for (idx = 0; idx < max_opp; idx++, opp++)
0110         if (opp->freq == rate)
0111             return idx;
0112     return -EINVAL;
0113 }
0114
0115 static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate,
0116                   unsigned long parent_rate)
0117 {
0118     struct scpi_clk *clk = to_scpi_clk(hw);
0119     int ret = __scpi_find_dvfs_index(clk, rate);
0120
0121     if (ret < 0)
0122         return ret;
0123     return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);
0124 }
0125
0126 static const struct clk_ops scpi_dvfs_ops = {
0127     .recalc_rate = scpi_dvfs_recalc_rate,
0128     .round_rate = scpi_dvfs_round_rate,
0129     .set_rate = scpi_dvfs_set_rate,
0130 };
0131
0132 static const struct of_device_id scpi_clk_match[] __maybe_unused = {
0133     { .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, },
0134     { .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, },
0135     {}
0136 };
0137
0138 static int
0139 scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
0140           struct scpi_clk *sclk, const char *name)
0141 {
0142     struct clk_init_data init;
0143     unsigned long min = 0, max = 0;
0144     int ret;
0145
0146     init.name = name;
0147     init.flags = 0;
0148     init.num_parents = 0;
0149     init.ops = match->data;
0150     sclk->hw.init = &init;
0151     sclk->scpi_ops = get_scpi_ops();
0152
0153     if (init.ops == &scpi_dvfs_ops) {
0154         sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
0155         if (IS_ERR(sclk->info))
0156             return PTR_ERR(sclk->info);
0157     } else if (init.ops == &scpi_clk_ops) {
0158         if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
0159             return -EINVAL;
0160     } else {
0161         return -EINVAL;
0162     }
0163
0164     ret = devm_clk_hw_register(dev, &sclk->hw);
0165     if (!ret && max)
0166         clk_hw_set_rate_range(&sclk->hw, min, max);
0167     return ret;
0168 }
0169
0170 struct scpi_clk_data {
0171     struct scpi_clk **clk;
0172     unsigned int clk_num;
0173 };
0174
0175 static struct clk_hw *
0176 scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
0177 {
0178     struct scpi_clk *sclk;
0179     struct scpi_clk_data *clk_data = data;
0180     unsigned int idx = clkspec->args[0], count;
0181
0182     for (count = 0; count < clk_data->clk_num; count++) {
0183         sclk = clk_data->clk[count];
0184         if (idx == sclk->id)
0185             return &sclk->hw;
0186     }
0187
0188     return ERR_PTR(-EINVAL);
0189 }
0190
0191 static int scpi_clk_add(struct device *dev, struct device_node *np,
0192             const struct of_device_id *match)
0193 {
0194     int idx, count, err;
0195     struct scpi_clk_data *clk_data;
0196
0197     count = of_property_count_strings(np, "clock-output-names");
0198     if (count < 0) {
0199         dev_err(dev, "%pOFn: invalid clock output count\n", np);
0200         return -EINVAL;
0201     }
0202
0203     clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL);
0204     if (!clk_data)
0205         return -ENOMEM;
0206
0207     clk_data->clk_num = count;
0208     clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),
0209                      GFP_KERNEL);
0210     if (!clk_data->clk)
0211         return -ENOMEM;
0212
0213     for (idx = 0; idx < count; idx++) {
0214         struct scpi_clk *sclk;
0215         const char *name;
0216         u32 val;
0217
0218         sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
0219         if (!sclk)
0220             return -ENOMEM;
0221
0222         if (of_property_read_string_index(np, "clock-output-names",
0223                           idx, &name)) {
0224             dev_err(dev, "invalid clock name @ %pOFn\n", np);
0225             return -EINVAL;
0226         }
0227
0228         if (of_property_read_u32_index(np, "clock-indices",
0229                            idx, &val)) {
0230             dev_err(dev, "invalid clock index @ %pOFn\n", np);
0231             return -EINVAL;
0232         }
0233
0234         sclk->id = val;
0235
0236         err = scpi_clk_ops_init(dev, match, sclk, name);
0237         if (err) {
0238             dev_err(dev, "failed to register clock '%s'\n", name);
0239             return err;
0240         }
0241
0242         dev_dbg(dev, "Registered clock '%s'\n", name);
0243         clk_data->clk[idx] = sclk;
0244     }
0245
0246     return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data);
0247 }
0248
0249 static int scpi_clocks_remove(struct platform_device *pdev)
0250 {
0251     struct device *dev = &pdev->dev;
0252     struct device_node *child, *np = dev->of_node;
0253
0254     if (cpufreq_dev) {
0255         platform_device_unregister(cpufreq_dev);
0256         cpufreq_dev = NULL;
0257     }
0258
0259     for_each_available_child_of_node(np, child)
0260         of_clk_del_provider(np);
0261     return 0;
0262 }
0263
0264 static int scpi_clocks_probe(struct platform_device *pdev)
0265 {
0266     int ret;
0267     struct device *dev = &pdev->dev;
0268     struct device_node *child, *np = dev->of_node;
0269     const struct of_device_id *match;
0270
0271     if (!get_scpi_ops())
0272         return -ENXIO;
0273
0274     for_each_available_child_of_node(np, child) {
0275         match = of_match_node(scpi_clk_match, child);
0276         if (!match)
0277             continue;
0278         ret = scpi_clk_add(dev, child, match);
0279         if (ret) {
0280             scpi_clocks_remove(pdev);
0281             of_node_put(child);
0282             return ret;
0283         }
0284
0285         if (match->data != &scpi_dvfs_ops)
0286             continue;
0287         /* Add the virtual cpufreq device if it's DVFS clock provider */
0288         cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
0289                                   -1, NULL, 0);
0290         if (IS_ERR(cpufreq_dev))
0291             pr_warn("unable to register cpufreq device");
0292     }
0293     return 0;
0294 }
0295
0296 static const struct of_device_id scpi_clocks_ids[] = {
0297     { .compatible = "arm,scpi-clocks", },
0298     {}
0299 };
0300 MODULE_DEVICE_TABLE(of, scpi_clocks_ids);
0301
0302 static struct platform_driver scpi_clocks_driver = {
0303     .driver = {
0304         .name = "scpi_clocks",
0305         .of_match_table = scpi_clocks_ids,
0306     },
0307     .probe = scpi_clocks_probe,
0308     .remove = scpi_clocks_remove,
0309 };
0310 module_platform_driver(scpi_clocks_driver);
0311
0312 MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
0313 MODULE_DESCRIPTION("ARM SCPI clock driver");
0314 MODULE_LICENSE("GPL v2");