drivers/clk/clk-gpio.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
0004  *
0005  * Authors:
0006  *    Jyri Sarha <jsarha@ti.com>
0007  *    Sergej Sawazki <ce3a@gmx.de>
0008  *
0009  * Gpio controlled clock implementation
0010  */
0011
0012 #include <linux/clk-provider.h>
0013 #include <linux/export.h>
0014 #include <linux/slab.h>
0015 #include <linux/gpio/consumer.h>
0016 #include <linux/err.h>
0017 #include <linux/device.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/of_device.h>
0020
0021 /**
0022  * DOC: basic gpio gated clock which can be enabled and disabled
0023  *      with gpio output
0024  * Traits of this clock:
0025  * prepare - clk_(un)prepare only ensures parent is (un)prepared
0026  * enable - clk_enable and clk_disable are functional & control gpio
0027  * rate - inherits rate from parent.  No clk_set_rate support
0028  * parent - fixed parent.  No clk_set_parent support
0029  */
0030
0031 /**
0032  * struct clk_gpio - gpio gated clock
0033  *
0034  * @hw:     handle between common and hardware-specific interfaces
0035  * @gpiod:  gpio descriptor
0036  *
0037  * Clock with a gpio control for enabling and disabling the parent clock
0038  * or switching between two parents by asserting or deasserting the gpio.
0039  *
0040  * Implements .enable, .disable and .is_enabled or
0041  * .get_parent, .set_parent and .determine_rate depending on which clk_ops
0042  * is used.
0043  */
0044 struct clk_gpio {
0045     struct clk_hw   hw;
0046     struct gpio_desc *gpiod;
0047 };
0048
0049 #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
0050
0051 static int clk_gpio_gate_enable(struct clk_hw *hw)
0052 {
0053     struct clk_gpio *clk = to_clk_gpio(hw);
0054
0055     gpiod_set_value(clk->gpiod, 1);
0056
0057     return 0;
0058 }
0059
0060 static void clk_gpio_gate_disable(struct clk_hw *hw)
0061 {
0062     struct clk_gpio *clk = to_clk_gpio(hw);
0063
0064     gpiod_set_value(clk->gpiod, 0);
0065 }
0066
0067 static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
0068 {
0069     struct clk_gpio *clk = to_clk_gpio(hw);
0070
0071     return gpiod_get_value(clk->gpiod);
0072 }
0073
0074 static const struct clk_ops clk_gpio_gate_ops = {
0075     .enable = clk_gpio_gate_enable,
0076     .disable = clk_gpio_gate_disable,
0077     .is_enabled = clk_gpio_gate_is_enabled,
0078 };
0079
0080 static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
0081 {
0082     struct clk_gpio *clk = to_clk_gpio(hw);
0083
0084     gpiod_set_value_cansleep(clk->gpiod, 1);
0085
0086     return 0;
0087 }
0088
0089 static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
0090 {
0091     struct clk_gpio *clk = to_clk_gpio(hw);
0092
0093     gpiod_set_value_cansleep(clk->gpiod, 0);
0094 }
0095
0096 static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
0097 {
0098     struct clk_gpio *clk = to_clk_gpio(hw);
0099
0100     return gpiod_get_value_cansleep(clk->gpiod);
0101 }
0102
0103 static const struct clk_ops clk_sleeping_gpio_gate_ops = {
0104     .prepare = clk_sleeping_gpio_gate_prepare,
0105     .unprepare = clk_sleeping_gpio_gate_unprepare,
0106     .is_prepared = clk_sleeping_gpio_gate_is_prepared,
0107 };
0108
0109 /**
0110  * DOC: basic clock multiplexer which can be controlled with a gpio output
0111  * Traits of this clock:
0112  * prepare - clk_prepare only ensures that parents are prepared
0113  * rate - rate is only affected by parent switching.  No clk_set_rate support
0114  * parent - parent is adjustable through clk_set_parent
0115  */
0116
0117 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
0118 {
0119     struct clk_gpio *clk = to_clk_gpio(hw);
0120
0121     return gpiod_get_value_cansleep(clk->gpiod);
0122 }
0123
0124 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
0125 {
0126     struct clk_gpio *clk = to_clk_gpio(hw);
0127
0128     gpiod_set_value_cansleep(clk->gpiod, index);
0129
0130     return 0;
0131 }
0132
0133 static const struct clk_ops clk_gpio_mux_ops = {
0134     .get_parent = clk_gpio_mux_get_parent,
0135     .set_parent = clk_gpio_mux_set_parent,
0136     .determine_rate = __clk_mux_determine_rate,
0137 };
0138
0139 static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
0140                     struct gpio_desc *gpiod,
0141                     const struct clk_ops *clk_gpio_ops)
0142 {
0143     struct clk_gpio *clk_gpio;
0144     struct clk_hw *hw;
0145     struct clk_init_data init = {};
0146     int err;
0147     const struct clk_parent_data gpio_parent_data[] = {
0148         { .index = 0 },
0149         { .index = 1 },
0150     };
0151
0152     clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
0153     if (!clk_gpio)
0154         return ERR_PTR(-ENOMEM);
0155
0156     init.name = dev->of_node->name;
0157     init.ops = clk_gpio_ops;
0158     init.parent_data = gpio_parent_data;
0159     init.num_parents = num_parents;
0160     init.flags = CLK_SET_RATE_PARENT;
0161
0162     clk_gpio->gpiod = gpiod;
0163     clk_gpio->hw.init = &init;
0164
0165     hw = &clk_gpio->hw;
0166     err = devm_clk_hw_register(dev, hw);
0167     if (err)
0168         return ERR_PTR(err);
0169
0170     return hw;
0171 }
0172
0173 static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
0174                         int num_parents,
0175                         struct gpio_desc *gpiod)
0176 {
0177     const struct clk_ops *ops;
0178
0179     if (gpiod_cansleep(gpiod))
0180         ops = &clk_sleeping_gpio_gate_ops;
0181     else
0182         ops = &clk_gpio_gate_ops;
0183
0184     return clk_register_gpio(dev, num_parents, gpiod, ops);
0185 }
0186
0187 static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
0188                            struct gpio_desc *gpiod)
0189 {
0190     return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
0191 }
0192
0193 static int gpio_clk_driver_probe(struct platform_device *pdev)
0194 {
0195     struct device *dev = &pdev->dev;
0196     struct device_node *node = dev->of_node;
0197     const char *gpio_name;
0198     unsigned int num_parents;
0199     struct gpio_desc *gpiod;
0200     struct clk_hw *hw;
0201     bool is_mux;
0202     int ret;
0203
0204     is_mux = of_device_is_compatible(node, "gpio-mux-clock");
0205
0206     num_parents = of_clk_get_parent_count(node);
0207     if (is_mux && num_parents != 2) {
0208         dev_err(dev, "mux-clock must have 2 parents\n");
0209         return -EINVAL;
0210     }
0211
0212     gpio_name = is_mux ? "select" : "enable";
0213     gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
0214     if (IS_ERR(gpiod)) {
0215         ret = PTR_ERR(gpiod);
0216         if (ret == -EPROBE_DEFER)
0217             pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
0218                     node, __func__);
0219         else
0220             pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
0221                     node, __func__,
0222                     gpio_name);
0223         return ret;
0224     }
0225
0226     if (is_mux)
0227         hw = clk_hw_register_gpio_mux(dev, gpiod);
0228     else
0229         hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
0230     if (IS_ERR(hw))
0231         return PTR_ERR(hw);
0232
0233     return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
0234 }
0235
0236 static const struct of_device_id gpio_clk_match_table[] = {
0237     { .compatible = "gpio-mux-clock" },
0238     { .compatible = "gpio-gate-clock" },
0239     { }
0240 };
0241
0242 static struct platform_driver gpio_clk_driver = {
0243     .probe      = gpio_clk_driver_probe,
0244     .driver     = {
0245         .name   = "gpio-clk",
0246         .of_match_table = gpio_clk_match_table,
0247     },
0248 };
0249 builtin_platform_driver(gpio_clk_driver);