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0001 // SPDX-License-Identifier: GPL-2.0
0002 
0003 /*
0004  * Memory Mapped IO Fixed clock driver
0005  *
0006  * Copyright (C) 2018 Cadence Design Systems, Inc.
0007  *
0008  * Authors:
0009  *  Jan Kotas <jank@cadence.com>
0010  */
0011 
0012 #include <linux/clk-provider.h>
0013 #include <linux/io.h>
0014 #include <linux/module.h>
0015 #include <linux/of_address.h>
0016 #include <linux/platform_device.h>
0017 
0018 static struct clk_hw *fixed_mmio_clk_setup(struct device_node *node)
0019 {
0020     struct clk_hw *clk;
0021     const char *clk_name = node->name;
0022     void __iomem *base;
0023     u32 freq;
0024     int ret;
0025 
0026     base = of_iomap(node, 0);
0027     if (!base) {
0028         pr_err("%pOFn: failed to map address\n", node);
0029         return ERR_PTR(-EIO);
0030     }
0031 
0032     freq = readl(base);
0033     iounmap(base);
0034     of_property_read_string(node, "clock-output-names", &clk_name);
0035 
0036     clk = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0, freq);
0037     if (IS_ERR(clk)) {
0038         pr_err("%pOFn: failed to register fixed rate clock\n", node);
0039         return clk;
0040     }
0041 
0042     ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, clk);
0043     if (ret) {
0044         pr_err("%pOFn: failed to add clock provider\n", node);
0045         clk_hw_unregister(clk);
0046         clk = ERR_PTR(ret);
0047     }
0048 
0049     return clk;
0050 }
0051 
0052 static void __init of_fixed_mmio_clk_setup(struct device_node *node)
0053 {
0054     fixed_mmio_clk_setup(node);
0055 }
0056 CLK_OF_DECLARE(fixed_mmio_clk, "fixed-mmio-clock", of_fixed_mmio_clk_setup);
0057 
0058 /*
0059  * This is not executed when of_fixed_mmio_clk_setup succeeded.
0060  */
0061 static int of_fixed_mmio_clk_probe(struct platform_device *pdev)
0062 {
0063     struct clk_hw *clk;
0064 
0065     clk = fixed_mmio_clk_setup(pdev->dev.of_node);
0066     if (IS_ERR(clk))
0067         return PTR_ERR(clk);
0068 
0069     platform_set_drvdata(pdev, clk);
0070 
0071     return 0;
0072 }
0073 
0074 static int of_fixed_mmio_clk_remove(struct platform_device *pdev)
0075 {
0076     struct clk_hw *clk = platform_get_drvdata(pdev);
0077 
0078     of_clk_del_provider(pdev->dev.of_node);
0079     clk_hw_unregister_fixed_rate(clk);
0080 
0081     return 0;
0082 }
0083 
0084 static const struct of_device_id of_fixed_mmio_clk_ids[] = {
0085     { .compatible = "fixed-mmio-clock" },
0086     { }
0087 };
0088 MODULE_DEVICE_TABLE(of, of_fixed_mmio_clk_ids);
0089 
0090 static struct platform_driver of_fixed_mmio_clk_driver = {
0091     .driver = {
0092         .name = "of_fixed_mmio_clk",
0093         .of_match_table = of_fixed_mmio_clk_ids,
0094     },
0095     .probe = of_fixed_mmio_clk_probe,
0096     .remove = of_fixed_mmio_clk_remove,
0097 };
0098 module_platform_driver(of_fixed_mmio_clk_driver);
0099 
0100 MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
0101 MODULE_DESCRIPTION("Memory Mapped IO Fixed clock driver");
0102 MODULE_LICENSE("GPL v2");