clk/baikal-t1/ccu-pll.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
0004  *
0005  * Baikal-T1 CCU PLL interface driver
0006  */
0007 #ifndef __CLK_BT1_CCU_PLL_H__
0008 #define __CLK_BT1_CCU_PLL_H__
0009
0010 #include <linux/clk-provider.h>
0011 #include <linux/spinlock.h>
0012 #include <linux/regmap.h>
0013 #include <linux/bits.h>
0014 #include <linux/of.h>
0015
0016 /*
0017  * struct ccu_pll_init_data - CCU PLL initialization data
0018  * @id: Clock private identifier.
0019  * @name: Clocks name.
0020  * @parent_name: Clocks parent name in a fw node.
0021  * @base: PLL registers base address with respect to the sys_regs base.
0022  * @sys_regs: Baikal-T1 System Controller registers map.
0023  * @np: Pointer to the node describing the CCU PLLs.
0024  * @flags: PLL clock flags.
0025  */
0026 struct ccu_pll_init_data {
0027     unsigned int id;
0028     const char *name;
0029     const char *parent_name;
0030     unsigned int base;
0031     struct regmap *sys_regs;
0032     struct device_node *np;
0033     unsigned long flags;
0034 };
0035
0036 /*
0037  * struct ccu_pll - CCU PLL descriptor
0038  * @hw: clk_hw of the PLL.
0039  * @id: Clock private identifier.
0040  * @reg_ctl: PLL control register base.
0041  * @reg_ctl1: PLL control1 register base.
0042  * @sys_regs: Baikal-T1 System Controller registers map.
0043  * @lock: PLL state change spin-lock.
0044  */
0045 struct ccu_pll {
0046     struct clk_hw hw;
0047     unsigned int id;
0048     unsigned int reg_ctl;
0049     unsigned int reg_ctl1;
0050     struct regmap *sys_regs;
0051     spinlock_t lock;
0052 };
0053 #define to_ccu_pll(_hw) container_of(_hw, struct ccu_pll, hw)
0054
0055 static inline struct clk_hw *ccu_pll_get_clk_hw(struct ccu_pll *pll)
0056 {
0057     return pll ? &pll->hw : NULL;
0058 }
0059
0060 struct ccu_pll *ccu_pll_hw_register(const struct ccu_pll_init_data *init);
0061
0062 void ccu_pll_hw_unregister(struct ccu_pll *pll);
0063
0064 #endif /* __CLK_BT1_CCU_PLL_H__ */