clk/actions/owl-composite.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 //
0003 // OWL composite clock driver
0004 //
0005 // Copyright (c) 2014 Actions Semi Inc.
0006 // Author: David Liu <liuwei@actions-semi.com>
0007 //
0008 // Copyright (c) 2018 Linaro Ltd.
0009 // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
0010
0011 #ifndef _OWL_COMPOSITE_H_
0012 #define _OWL_COMPOSITE_H_
0013
0014 #include "owl-common.h"
0015 #include "owl-mux.h"
0016 #include "owl-gate.h"
0017 #include "owl-factor.h"
0018 #include "owl-fixed-factor.h"
0019 #include "owl-divider.h"
0020
0021 union owl_rate {
0022     struct owl_divider_hw   div_hw;
0023     struct owl_factor_hw    factor_hw;
0024     struct clk_fixed_factor fix_fact_hw;
0025 };
0026
0027 struct owl_composite {
0028     struct owl_mux_hw   mux_hw;
0029     struct owl_gate_hw  gate_hw;
0030     union owl_rate      rate;
0031
0032     const struct clk_ops    *fix_fact_ops;
0033
0034     struct owl_clk_common   common;
0035 };
0036
0037 #define OWL_COMP_DIV(_struct, _name, _parent,               \
0038              _mux, _gate, _div, _flags)             \
0039     struct owl_composite _struct = {                \
0040         .mux_hw     = _mux,                 \
0041         .gate_hw    = _gate,                \
0042         .rate.div_hw    = _div,                 \
0043         .common = {                     \
0044             .regmap     = NULL,             \
0045             .hw.init    = CLK_HW_INIT_PARENTS(_name,    \
0046                              _parent,       \
0047                               &owl_comp_div_ops,\
0048                              _flags),       \
0049         },                          \
0050     }
0051
0052 #define OWL_COMP_DIV_FIXED(_struct, _name, _parent,         \
0053              _gate, _div, _flags)               \
0054     struct owl_composite _struct = {                \
0055         .gate_hw    = _gate,                \
0056         .rate.div_hw    = _div,                 \
0057         .common = {                     \
0058             .regmap     = NULL,             \
0059             .hw.init    = CLK_HW_INIT(_name,        \
0060                              _parent,       \
0061                               &owl_comp_div_ops,\
0062                              _flags),       \
0063         },                          \
0064     }
0065
0066 #define OWL_COMP_FACTOR(_struct, _name, _parent,            \
0067             _mux, _gate, _factor, _flags)           \
0068     struct owl_composite _struct = {                \
0069         .mux_hw     = _mux,                 \
0070         .gate_hw    = _gate,                \
0071         .rate.factor_hw = _factor,              \
0072         .common = {                     \
0073             .regmap     = NULL,             \
0074             .hw.init    = CLK_HW_INIT_PARENTS(_name,    \
0075                              _parent,       \
0076                              &owl_comp_fact_ops,\
0077                              _flags),       \
0078         },                          \
0079     }
0080
0081 #define OWL_COMP_FIXED_FACTOR(_struct, _name, _parent,          \
0082             _gate, _mul, _div, _flags)          \
0083     struct owl_composite _struct = {                \
0084         .gate_hw        = _gate,            \
0085         .rate.fix_fact_hw.mult  = _mul,             \
0086         .rate.fix_fact_hw.div   = _div,             \
0087         .fix_fact_ops       = &clk_fixed_factor_ops,    \
0088         .common = {                     \
0089             .regmap     = NULL,             \
0090             .hw.init    = CLK_HW_INIT(_name,        \
0091                          _parent,       \
0092                          &owl_comp_fix_fact_ops,\
0093                          _flags),       \
0094         },                          \
0095     }
0096
0097 #define OWL_COMP_PASS(_struct, _name, _parent,              \
0098               _mux, _gate, _flags)              \
0099     struct owl_composite _struct = {                \
0100         .mux_hw     = _mux,                 \
0101         .gate_hw    = _gate,                \
0102         .common = {                     \
0103             .regmap     = NULL,             \
0104             .hw.init    = CLK_HW_INIT_PARENTS(_name,    \
0105                              _parent,       \
0106                              &owl_comp_pass_ops,\
0107                              _flags),       \
0108         },                          \
0109     }
0110
0111 static inline struct owl_composite *hw_to_owl_comp(const struct clk_hw *hw)
0112 {
0113     struct owl_clk_common *common = hw_to_owl_clk_common(hw);
0114
0115     return container_of(common, struct owl_composite, common);
0116 }
0117
0118 extern const struct clk_ops owl_comp_div_ops;
0119 extern const struct clk_ops owl_comp_fact_ops;
0120 extern const struct clk_ops owl_comp_fix_fact_ops;
0121 extern const struct clk_ops owl_comp_pass_ops;
0122 extern const struct clk_ops clk_fixed_factor_ops;
0123
0124 #endif /* _OWL_COMPOSITE_H_ */