char/tpm/tpm_nsc.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2004 IBM Corporation
0004  *
0005  * Authors:
0006  * Leendert van Doorn <leendert@watson.ibm.com>
0007  * Dave Safford <safford@watson.ibm.com>
0008  * Reiner Sailer <sailer@watson.ibm.com>
0009  * Kylene Hall <kjhall@us.ibm.com>
0010  *
0011  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
0012  *
0013  * Device driver for TCG/TCPA TPM (trusted platform module).
0014  * Specifications at www.trustedcomputinggroup.org
0015  */
0016
0017 #include <linux/platform_device.h>
0018 #include <linux/slab.h>
0019 #include "tpm.h"
0020
0021 /* National definitions */
0022 enum tpm_nsc_addr{
0023     TPM_NSC_IRQ = 0x07,
0024     TPM_NSC_BASE0_HI = 0x60,
0025     TPM_NSC_BASE0_LO = 0x61,
0026     TPM_NSC_BASE1_HI = 0x62,
0027     TPM_NSC_BASE1_LO = 0x63
0028 };
0029
0030 enum tpm_nsc_index {
0031     NSC_LDN_INDEX = 0x07,
0032     NSC_SID_INDEX = 0x20,
0033     NSC_LDC_INDEX = 0x30,
0034     NSC_DIO_INDEX = 0x60,
0035     NSC_CIO_INDEX = 0x62,
0036     NSC_IRQ_INDEX = 0x70,
0037     NSC_ITS_INDEX = 0x71
0038 };
0039
0040 enum tpm_nsc_status_loc {
0041     NSC_STATUS = 0x01,
0042     NSC_COMMAND = 0x01,
0043     NSC_DATA = 0x00
0044 };
0045
0046 /* status bits */
0047 enum tpm_nsc_status {
0048     NSC_STATUS_OBF = 0x01,  /* output buffer full */
0049     NSC_STATUS_IBF = 0x02,  /* input buffer full */
0050     NSC_STATUS_F0 = 0x04,   /* F0 */
0051     NSC_STATUS_A2 = 0x08,   /* A2 */
0052     NSC_STATUS_RDY = 0x10,  /* ready to receive command */
0053     NSC_STATUS_IBR = 0x20   /* ready to receive data */
0054 };
0055
0056 /* command bits */
0057 enum tpm_nsc_cmd_mode {
0058     NSC_COMMAND_NORMAL = 0x01,  /* normal mode */
0059     NSC_COMMAND_EOC = 0x03,
0060     NSC_COMMAND_CANCEL = 0x22
0061 };
0062
0063 struct tpm_nsc_priv {
0064     unsigned long base;
0065 };
0066
0067 /*
0068  * Wait for a certain status to appear
0069  */
0070 static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
0071 {
0072     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0073     unsigned long stop;
0074
0075     /* status immediately available check */
0076     *data = inb(priv->base + NSC_STATUS);
0077     if ((*data & mask) == val)
0078         return 0;
0079
0080     /* wait for status */
0081     stop = jiffies + 10 * HZ;
0082     do {
0083         msleep(TPM_TIMEOUT);
0084         *data = inb(priv->base + 1);
0085         if ((*data & mask) == val)
0086             return 0;
0087     }
0088     while (time_before(jiffies, stop));
0089
0090     return -EBUSY;
0091 }
0092
0093 static int nsc_wait_for_ready(struct tpm_chip *chip)
0094 {
0095     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0096     int status;
0097     unsigned long stop;
0098
0099     /* status immediately available check */
0100     status = inb(priv->base + NSC_STATUS);
0101     if (status & NSC_STATUS_OBF)
0102         status = inb(priv->base + NSC_DATA);
0103     if (status & NSC_STATUS_RDY)
0104         return 0;
0105
0106     /* wait for status */
0107     stop = jiffies + 100;
0108     do {
0109         msleep(TPM_TIMEOUT);
0110         status = inb(priv->base + NSC_STATUS);
0111         if (status & NSC_STATUS_OBF)
0112             status = inb(priv->base + NSC_DATA);
0113         if (status & NSC_STATUS_RDY)
0114             return 0;
0115     }
0116     while (time_before(jiffies, stop));
0117
0118     dev_info(&chip->dev, "wait for ready failed\n");
0119     return -EBUSY;
0120 }
0121
0122
0123 static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
0124 {
0125     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0126     u8 *buffer = buf;
0127     u8 data, *p;
0128     u32 size;
0129     __be32 *native_size;
0130
0131     if (count < 6)
0132         return -EIO;
0133
0134     if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
0135         dev_err(&chip->dev, "F0 timeout\n");
0136         return -EIO;
0137     }
0138
0139     data = inb(priv->base + NSC_DATA);
0140     if (data != NSC_COMMAND_NORMAL) {
0141         dev_err(&chip->dev, "not in normal mode (0x%x)\n",
0142             data);
0143         return -EIO;
0144     }
0145
0146     /* read the whole packet */
0147     for (p = buffer; p < &buffer[count]; p++) {
0148         if (wait_for_stat
0149             (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
0150             dev_err(&chip->dev,
0151                 "OBF timeout (while reading data)\n");
0152             return -EIO;
0153         }
0154         if (data & NSC_STATUS_F0)
0155             break;
0156         *p = inb(priv->base + NSC_DATA);
0157     }
0158
0159     if ((data & NSC_STATUS_F0) == 0 &&
0160     (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
0161         dev_err(&chip->dev, "F0 not set\n");
0162         return -EIO;
0163     }
0164
0165     data = inb(priv->base + NSC_DATA);
0166     if (data != NSC_COMMAND_EOC) {
0167         dev_err(&chip->dev,
0168             "expected end of command(0x%x)\n", data);
0169         return -EIO;
0170     }
0171
0172     native_size = (__force __be32 *) (buf + 2);
0173     size = be32_to_cpu(*native_size);
0174
0175     if (count < size)
0176         return -EIO;
0177
0178     return size;
0179 }
0180
0181 static int tpm_nsc_send(struct tpm_chip *chip, u8 * buf, size_t count)
0182 {
0183     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0184     u8 data;
0185     int i;
0186
0187     /*
0188      * If we hit the chip with back to back commands it locks up
0189      * and never set IBF. Hitting it with this "hammer" seems to
0190      * fix it. Not sure why this is needed, we followed the flow
0191      * chart in the manual to the letter.
0192      */
0193     outb(NSC_COMMAND_CANCEL, priv->base + NSC_COMMAND);
0194
0195     if (nsc_wait_for_ready(chip) != 0)
0196         return -EIO;
0197
0198     if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
0199         dev_err(&chip->dev, "IBF timeout\n");
0200         return -EIO;
0201     }
0202
0203     outb(NSC_COMMAND_NORMAL, priv->base + NSC_COMMAND);
0204     if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
0205         dev_err(&chip->dev, "IBR timeout\n");
0206         return -EIO;
0207     }
0208
0209     for (i = 0; i < count; i++) {
0210         if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
0211             dev_err(&chip->dev,
0212                 "IBF timeout (while writing data)\n");
0213             return -EIO;
0214         }
0215         outb(buf[i], priv->base + NSC_DATA);
0216     }
0217
0218     if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
0219         dev_err(&chip->dev, "IBF timeout\n");
0220         return -EIO;
0221     }
0222     outb(NSC_COMMAND_EOC, priv->base + NSC_COMMAND);
0223
0224     return 0;
0225 }
0226
0227 static void tpm_nsc_cancel(struct tpm_chip *chip)
0228 {
0229     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0230
0231     outb(NSC_COMMAND_CANCEL, priv->base + NSC_COMMAND);
0232 }
0233
0234 static u8 tpm_nsc_status(struct tpm_chip *chip)
0235 {
0236     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0237
0238     return inb(priv->base + NSC_STATUS);
0239 }
0240
0241 static bool tpm_nsc_req_canceled(struct tpm_chip *chip, u8 status)
0242 {
0243     return (status == NSC_STATUS_RDY);
0244 }
0245
0246 static const struct tpm_class_ops tpm_nsc = {
0247     .recv = tpm_nsc_recv,
0248     .send = tpm_nsc_send,
0249     .cancel = tpm_nsc_cancel,
0250     .status = tpm_nsc_status,
0251     .req_complete_mask = NSC_STATUS_OBF,
0252     .req_complete_val = NSC_STATUS_OBF,
0253     .req_canceled = tpm_nsc_req_canceled,
0254 };
0255
0256 static struct platform_device *pdev = NULL;
0257
0258 static void tpm_nsc_remove(struct device *dev)
0259 {
0260     struct tpm_chip *chip = dev_get_drvdata(dev);
0261     struct tpm_nsc_priv *priv = dev_get_drvdata(&chip->dev);
0262
0263     tpm_chip_unregister(chip);
0264     release_region(priv->base, 2);
0265 }
0266
0267 static SIMPLE_DEV_PM_OPS(tpm_nsc_pm, tpm_pm_suspend, tpm_pm_resume);
0268
0269 static struct platform_driver nsc_drv = {
0270     .driver          = {
0271         .name    = "tpm_nsc",
0272         .pm      = &tpm_nsc_pm,
0273     },
0274 };
0275
0276 static inline int tpm_read_index(int base, int index)
0277 {
0278     outb(index, base);
0279     return inb(base+1) & 0xFF;
0280 }
0281
0282 static inline void tpm_write_index(int base, int index, int value)
0283 {
0284     outb(index, base);
0285     outb(value & 0xFF, base+1);
0286 }
0287
0288 static int __init init_nsc(void)
0289 {
0290     int rc = 0;
0291     int lo, hi, err;
0292     int nscAddrBase = TPM_ADDR;
0293     struct tpm_chip *chip;
0294     unsigned long base;
0295     struct tpm_nsc_priv *priv;
0296
0297     /* verify that it is a National part (SID) */
0298     if (tpm_read_index(TPM_ADDR, NSC_SID_INDEX) != 0xEF) {
0299         nscAddrBase = (tpm_read_index(TPM_SUPERIO_ADDR, 0x2C)<<8)|
0300             (tpm_read_index(TPM_SUPERIO_ADDR, 0x2B)&0xFE);
0301         if (tpm_read_index(nscAddrBase, NSC_SID_INDEX) != 0xF6)
0302             return -ENODEV;
0303     }
0304
0305     err = platform_driver_register(&nsc_drv);
0306     if (err)
0307         return err;
0308
0309     hi = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_HI);
0310     lo = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_LO);
0311     base = (hi<<8) | lo;
0312
0313     /* enable the DPM module */
0314     tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01);
0315
0316     pdev = platform_device_alloc("tpm_nscl0", -1);
0317     if (!pdev) {
0318         rc = -ENOMEM;
0319         goto err_unreg_drv;
0320     }
0321
0322     pdev->num_resources = 0;
0323     pdev->dev.driver = &nsc_drv.driver;
0324     pdev->dev.release = tpm_nsc_remove;
0325
0326     if ((rc = platform_device_add(pdev)) < 0)
0327         goto err_put_dev;
0328
0329     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
0330     if (!priv) {
0331         rc = -ENOMEM;
0332         goto err_del_dev;
0333     }
0334
0335     priv->base = base;
0336
0337     if (request_region(base, 2, "tpm_nsc0") == NULL ) {
0338         rc = -EBUSY;
0339         goto err_del_dev;
0340     }
0341
0342     chip = tpmm_chip_alloc(&pdev->dev, &tpm_nsc);
0343     if (IS_ERR(chip)) {
0344         rc = -ENODEV;
0345         goto err_rel_reg;
0346     }
0347
0348     dev_set_drvdata(&chip->dev, priv);
0349
0350     rc = tpm_chip_register(chip);
0351     if (rc)
0352         goto err_rel_reg;
0353
0354     dev_dbg(&pdev->dev, "NSC TPM detected\n");
0355     dev_dbg(&pdev->dev,
0356         "NSC LDN 0x%x, SID 0x%x, SRID 0x%x\n",
0357         tpm_read_index(nscAddrBase,0x07), tpm_read_index(nscAddrBase,0x20),
0358         tpm_read_index(nscAddrBase,0x27));
0359     dev_dbg(&pdev->dev,
0360         "NSC SIOCF1 0x%x SIOCF5 0x%x SIOCF6 0x%x SIOCF8 0x%x\n",
0361         tpm_read_index(nscAddrBase,0x21), tpm_read_index(nscAddrBase,0x25),
0362         tpm_read_index(nscAddrBase,0x26), tpm_read_index(nscAddrBase,0x28));
0363     dev_dbg(&pdev->dev, "NSC IO Base0 0x%x\n",
0364         (tpm_read_index(nscAddrBase,0x60) << 8) | tpm_read_index(nscAddrBase,0x61));
0365     dev_dbg(&pdev->dev, "NSC IO Base1 0x%x\n",
0366         (tpm_read_index(nscAddrBase,0x62) << 8) | tpm_read_index(nscAddrBase,0x63));
0367     dev_dbg(&pdev->dev, "NSC Interrupt number and wakeup 0x%x\n",
0368         tpm_read_index(nscAddrBase,0x70));
0369     dev_dbg(&pdev->dev, "NSC IRQ type select 0x%x\n",
0370         tpm_read_index(nscAddrBase,0x71));
0371     dev_dbg(&pdev->dev,
0372         "NSC DMA channel select0 0x%x, select1 0x%x\n",
0373         tpm_read_index(nscAddrBase,0x74), tpm_read_index(nscAddrBase,0x75));
0374     dev_dbg(&pdev->dev,
0375         "NSC Config "
0376         "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
0377         tpm_read_index(nscAddrBase,0xF0), tpm_read_index(nscAddrBase,0xF1),
0378         tpm_read_index(nscAddrBase,0xF2), tpm_read_index(nscAddrBase,0xF3),
0379         tpm_read_index(nscAddrBase,0xF4), tpm_read_index(nscAddrBase,0xF5),
0380         tpm_read_index(nscAddrBase,0xF6), tpm_read_index(nscAddrBase,0xF7),
0381         tpm_read_index(nscAddrBase,0xF8), tpm_read_index(nscAddrBase,0xF9));
0382
0383     dev_info(&pdev->dev,
0384          "NSC TPM revision %d\n",
0385          tpm_read_index(nscAddrBase, 0x27) & 0x1F);
0386
0387     return 0;
0388
0389 err_rel_reg:
0390     release_region(base, 2);
0391 err_del_dev:
0392     platform_device_del(pdev);
0393 err_put_dev:
0394     platform_device_put(pdev);
0395 err_unreg_drv:
0396     platform_driver_unregister(&nsc_drv);
0397     return rc;
0398 }
0399
0400 static void __exit cleanup_nsc(void)
0401 {
0402     if (pdev) {
0403         tpm_nsc_remove(&pdev->dev);
0404         platform_device_unregister(pdev);
0405     }
0406
0407     platform_driver_unregister(&nsc_drv);
0408 }
0409
0410 module_init(init_nsc);
0411 module_exit(cleanup_nsc);
0412
0413 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
0414 MODULE_DESCRIPTION("TPM Driver");
0415 MODULE_VERSION("2.0");
0416 MODULE_LICENSE("GPL");