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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2014 Intel Corporation
0004  *
0005  * Authors:
0006  * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
0007  *
0008  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
0009  *
0010  * This device driver implements the TPM interface as defined in
0011  * the TCG CRB 2.0 TPM specification.
0012  */
0013 
0014 #include <linux/acpi.h>
0015 #include <linux/highmem.h>
0016 #include <linux/rculist.h>
0017 #include <linux/module.h>
0018 #include <linux/pm_runtime.h>
0019 #ifdef CONFIG_ARM64
0020 #include <linux/arm-smccc.h>
0021 #endif
0022 #include "tpm.h"
0023 
0024 #define ACPI_SIG_TPM2 "TPM2"
0025 #define TPM_CRB_MAX_RESOURCES 3
0026 
0027 static const guid_t crb_acpi_start_guid =
0028     GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714,
0029           0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4);
0030 
0031 enum crb_defaults {
0032     CRB_ACPI_START_REVISION_ID = 1,
0033     CRB_ACPI_START_INDEX = 1,
0034 };
0035 
0036 enum crb_loc_ctrl {
0037     CRB_LOC_CTRL_REQUEST_ACCESS = BIT(0),
0038     CRB_LOC_CTRL_RELINQUISH     = BIT(1),
0039 };
0040 
0041 enum crb_loc_state {
0042     CRB_LOC_STATE_LOC_ASSIGNED  = BIT(1),
0043     CRB_LOC_STATE_TPM_REG_VALID_STS = BIT(7),
0044 };
0045 
0046 enum crb_ctrl_req {
0047     CRB_CTRL_REQ_CMD_READY  = BIT(0),
0048     CRB_CTRL_REQ_GO_IDLE    = BIT(1),
0049 };
0050 
0051 enum crb_ctrl_sts {
0052     CRB_CTRL_STS_ERROR  = BIT(0),
0053     CRB_CTRL_STS_TPM_IDLE   = BIT(1),
0054 };
0055 
0056 enum crb_start {
0057     CRB_START_INVOKE    = BIT(0),
0058 };
0059 
0060 enum crb_cancel {
0061     CRB_CANCEL_INVOKE   = BIT(0),
0062 };
0063 
0064 struct crb_regs_head {
0065     u32 loc_state;
0066     u32 reserved1;
0067     u32 loc_ctrl;
0068     u32 loc_sts;
0069     u8 reserved2[32];
0070     u64 intf_id;
0071     u64 ctrl_ext;
0072 } __packed;
0073 
0074 struct crb_regs_tail {
0075     u32 ctrl_req;
0076     u32 ctrl_sts;
0077     u32 ctrl_cancel;
0078     u32 ctrl_start;
0079     u32 ctrl_int_enable;
0080     u32 ctrl_int_sts;
0081     u32 ctrl_cmd_size;
0082     u32 ctrl_cmd_pa_low;
0083     u32 ctrl_cmd_pa_high;
0084     u32 ctrl_rsp_size;
0085     u64 ctrl_rsp_pa;
0086 } __packed;
0087 
0088 enum crb_status {
0089     CRB_DRV_STS_COMPLETE    = BIT(0),
0090 };
0091 
0092 struct crb_priv {
0093     u32 sm;
0094     const char *hid;
0095     struct crb_regs_head __iomem *regs_h;
0096     struct crb_regs_tail __iomem *regs_t;
0097     u8 __iomem *cmd;
0098     u8 __iomem *rsp;
0099     u32 cmd_size;
0100     u32 smc_func_id;
0101 };
0102 
0103 struct tpm2_crb_smc {
0104     u32 interrupt;
0105     u8 interrupt_flags;
0106     u8 op_flags;
0107     u16 reserved2;
0108     u32 smc_func_id;
0109 };
0110 
0111 static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value,
0112                 unsigned long timeout)
0113 {
0114     ktime_t start;
0115     ktime_t stop;
0116 
0117     start = ktime_get();
0118     stop = ktime_add(start, ms_to_ktime(timeout));
0119 
0120     do {
0121         if ((ioread32(reg) & mask) == value)
0122             return true;
0123 
0124         usleep_range(50, 100);
0125     } while (ktime_before(ktime_get(), stop));
0126 
0127     return ((ioread32(reg) & mask) == value);
0128 }
0129 
0130 /**
0131  * __crb_go_idle - request tpm crb device to go the idle state
0132  *
0133  * @dev:  crb device
0134  * @priv: crb private data
0135  *
0136  * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
0137  * The device should respond within TIMEOUT_C by clearing the bit.
0138  * Anyhow, we do not wait here as a consequent CMD_READY request
0139  * will be handled correctly even if idle was not completed.
0140  *
0141  * The function does nothing for devices with ACPI-start method
0142  * or SMC-start method.
0143  *
0144  * Return: 0 always
0145  */
0146 static int __crb_go_idle(struct device *dev, struct crb_priv *priv)
0147 {
0148     if ((priv->sm == ACPI_TPM2_START_METHOD) ||
0149         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
0150         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
0151         return 0;
0152 
0153     iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req);
0154 
0155     if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
0156                  CRB_CTRL_REQ_GO_IDLE/* mask */,
0157                  0, /* value */
0158                  TPM2_TIMEOUT_C)) {
0159         dev_warn(dev, "goIdle timed out\n");
0160         return -ETIME;
0161     }
0162 
0163     return 0;
0164 }
0165 
0166 static int crb_go_idle(struct tpm_chip *chip)
0167 {
0168     struct device *dev = &chip->dev;
0169     struct crb_priv *priv = dev_get_drvdata(dev);
0170 
0171     return __crb_go_idle(dev, priv);
0172 }
0173 
0174 /**
0175  * __crb_cmd_ready - request tpm crb device to enter ready state
0176  *
0177  * @dev:  crb device
0178  * @priv: crb private data
0179  *
0180  * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
0181  * and poll till the device acknowledge it by clearing the bit.
0182  * The device should respond within TIMEOUT_C.
0183  *
0184  * The function does nothing for devices with ACPI-start method
0185  * or SMC-start method.
0186  *
0187  * Return: 0 on success -ETIME on timeout;
0188  */
0189 static int __crb_cmd_ready(struct device *dev, struct crb_priv *priv)
0190 {
0191     if ((priv->sm == ACPI_TPM2_START_METHOD) ||
0192         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) ||
0193         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC))
0194         return 0;
0195 
0196     iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req);
0197     if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
0198                  CRB_CTRL_REQ_CMD_READY /* mask */,
0199                  0, /* value */
0200                  TPM2_TIMEOUT_C)) {
0201         dev_warn(dev, "cmdReady timed out\n");
0202         return -ETIME;
0203     }
0204 
0205     return 0;
0206 }
0207 
0208 static int crb_cmd_ready(struct tpm_chip *chip)
0209 {
0210     struct device *dev = &chip->dev;
0211     struct crb_priv *priv = dev_get_drvdata(dev);
0212 
0213     return __crb_cmd_ready(dev, priv);
0214 }
0215 
0216 static int __crb_request_locality(struct device *dev,
0217                   struct crb_priv *priv, int loc)
0218 {
0219     u32 value = CRB_LOC_STATE_LOC_ASSIGNED |
0220             CRB_LOC_STATE_TPM_REG_VALID_STS;
0221 
0222     if (!priv->regs_h)
0223         return 0;
0224 
0225     iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl);
0226     if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value,
0227                  TPM2_TIMEOUT_C)) {
0228         dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
0229         return -ETIME;
0230     }
0231 
0232     return 0;
0233 }
0234 
0235 static int crb_request_locality(struct tpm_chip *chip, int loc)
0236 {
0237     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0238 
0239     return __crb_request_locality(&chip->dev, priv, loc);
0240 }
0241 
0242 static int __crb_relinquish_locality(struct device *dev,
0243                      struct crb_priv *priv, int loc)
0244 {
0245     u32 mask = CRB_LOC_STATE_LOC_ASSIGNED |
0246            CRB_LOC_STATE_TPM_REG_VALID_STS;
0247     u32 value = CRB_LOC_STATE_TPM_REG_VALID_STS;
0248 
0249     if (!priv->regs_h)
0250         return 0;
0251 
0252     iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl);
0253     if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, mask, value,
0254                  TPM2_TIMEOUT_C)) {
0255         dev_warn(dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
0256         return -ETIME;
0257     }
0258 
0259     return 0;
0260 }
0261 
0262 static int crb_relinquish_locality(struct tpm_chip *chip, int loc)
0263 {
0264     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0265 
0266     return __crb_relinquish_locality(&chip->dev, priv, loc);
0267 }
0268 
0269 static u8 crb_status(struct tpm_chip *chip)
0270 {
0271     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0272     u8 sts = 0;
0273 
0274     if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) !=
0275         CRB_START_INVOKE)
0276         sts |= CRB_DRV_STS_COMPLETE;
0277 
0278     return sts;
0279 }
0280 
0281 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
0282 {
0283     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0284     unsigned int expected;
0285 
0286     /* A sanity check that the upper layer wants to get at least the header
0287      * as that is the minimum size for any TPM response.
0288      */
0289     if (count < TPM_HEADER_SIZE)
0290         return -EIO;
0291 
0292     /* If this bit is set, according to the spec, the TPM is in
0293      * unrecoverable condition.
0294      */
0295     if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR)
0296         return -EIO;
0297 
0298     /* Read the first 8 bytes in order to get the length of the response.
0299      * We read exactly a quad word in order to make sure that the remaining
0300      * reads will be aligned.
0301      */
0302     memcpy_fromio(buf, priv->rsp, 8);
0303 
0304     expected = be32_to_cpup((__be32 *)&buf[2]);
0305     if (expected > count || expected < TPM_HEADER_SIZE)
0306         return -EIO;
0307 
0308     memcpy_fromio(&buf[8], &priv->rsp[8], expected - 8);
0309 
0310     return expected;
0311 }
0312 
0313 static int crb_do_acpi_start(struct tpm_chip *chip)
0314 {
0315     union acpi_object *obj;
0316     int rc;
0317 
0318     obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
0319                 &crb_acpi_start_guid,
0320                 CRB_ACPI_START_REVISION_ID,
0321                 CRB_ACPI_START_INDEX,
0322                 NULL);
0323     if (!obj)
0324         return -ENXIO;
0325     rc = obj->integer.value == 0 ? 0 : -ENXIO;
0326     ACPI_FREE(obj);
0327     return rc;
0328 }
0329 
0330 #ifdef CONFIG_ARM64
0331 /*
0332  * This is a TPM Command Response Buffer start method that invokes a
0333  * Secure Monitor Call to requrest the firmware to execute or cancel
0334  * a TPM 2.0 command.
0335  */
0336 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
0337 {
0338     struct arm_smccc_res res;
0339 
0340     arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);
0341     if (res.a0 != 0) {
0342         dev_err(dev,
0343             FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n",
0344             res.a0);
0345         return -EIO;
0346     }
0347 
0348     return 0;
0349 }
0350 #else
0351 static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
0352 {
0353     dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n");
0354     return -EINVAL;
0355 }
0356 #endif
0357 
0358 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
0359 {
0360     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0361     int rc = 0;
0362 
0363     /* Zero the cancel register so that the next command will not get
0364      * canceled.
0365      */
0366     iowrite32(0, &priv->regs_t->ctrl_cancel);
0367 
0368     if (len > priv->cmd_size) {
0369         dev_err(&chip->dev, "invalid command count value %zd %d\n",
0370             len, priv->cmd_size);
0371         return -E2BIG;
0372     }
0373 
0374     memcpy_toio(priv->cmd, buf, len);
0375 
0376     /* Make sure that cmd is populated before issuing start. */
0377     wmb();
0378 
0379     /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
0380      * report only ACPI start but in practice seems to require both
0381      * CRB start, hence invoking CRB start method if hid == MSFT0101.
0382      */
0383     if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
0384         (priv->sm == ACPI_TPM2_MEMORY_MAPPED) ||
0385         (!strcmp(priv->hid, "MSFT0101")))
0386         iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
0387 
0388     if ((priv->sm == ACPI_TPM2_START_METHOD) ||
0389         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD))
0390         rc = crb_do_acpi_start(chip);
0391 
0392     if (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
0393         iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
0394         rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id);
0395     }
0396 
0397     return rc;
0398 }
0399 
0400 static void crb_cancel(struct tpm_chip *chip)
0401 {
0402     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0403 
0404     iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel);
0405 
0406     if (((priv->sm == ACPI_TPM2_START_METHOD) ||
0407         (priv->sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)) &&
0408          crb_do_acpi_start(chip))
0409         dev_err(&chip->dev, "ACPI Start failed\n");
0410 }
0411 
0412 static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
0413 {
0414     struct crb_priv *priv = dev_get_drvdata(&chip->dev);
0415     u32 cancel = ioread32(&priv->regs_t->ctrl_cancel);
0416 
0417     return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
0418 }
0419 
0420 static const struct tpm_class_ops tpm_crb = {
0421     .flags = TPM_OPS_AUTO_STARTUP,
0422     .status = crb_status,
0423     .recv = crb_recv,
0424     .send = crb_send,
0425     .cancel = crb_cancel,
0426     .req_canceled = crb_req_canceled,
0427     .go_idle  = crb_go_idle,
0428     .cmd_ready = crb_cmd_ready,
0429     .request_locality = crb_request_locality,
0430     .relinquish_locality = crb_relinquish_locality,
0431     .req_complete_mask = CRB_DRV_STS_COMPLETE,
0432     .req_complete_val = CRB_DRV_STS_COMPLETE,
0433 };
0434 
0435 static int crb_check_resource(struct acpi_resource *ares, void *data)
0436 {
0437     struct resource *iores_array = data;
0438     struct resource_win win;
0439     struct resource *res = &(win.res);
0440     int i;
0441 
0442     if (acpi_dev_resource_memory(ares, res) ||
0443         acpi_dev_resource_address_space(ares, &win)) {
0444         for (i = 0; i < TPM_CRB_MAX_RESOURCES + 1; ++i) {
0445             if (resource_type(iores_array + i) != IORESOURCE_MEM) {
0446                 iores_array[i] = *res;
0447                 iores_array[i].name = NULL;
0448                 break;
0449             }
0450         }
0451     }
0452 
0453     return 1;
0454 }
0455 
0456 static void __iomem *crb_map_res(struct device *dev, struct resource *iores,
0457                  void __iomem **iobase_ptr, u64 start, u32 size)
0458 {
0459     struct resource new_res = {
0460         .start  = start,
0461         .end    = start + size - 1,
0462         .flags  = IORESOURCE_MEM,
0463     };
0464 
0465     /* Detect a 64 bit address on a 32 bit system */
0466     if (start != new_res.start)
0467         return IOMEM_ERR_PTR(-EINVAL);
0468 
0469     if (!iores)
0470         return devm_ioremap_resource(dev, &new_res);
0471 
0472     if (!*iobase_ptr) {
0473         *iobase_ptr = devm_ioremap_resource(dev, iores);
0474         if (IS_ERR(*iobase_ptr))
0475             return *iobase_ptr;
0476     }
0477 
0478     return *iobase_ptr + (new_res.start - iores->start);
0479 }
0480 
0481 /*
0482  * Work around broken BIOSs that return inconsistent values from the ACPI
0483  * region vs the registers. Trust the ACPI region. Such broken systems
0484  * probably cannot send large TPM commands since the buffer will be truncated.
0485  */
0486 static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res,
0487                   u64 start, u64 size)
0488 {
0489     if (io_res->start > start || io_res->end < start)
0490         return size;
0491 
0492     if (start + size - 1 <= io_res->end)
0493         return size;
0494 
0495     dev_err(dev,
0496         FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n",
0497         io_res, start, size);
0498 
0499     return io_res->end - start + 1;
0500 }
0501 
0502 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
0503               struct acpi_table_tpm2 *buf)
0504 {
0505     struct list_head acpi_resource_list;
0506     struct resource iores_array[TPM_CRB_MAX_RESOURCES + 1] = { {0} };
0507     void __iomem *iobase_array[TPM_CRB_MAX_RESOURCES] = {NULL};
0508     struct device *dev = &device->dev;
0509     struct resource *iores;
0510     void __iomem **iobase_ptr;
0511     int i;
0512     u32 pa_high, pa_low;
0513     u64 cmd_pa;
0514     u32 cmd_size;
0515     __le64 __rsp_pa;
0516     u64 rsp_pa;
0517     u32 rsp_size;
0518     int ret;
0519 
0520     INIT_LIST_HEAD(&acpi_resource_list);
0521     ret = acpi_dev_get_resources(device, &acpi_resource_list,
0522                      crb_check_resource, iores_array);
0523     if (ret < 0)
0524         return ret;
0525     acpi_dev_free_resource_list(&acpi_resource_list);
0526 
0527     if (resource_type(iores_array) != IORESOURCE_MEM) {
0528         dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
0529         return -EINVAL;
0530     } else if (resource_type(iores_array + TPM_CRB_MAX_RESOURCES) ==
0531         IORESOURCE_MEM) {
0532         dev_warn(dev, "TPM2 ACPI table defines too many memory resources\n");
0533         memset(iores_array + TPM_CRB_MAX_RESOURCES,
0534                0, sizeof(*iores_array));
0535         iores_array[TPM_CRB_MAX_RESOURCES].flags = 0;
0536     }
0537 
0538     iores = NULL;
0539     iobase_ptr = NULL;
0540     for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
0541         if (buf->control_address >= iores_array[i].start &&
0542             buf->control_address + sizeof(struct crb_regs_tail) - 1 <=
0543             iores_array[i].end) {
0544             iores = iores_array + i;
0545             iobase_ptr = iobase_array + i;
0546             break;
0547         }
0548     }
0549 
0550     priv->regs_t = crb_map_res(dev, iores, iobase_ptr, buf->control_address,
0551                    sizeof(struct crb_regs_tail));
0552 
0553     if (IS_ERR(priv->regs_t))
0554         return PTR_ERR(priv->regs_t);
0555 
0556     /* The ACPI IO region starts at the head area and continues to include
0557      * the control area, as one nice sane region except for some older
0558      * stuff that puts the control area outside the ACPI IO region.
0559      */
0560     if ((priv->sm == ACPI_TPM2_COMMAND_BUFFER) ||
0561         (priv->sm == ACPI_TPM2_MEMORY_MAPPED)) {
0562         if (iores &&
0563             buf->control_address == iores->start +
0564             sizeof(*priv->regs_h))
0565             priv->regs_h = *iobase_ptr;
0566         else
0567             dev_warn(dev, FW_BUG "Bad ACPI memory layout");
0568     }
0569 
0570     ret = __crb_request_locality(dev, priv, 0);
0571     if (ret)
0572         return ret;
0573 
0574     /*
0575      * PTT HW bug w/a: wake up the device to access
0576      * possibly not retained registers.
0577      */
0578     ret = __crb_cmd_ready(dev, priv);
0579     if (ret)
0580         goto out_relinquish_locality;
0581 
0582     pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high);
0583     pa_low  = ioread32(&priv->regs_t->ctrl_cmd_pa_low);
0584     cmd_pa = ((u64)pa_high << 32) | pa_low;
0585     cmd_size = ioread32(&priv->regs_t->ctrl_cmd_size);
0586 
0587     iores = NULL;
0588     iobase_ptr = NULL;
0589     for (i = 0; iores_array[i].end; ++i) {
0590         if (cmd_pa >= iores_array[i].start &&
0591             cmd_pa <= iores_array[i].end) {
0592             iores = iores_array + i;
0593             iobase_ptr = iobase_array + i;
0594             break;
0595         }
0596     }
0597 
0598     if (iores)
0599         cmd_size = crb_fixup_cmd_size(dev, iores, cmd_pa, cmd_size);
0600 
0601     dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n",
0602         pa_high, pa_low, cmd_size);
0603 
0604     priv->cmd = crb_map_res(dev, iores, iobase_ptr, cmd_pa, cmd_size);
0605     if (IS_ERR(priv->cmd)) {
0606         ret = PTR_ERR(priv->cmd);
0607         goto out;
0608     }
0609 
0610     memcpy_fromio(&__rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8);
0611     rsp_pa = le64_to_cpu(__rsp_pa);
0612     rsp_size = ioread32(&priv->regs_t->ctrl_rsp_size);
0613 
0614     iores = NULL;
0615     iobase_ptr = NULL;
0616     for (i = 0; resource_type(iores_array + i) == IORESOURCE_MEM; ++i) {
0617         if (rsp_pa >= iores_array[i].start &&
0618             rsp_pa <= iores_array[i].end) {
0619             iores = iores_array + i;
0620             iobase_ptr = iobase_array + i;
0621             break;
0622         }
0623     }
0624 
0625     if (iores)
0626         rsp_size = crb_fixup_cmd_size(dev, iores, rsp_pa, rsp_size);
0627 
0628     if (cmd_pa != rsp_pa) {
0629         priv->rsp = crb_map_res(dev, iores, iobase_ptr,
0630                     rsp_pa, rsp_size);
0631         ret = PTR_ERR_OR_ZERO(priv->rsp);
0632         goto out;
0633     }
0634 
0635     /* According to the PTP specification, overlapping command and response
0636      * buffer sizes must be identical.
0637      */
0638     if (cmd_size != rsp_size) {
0639         dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
0640         ret = -EINVAL;
0641         goto out;
0642     }
0643 
0644     priv->rsp = priv->cmd;
0645 
0646 out:
0647     if (!ret)
0648         priv->cmd_size = cmd_size;
0649 
0650     __crb_go_idle(dev, priv);
0651 
0652 out_relinquish_locality:
0653 
0654     __crb_relinquish_locality(dev, priv, 0);
0655 
0656     return ret;
0657 }
0658 
0659 static int crb_acpi_add(struct acpi_device *device)
0660 {
0661     struct acpi_table_tpm2 *buf;
0662     struct crb_priv *priv;
0663     struct tpm_chip *chip;
0664     struct device *dev = &device->dev;
0665     struct tpm2_crb_smc *crb_smc;
0666     acpi_status status;
0667     u32 sm;
0668     int rc;
0669 
0670     status = acpi_get_table(ACPI_SIG_TPM2, 1,
0671                 (struct acpi_table_header **) &buf);
0672     if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
0673         dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
0674         return -EINVAL;
0675     }
0676 
0677     /* Should the FIFO driver handle this? */
0678     sm = buf->start_method;
0679     if (sm == ACPI_TPM2_MEMORY_MAPPED)
0680         return -ENODEV;
0681 
0682     priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
0683     if (!priv)
0684         return -ENOMEM;
0685 
0686     if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC) {
0687         if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) {
0688             dev_err(dev,
0689                 FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
0690                 buf->header.length,
0691                 ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC);
0692             return -EINVAL;
0693         }
0694         crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf));
0695         priv->smc_func_id = crb_smc->smc_func_id;
0696     }
0697 
0698     priv->sm = sm;
0699     priv->hid = acpi_device_hid(device);
0700 
0701     rc = crb_map_io(device, priv, buf);
0702     if (rc)
0703         return rc;
0704 
0705     chip = tpmm_chip_alloc(dev, &tpm_crb);
0706     if (IS_ERR(chip))
0707         return PTR_ERR(chip);
0708 
0709     dev_set_drvdata(&chip->dev, priv);
0710     chip->acpi_dev_handle = device->handle;
0711     chip->flags = TPM_CHIP_FLAG_TPM2;
0712 
0713     return tpm_chip_register(chip);
0714 }
0715 
0716 static int crb_acpi_remove(struct acpi_device *device)
0717 {
0718     struct device *dev = &device->dev;
0719     struct tpm_chip *chip = dev_get_drvdata(dev);
0720 
0721     tpm_chip_unregister(chip);
0722 
0723     return 0;
0724 }
0725 
0726 static const struct dev_pm_ops crb_pm = {
0727     SET_SYSTEM_SLEEP_PM_OPS(tpm_pm_suspend, tpm_pm_resume)
0728 };
0729 
0730 static const struct acpi_device_id crb_device_ids[] = {
0731     {"MSFT0101", 0},
0732     {"", 0},
0733 };
0734 MODULE_DEVICE_TABLE(acpi, crb_device_ids);
0735 
0736 static struct acpi_driver crb_acpi_driver = {
0737     .name = "tpm_crb",
0738     .ids = crb_device_ids,
0739     .ops = {
0740         .add = crb_acpi_add,
0741         .remove = crb_acpi_remove,
0742     },
0743     .drv = {
0744         .pm = &crb_pm,
0745     },
0746 };
0747 
0748 module_acpi_driver(crb_acpi_driver);
0749 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
0750 MODULE_DESCRIPTION("TPM2 Driver");
0751 MODULE_VERSION("0.1");
0752 MODULE_LICENSE("GPL");
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