char/pcmcia/synclink_cs.c

0001 /*
0002  * linux/drivers/char/pcmcia/synclink_cs.c
0003  *
0004  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
0005  *
0006  * Device driver for Microgate SyncLink PC Card
0007  * multiprotocol serial adapter.
0008  *
0009  * written by Paul Fulghum for Microgate Corporation
0010  * paulkf@microgate.com
0011  *
0012  * Microgate and SyncLink are trademarks of Microgate Corporation
0013  *
0014  * This code is released under the GNU General Public License (GPL)
0015  *
0016  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
0017  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
0018  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0019  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
0020  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0021  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
0022  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0023  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
0024  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0025  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
0026  * OF THE POSSIBILITY OF SUCH DAMAGE.
0027  */
0028
0029 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
0030 #if defined(__i386__)
0031 #  define BREAKPOINT() asm("   int $3");
0032 #else
0033 #  define BREAKPOINT() { }
0034 #endif
0035
0036 #define MAX_DEVICE_COUNT 4
0037
0038 #include <linux/module.h>
0039 #include <linux/errno.h>
0040 #include <linux/signal.h>
0041 #include <linux/sched.h>
0042 #include <linux/timer.h>
0043 #include <linux/time.h>
0044 #include <linux/interrupt.h>
0045 #include <linux/tty.h>
0046 #include <linux/tty_flip.h>
0047 #include <linux/serial.h>
0048 #include <linux/major.h>
0049 #include <linux/string.h>
0050 #include <linux/fcntl.h>
0051 #include <linux/ptrace.h>
0052 #include <linux/ioport.h>
0053 #include <linux/mm.h>
0054 #include <linux/seq_file.h>
0055 #include <linux/slab.h>
0056 #include <linux/netdevice.h>
0057 #include <linux/vmalloc.h>
0058 #include <linux/init.h>
0059 #include <linux/delay.h>
0060 #include <linux/ioctl.h>
0061 #include <linux/synclink.h>
0062
0063 #include <asm/io.h>
0064 #include <asm/irq.h>
0065 #include <asm/dma.h>
0066 #include <linux/bitops.h>
0067 #include <asm/types.h>
0068 #include <linux/termios.h>
0069 #include <linux/workqueue.h>
0070 #include <linux/hdlc.h>
0071
0072 #include <pcmcia/cistpl.h>
0073 #include <pcmcia/cisreg.h>
0074 #include <pcmcia/ds.h>
0075
0076 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
0077 #define SYNCLINK_GENERIC_HDLC 1
0078 #else
0079 #define SYNCLINK_GENERIC_HDLC 0
0080 #endif
0081
0082 #define GET_USER(error,value,addr) error = get_user(value,addr)
0083 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
0084 #define PUT_USER(error,value,addr) error = put_user(value,addr)
0085 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
0086
0087 #include <linux/uaccess.h>
0088
0089 static MGSL_PARAMS default_params = {
0090     MGSL_MODE_HDLC,         /* unsigned long mode */
0091     0,              /* unsigned char loopback; */
0092     HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
0093     HDLC_ENCODING_NRZI_SPACE,   /* unsigned char encoding; */
0094     0,              /* unsigned long clock_speed; */
0095     0xff,               /* unsigned char addr_filter; */
0096     HDLC_CRC_16_CCITT,      /* unsigned short crc_type; */
0097     HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
0098     HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
0099     9600,               /* unsigned long data_rate; */
0100     8,              /* unsigned char data_bits; */
0101     1,              /* unsigned char stop_bits; */
0102     ASYNC_PARITY_NONE       /* unsigned char parity; */
0103 };
0104
0105 typedef struct {
0106     int count;
0107     unsigned char status;
0108     char data[1];
0109 } RXBUF;
0110
0111 /* The queue of BH actions to be performed */
0112
0113 #define BH_RECEIVE  1
0114 #define BH_TRANSMIT 2
0115 #define BH_STATUS   4
0116
0117 #define IO_PIN_SHUTDOWN_LIMIT 100
0118
0119 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
0120
0121 struct _input_signal_events {
0122     int ri_up;
0123     int ri_down;
0124     int dsr_up;
0125     int dsr_down;
0126     int dcd_up;
0127     int dcd_down;
0128     int cts_up;
0129     int cts_down;
0130 };
0131
0132
0133 /*
0134  * Device instance data structure
0135  */
0136
0137 typedef struct _mgslpc_info {
0138     struct tty_port     port;
0139     void *if_ptr;   /* General purpose pointer (used by SPPP) */
0140     int         magic;
0141     int         line;
0142
0143     struct mgsl_icount  icount;
0144
0145     int         timeout;
0146     int         x_char;     /* xon/xoff character */
0147     unsigned char       read_status_mask;
0148     unsigned char       ignore_status_mask;
0149
0150     unsigned char *tx_buf;
0151     int            tx_put;
0152     int            tx_get;
0153     int            tx_count;
0154
0155     /* circular list of fixed length rx buffers */
0156
0157     unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
0158     int            rx_buf_total_size; /* size of memory allocated for rx buffers */
0159     int            rx_put;         /* index of next empty rx buffer */
0160     int            rx_get;         /* index of next full rx buffer */
0161     int            rx_buf_size;    /* size in bytes of single rx buffer */
0162     int            rx_buf_count;   /* total number of rx buffers */
0163     int            rx_frame_count; /* number of full rx buffers */
0164
0165     wait_queue_head_t   status_event_wait_q;
0166     wait_queue_head_t   event_wait_q;
0167     struct timer_list   tx_timer;   /* HDLC transmit timeout timer */
0168     struct _mgslpc_info *next_device;   /* device list link */
0169
0170     unsigned short imra_value;
0171     unsigned short imrb_value;
0172     unsigned char  pim_value;
0173
0174     spinlock_t lock;
0175     struct work_struct task;        /* task structure for scheduling bh */
0176
0177     u32 max_frame_size;
0178
0179     u32 pending_bh;
0180
0181     bool bh_running;
0182     bool bh_requested;
0183
0184     int dcd_chkcount; /* check counts to prevent */
0185     int cts_chkcount; /* too many IRQs if a signal */
0186     int dsr_chkcount; /* is floating */
0187     int ri_chkcount;
0188
0189     bool rx_enabled;
0190     bool rx_overflow;
0191
0192     bool tx_enabled;
0193     bool tx_active;
0194     bool tx_aborting;
0195     u32 idle_mode;
0196
0197     int if_mode; /* serial interface selection (RS-232, v.35 etc) */
0198
0199     char device_name[25];       /* device instance name */
0200
0201     unsigned int io_base;   /* base I/O address of adapter */
0202     unsigned int irq_level;
0203
0204     MGSL_PARAMS params;     /* communications parameters */
0205
0206     unsigned char serial_signals;   /* current serial signal states */
0207
0208     bool irq_occurred;      /* for diagnostics use */
0209     char testing_irq;
0210     unsigned int init_error;    /* startup error (DIAGS)    */
0211
0212     char *flag_buf;
0213     bool drop_rts_on_tx_done;
0214
0215     struct  _input_signal_events    input_signal_events;
0216
0217     /* PCMCIA support */
0218     struct pcmcia_device    *p_dev;
0219     int           stop;
0220
0221     /* SPPP/Cisco HDLC device parts */
0222     int netcount;
0223     spinlock_t netlock;
0224
0225 #if SYNCLINK_GENERIC_HDLC
0226     struct net_device *netdev;
0227 #endif
0228
0229 } MGSLPC_INFO;
0230
0231 #define MGSLPC_MAGIC 0x5402
0232
0233 /*
0234  * The size of the serial xmit buffer is 1 page, or 4096 bytes
0235  */
0236 #define TXBUFSIZE 4096
0237
0238
0239 #define CHA     0x00   /* channel A offset */
0240 #define CHB     0x40   /* channel B offset */
0241
0242 /*
0243  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
0244  */
0245 #undef PVR
0246
0247 #define RXFIFO  0
0248 #define TXFIFO  0
0249 #define STAR    0x20
0250 #define CMDR    0x20
0251 #define RSTA    0x21
0252 #define PRE     0x21
0253 #define MODE    0x22
0254 #define TIMR    0x23
0255 #define XAD1    0x24
0256 #define XAD2    0x25
0257 #define RAH1    0x26
0258 #define RAH2    0x27
0259 #define DAFO    0x27
0260 #define RAL1    0x28
0261 #define RFC     0x28
0262 #define RHCR    0x29
0263 #define RAL2    0x29
0264 #define RBCL    0x2a
0265 #define XBCL    0x2a
0266 #define RBCH    0x2b
0267 #define XBCH    0x2b
0268 #define CCR0    0x2c
0269 #define CCR1    0x2d
0270 #define CCR2    0x2e
0271 #define CCR3    0x2f
0272 #define VSTR    0x34
0273 #define BGR     0x34
0274 #define RLCR    0x35
0275 #define AML     0x36
0276 #define AMH     0x37
0277 #define GIS     0x38
0278 #define IVA     0x38
0279 #define IPC     0x39
0280 #define ISR     0x3a
0281 #define IMR     0x3a
0282 #define PVR     0x3c
0283 #define PIS     0x3d
0284 #define PIM     0x3d
0285 #define PCR     0x3e
0286 #define CCR4    0x3f
0287
0288 // IMR/ISR
0289
0290 #define IRQ_BREAK_ON    BIT15   // rx break detected
0291 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
0292 #define IRQ_ALLSENT     BIT13   // all sent
0293 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
0294 #define IRQ_TIMER       BIT11   // timer interrupt
0295 #define IRQ_CTS         BIT10   // CTS status change
0296 #define IRQ_TXREPEAT    BIT9    // tx message repeat
0297 #define IRQ_TXFIFO      BIT8    // transmit pool ready
0298 #define IRQ_RXEOM       BIT7    // receive message end
0299 #define IRQ_EXITHUNT    BIT6    // receive frame start
0300 #define IRQ_RXTIME      BIT6    // rx char timeout
0301 #define IRQ_DCD         BIT2    // carrier detect status change
0302 #define IRQ_OVERRUN     BIT1    // receive frame overflow
0303 #define IRQ_RXFIFO      BIT0    // receive pool full
0304
0305 // STAR
0306
0307 #define XFW   BIT6      // transmit FIFO write enable
0308 #define CEC   BIT2      // command executing
0309 #define CTS   BIT1      // CTS state
0310
0311 #define PVR_DTR      BIT0
0312 #define PVR_DSR      BIT1
0313 #define PVR_RI       BIT2
0314 #define PVR_AUTOCTS  BIT3
0315 #define PVR_RS232    0x20   /* 0010b */
0316 #define PVR_V35      0xe0   /* 1110b */
0317 #define PVR_RS422    0x40   /* 0100b */
0318
0319 /* Register access functions */
0320
0321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
0322 #define read_reg(info, reg) inb((info)->io_base + (reg))
0323
0324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
0325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
0326
0327 #define set_reg_bits(info, reg, mask) \
0328     write_reg(info, (reg), \
0329          (unsigned char) (read_reg(info, (reg)) | (mask)))
0330 #define clear_reg_bits(info, reg, mask) \
0331     write_reg(info, (reg), \
0332          (unsigned char) (read_reg(info, (reg)) & ~(mask)))
0333 /*
0334  * interrupt enable/disable routines
0335  */
0336 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
0337 {
0338     if (channel == CHA) {
0339         info->imra_value |= mask;
0340         write_reg16(info, CHA + IMR, info->imra_value);
0341     } else {
0342         info->imrb_value |= mask;
0343         write_reg16(info, CHB + IMR, info->imrb_value);
0344     }
0345 }
0346 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
0347 {
0348     if (channel == CHA) {
0349         info->imra_value &= ~mask;
0350         write_reg16(info, CHA + IMR, info->imra_value);
0351     } else {
0352         info->imrb_value &= ~mask;
0353         write_reg16(info, CHB + IMR, info->imrb_value);
0354     }
0355 }
0356
0357 #define port_irq_disable(info, mask) \
0358     { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
0359
0360 #define port_irq_enable(info, mask) \
0361     { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
0362
0363 static void rx_start(MGSLPC_INFO *info);
0364 static void rx_stop(MGSLPC_INFO *info);
0365
0366 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
0367 static void tx_stop(MGSLPC_INFO *info);
0368 static void tx_set_idle(MGSLPC_INFO *info);
0369
0370 static void get_signals(MGSLPC_INFO *info);
0371 static void set_signals(MGSLPC_INFO *info);
0372
0373 static void reset_device(MGSLPC_INFO *info);
0374
0375 static void hdlc_mode(MGSLPC_INFO *info);
0376 static void async_mode(MGSLPC_INFO *info);
0377
0378 static void tx_timeout(struct timer_list *t);
0379
0380 static int carrier_raised(struct tty_port *port);
0381 static void dtr_rts(struct tty_port *port, int onoff);
0382
0383 #if SYNCLINK_GENERIC_HDLC
0384 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
0385 static void hdlcdev_tx_done(MGSLPC_INFO *info);
0386 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
0387 static int  hdlcdev_init(MGSLPC_INFO *info);
0388 static void hdlcdev_exit(MGSLPC_INFO *info);
0389 #endif
0390
0391 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
0392
0393 static bool register_test(MGSLPC_INFO *info);
0394 static bool irq_test(MGSLPC_INFO *info);
0395 static int adapter_test(MGSLPC_INFO *info);
0396
0397 static int claim_resources(MGSLPC_INFO *info);
0398 static void release_resources(MGSLPC_INFO *info);
0399 static int mgslpc_add_device(MGSLPC_INFO *info);
0400 static void mgslpc_remove_device(MGSLPC_INFO *info);
0401
0402 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
0403 static void rx_reset_buffers(MGSLPC_INFO *info);
0404 static int  rx_alloc_buffers(MGSLPC_INFO *info);
0405 static void rx_free_buffers(MGSLPC_INFO *info);
0406
0407 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
0408
0409 /*
0410  * Bottom half interrupt handlers
0411  */
0412 static void bh_handler(struct work_struct *work);
0413 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
0414 static void bh_status(MGSLPC_INFO *info);
0415
0416 /*
0417  * ioctl handlers
0418  */
0419 static int tiocmget(struct tty_struct *tty);
0420 static int tiocmset(struct tty_struct *tty,
0421                     unsigned int set, unsigned int clear);
0422 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
0423 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
0424 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
0425 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
0426 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
0427 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
0428 static int tx_abort(MGSLPC_INFO *info);
0429 static int set_rxenable(MGSLPC_INFO *info, int enable);
0430 static int wait_events(MGSLPC_INFO *info, int __user *mask);
0431
0432 static MGSLPC_INFO *mgslpc_device_list = NULL;
0433 static int mgslpc_device_count = 0;
0434
0435 /*
0436  * Set this param to non-zero to load eax with the
0437  * .text section address and breakpoint on module load.
0438  * This is useful for use with gdb and add-symbol-file command.
0439  */
0440 static bool break_on_load;
0441
0442 /*
0443  * Driver major number, defaults to zero to get auto
0444  * assigned major number. May be forced as module parameter.
0445  */
0446 static int ttymajor=0;
0447
0448 static int debug_level = 0;
0449 static int maxframe[MAX_DEVICE_COUNT] = {0,};
0450
0451 module_param(break_on_load, bool, 0);
0452 module_param(ttymajor, int, 0);
0453 module_param(debug_level, int, 0);
0454 module_param_array(maxframe, int, NULL, 0);
0455
0456 MODULE_LICENSE("GPL");
0457
0458 static char *driver_name = "SyncLink PC Card driver";
0459 static char *driver_version = "$Revision: 4.34 $";
0460
0461 static struct tty_driver *serial_driver;
0462
0463 /* number of characters left in xmit buffer before we ask for more */
0464 #define WAKEUP_CHARS 256
0465
0466 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
0467 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
0468
0469 /* PCMCIA prototypes */
0470
0471 static int mgslpc_config(struct pcmcia_device *link);
0472 static void mgslpc_release(u_long arg);
0473 static void mgslpc_detach(struct pcmcia_device *p_dev);
0474
0475 /*
0476  * 1st function defined in .text section. Calling this function in
0477  * init_module() followed by a breakpoint allows a remote debugger
0478  * (gdb) to get the .text address for the add-symbol-file command.
0479  * This allows remote debugging of dynamically loadable modules.
0480  */
0481 static void* mgslpc_get_text_ptr(void)
0482 {
0483     return mgslpc_get_text_ptr;
0484 }
0485
0486 /**
0487  * line discipline callback wrappers
0488  *
0489  * The wrappers maintain line discipline references
0490  * while calling into the line discipline.
0491  *
0492  * ldisc_receive_buf  - pass receive data to line discipline
0493  */
0494
0495 static void ldisc_receive_buf(struct tty_struct *tty,
0496                   const __u8 *data, char *flags, int count)
0497 {
0498     struct tty_ldisc *ld;
0499     if (!tty)
0500         return;
0501     ld = tty_ldisc_ref(tty);
0502     if (ld) {
0503         if (ld->ops->receive_buf)
0504             ld->ops->receive_buf(tty, data, flags, count);
0505         tty_ldisc_deref(ld);
0506     }
0507 }
0508
0509 static const struct tty_port_operations mgslpc_port_ops = {
0510     .carrier_raised = carrier_raised,
0511     .dtr_rts = dtr_rts
0512 };
0513
0514 static int mgslpc_probe(struct pcmcia_device *link)
0515 {
0516     MGSLPC_INFO *info;
0517     int ret;
0518
0519     if (debug_level >= DEBUG_LEVEL_INFO)
0520         printk("mgslpc_attach\n");
0521
0522     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
0523     if (!info) {
0524         printk("Error can't allocate device instance data\n");
0525         return -ENOMEM;
0526     }
0527
0528     info->magic = MGSLPC_MAGIC;
0529     tty_port_init(&info->port);
0530     info->port.ops = &mgslpc_port_ops;
0531     INIT_WORK(&info->task, bh_handler);
0532     info->max_frame_size = 4096;
0533     init_waitqueue_head(&info->status_event_wait_q);
0534     init_waitqueue_head(&info->event_wait_q);
0535     spin_lock_init(&info->lock);
0536     spin_lock_init(&info->netlock);
0537     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
0538     info->idle_mode = HDLC_TXIDLE_FLAGS;
0539     info->imra_value = 0xffff;
0540     info->imrb_value = 0xffff;
0541     info->pim_value = 0xff;
0542
0543     info->p_dev = link;
0544     link->priv = info;
0545
0546     /* Initialize the struct pcmcia_device structure */
0547
0548     ret = mgslpc_config(link);
0549     if (ret != 0)
0550         goto failed;
0551
0552     ret = mgslpc_add_device(info);
0553     if (ret != 0)
0554         goto failed_release;
0555
0556     return 0;
0557
0558 failed_release:
0559     mgslpc_release((u_long)link);
0560 failed:
0561     tty_port_destroy(&info->port);
0562     kfree(info);
0563     return ret;
0564 }
0565
0566 /* Card has been inserted.
0567  */
0568
0569 static int mgslpc_ioprobe(struct pcmcia_device *p_dev, void *priv_data)
0570 {
0571     return pcmcia_request_io(p_dev);
0572 }
0573
0574 static int mgslpc_config(struct pcmcia_device *link)
0575 {
0576     MGSLPC_INFO *info = link->priv;
0577     int ret;
0578
0579     if (debug_level >= DEBUG_LEVEL_INFO)
0580         printk("mgslpc_config(0x%p)\n", link);
0581
0582     link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
0583
0584     ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
0585     if (ret != 0)
0586         goto failed;
0587
0588     link->config_index = 8;
0589     link->config_regs = PRESENT_OPTION;
0590
0591     ret = pcmcia_request_irq(link, mgslpc_isr);
0592     if (ret)
0593         goto failed;
0594     ret = pcmcia_enable_device(link);
0595     if (ret)
0596         goto failed;
0597
0598     info->io_base = link->resource[0]->start;
0599     info->irq_level = link->irq;
0600     return 0;
0601
0602 failed:
0603     mgslpc_release((u_long)link);
0604     return -ENODEV;
0605 }
0606
0607 /* Card has been removed.
0608  * Unregister device and release PCMCIA configuration.
0609  * If device is open, postpone until it is closed.
0610  */
0611 static void mgslpc_release(u_long arg)
0612 {
0613     struct pcmcia_device *link = (struct pcmcia_device *)arg;
0614
0615     if (debug_level >= DEBUG_LEVEL_INFO)
0616         printk("mgslpc_release(0x%p)\n", link);
0617
0618     pcmcia_disable_device(link);
0619 }
0620
0621 static void mgslpc_detach(struct pcmcia_device *link)
0622 {
0623     if (debug_level >= DEBUG_LEVEL_INFO)
0624         printk("mgslpc_detach(0x%p)\n", link);
0625
0626     ((MGSLPC_INFO *)link->priv)->stop = 1;
0627     mgslpc_release((u_long)link);
0628
0629     mgslpc_remove_device((MGSLPC_INFO *)link->priv);
0630 }
0631
0632 static int mgslpc_suspend(struct pcmcia_device *link)
0633 {
0634     MGSLPC_INFO *info = link->priv;
0635
0636     info->stop = 1;
0637
0638     return 0;
0639 }
0640
0641 static int mgslpc_resume(struct pcmcia_device *link)
0642 {
0643     MGSLPC_INFO *info = link->priv;
0644
0645     info->stop = 0;
0646
0647     return 0;
0648 }
0649
0650
0651 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
0652                     char *name, const char *routine)
0653 {
0654 #ifdef MGSLPC_PARANOIA_CHECK
0655     static const char *badmagic =
0656         "Warning: bad magic number for mgsl struct (%s) in %s\n";
0657     static const char *badinfo =
0658         "Warning: null mgslpc_info for (%s) in %s\n";
0659
0660     if (!info) {
0661         printk(badinfo, name, routine);
0662         return true;
0663     }
0664     if (info->magic != MGSLPC_MAGIC) {
0665         printk(badmagic, name, routine);
0666         return true;
0667     }
0668 #else
0669     if (!info)
0670         return true;
0671 #endif
0672     return false;
0673 }
0674
0675
0676 #define CMD_RXFIFO      BIT7    // release current rx FIFO
0677 #define CMD_RXRESET     BIT6    // receiver reset
0678 #define CMD_RXFIFO_READ BIT5
0679 #define CMD_START_TIMER BIT4
0680 #define CMD_TXFIFO      BIT3    // release current tx FIFO
0681 #define CMD_TXEOM       BIT1    // transmit end message
0682 #define CMD_TXRESET     BIT0    // transmit reset
0683
0684 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
0685 {
0686     int i = 0;
0687     /* wait for command completion */
0688     while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
0689         udelay(1);
0690         if (i++ == 1000)
0691             return false;
0692     }
0693     return true;
0694 }
0695
0696 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
0697 {
0698     wait_command_complete(info, channel);
0699     write_reg(info, (unsigned char) (channel + CMDR), cmd);
0700 }
0701
0702 static void tx_pause(struct tty_struct *tty)
0703 {
0704     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
0705     unsigned long flags;
0706
0707     if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
0708         return;
0709     if (debug_level >= DEBUG_LEVEL_INFO)
0710         printk("tx_pause(%s)\n", info->device_name);
0711
0712     spin_lock_irqsave(&info->lock, flags);
0713     if (info->tx_enabled)
0714         tx_stop(info);
0715     spin_unlock_irqrestore(&info->lock, flags);
0716 }
0717
0718 static void tx_release(struct tty_struct *tty)
0719 {
0720     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
0721     unsigned long flags;
0722
0723     if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
0724         return;
0725     if (debug_level >= DEBUG_LEVEL_INFO)
0726         printk("tx_release(%s)\n", info->device_name);
0727
0728     spin_lock_irqsave(&info->lock, flags);
0729     if (!info->tx_enabled)
0730         tx_start(info, tty);
0731     spin_unlock_irqrestore(&info->lock, flags);
0732 }
0733
0734 /* Return next bottom half action to perform.
0735  * or 0 if nothing to do.
0736  */
0737 static int bh_action(MGSLPC_INFO *info)
0738 {
0739     unsigned long flags;
0740     int rc = 0;
0741
0742     spin_lock_irqsave(&info->lock, flags);
0743
0744     if (info->pending_bh & BH_RECEIVE) {
0745         info->pending_bh &= ~BH_RECEIVE;
0746         rc = BH_RECEIVE;
0747     } else if (info->pending_bh & BH_TRANSMIT) {
0748         info->pending_bh &= ~BH_TRANSMIT;
0749         rc = BH_TRANSMIT;
0750     } else if (info->pending_bh & BH_STATUS) {
0751         info->pending_bh &= ~BH_STATUS;
0752         rc = BH_STATUS;
0753     }
0754
0755     if (!rc) {
0756         /* Mark BH routine as complete */
0757         info->bh_running = false;
0758         info->bh_requested = false;
0759     }
0760
0761     spin_unlock_irqrestore(&info->lock, flags);
0762
0763     return rc;
0764 }
0765
0766 static void bh_handler(struct work_struct *work)
0767 {
0768     MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
0769     struct tty_struct *tty;
0770     int action;
0771
0772     if (debug_level >= DEBUG_LEVEL_BH)
0773         printk("%s(%d):bh_handler(%s) entry\n",
0774             __FILE__,__LINE__,info->device_name);
0775
0776     info->bh_running = true;
0777     tty = tty_port_tty_get(&info->port);
0778
0779     while((action = bh_action(info)) != 0) {
0780
0781         /* Process work item */
0782         if (debug_level >= DEBUG_LEVEL_BH)
0783             printk("%s(%d):bh_handler() work item action=%d\n",
0784                 __FILE__,__LINE__,action);
0785
0786         switch (action) {
0787
0788         case BH_RECEIVE:
0789             while(rx_get_frame(info, tty));
0790             break;
0791         case BH_TRANSMIT:
0792             bh_transmit(info, tty);
0793             break;
0794         case BH_STATUS:
0795             bh_status(info);
0796             break;
0797         default:
0798             /* unknown work item ID */
0799             printk("Unknown work item ID=%08X!\n", action);
0800             break;
0801         }
0802     }
0803
0804     tty_kref_put(tty);
0805     if (debug_level >= DEBUG_LEVEL_BH)
0806         printk("%s(%d):bh_handler(%s) exit\n",
0807             __FILE__,__LINE__,info->device_name);
0808 }
0809
0810 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
0811 {
0812     if (debug_level >= DEBUG_LEVEL_BH)
0813         printk("bh_transmit() entry on %s\n", info->device_name);
0814
0815     if (tty)
0816         tty_wakeup(tty);
0817 }
0818
0819 static void bh_status(MGSLPC_INFO *info)
0820 {
0821     info->ri_chkcount = 0;
0822     info->dsr_chkcount = 0;
0823     info->dcd_chkcount = 0;
0824     info->cts_chkcount = 0;
0825 }
0826
0827 /* eom: non-zero = end of frame */
0828 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
0829 {
0830     unsigned char data[2];
0831     unsigned char fifo_count, read_count, i;
0832     RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
0833
0834     if (debug_level >= DEBUG_LEVEL_ISR)
0835         printk("%s(%d):rx_ready_hdlc(eom=%d)\n", __FILE__, __LINE__, eom);
0836
0837     if (!info->rx_enabled)
0838         return;
0839
0840     if (info->rx_frame_count >= info->rx_buf_count) {
0841         /* no more free buffers */
0842         issue_command(info, CHA, CMD_RXRESET);
0843         info->pending_bh |= BH_RECEIVE;
0844         info->rx_overflow = true;
0845         info->icount.buf_overrun++;
0846         return;
0847     }
0848
0849     if (eom) {
0850         /* end of frame, get FIFO count from RBCL register */
0851         fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
0852         if (fifo_count == 0)
0853             fifo_count = 32;
0854     } else
0855         fifo_count = 32;
0856
0857     do {
0858         if (fifo_count == 1) {
0859             read_count = 1;
0860             data[0] = read_reg(info, CHA + RXFIFO);
0861         } else {
0862             read_count = 2;
0863             *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
0864         }
0865         fifo_count -= read_count;
0866         if (!fifo_count && eom)
0867             buf->status = data[--read_count];
0868
0869         for (i = 0; i < read_count; i++) {
0870             if (buf->count >= info->max_frame_size) {
0871                 /* frame too large, reset receiver and reset current buffer */
0872                 issue_command(info, CHA, CMD_RXRESET);
0873                 buf->count = 0;
0874                 return;
0875             }
0876             *(buf->data + buf->count) = data[i];
0877             buf->count++;
0878         }
0879     } while (fifo_count);
0880
0881     if (eom) {
0882         info->pending_bh |= BH_RECEIVE;
0883         info->rx_frame_count++;
0884         info->rx_put++;
0885         if (info->rx_put >= info->rx_buf_count)
0886             info->rx_put = 0;
0887     }
0888     issue_command(info, CHA, CMD_RXFIFO);
0889 }
0890
0891 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
0892 {
0893     struct tty_port *port = &info->port;
0894     unsigned char data, status, flag;
0895     int fifo_count;
0896     int work = 0;
0897     struct mgsl_icount *icount = &info->icount;
0898
0899     if (tcd) {
0900         /* early termination, get FIFO count from RBCL register */
0901         fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
0902
0903         /* Zero fifo count could mean 0 or 32 bytes available.
0904          * If BIT5 of STAR is set then at least 1 byte is available.
0905          */
0906         if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
0907             fifo_count = 32;
0908     } else
0909         fifo_count = 32;
0910
0911     tty_buffer_request_room(port, fifo_count);
0912     /* Flush received async data to receive data buffer. */
0913     while (fifo_count) {
0914         data   = read_reg(info, CHA + RXFIFO);
0915         status = read_reg(info, CHA + RXFIFO);
0916         fifo_count -= 2;
0917
0918         icount->rx++;
0919         flag = TTY_NORMAL;
0920
0921         // if no frameing/crc error then save data
0922         // BIT7:parity error
0923         // BIT6:framing error
0924
0925         if (status & (BIT7 | BIT6)) {
0926             if (status & BIT7)
0927                 icount->parity++;
0928             else
0929                 icount->frame++;
0930
0931             /* discard char if tty control flags say so */
0932             if (status & info->ignore_status_mask)
0933                 continue;
0934
0935             status &= info->read_status_mask;
0936
0937             if (status & BIT7)
0938                 flag = TTY_PARITY;
0939             else if (status & BIT6)
0940                 flag = TTY_FRAME;
0941         }
0942         work += tty_insert_flip_char(port, data, flag);
0943     }
0944     issue_command(info, CHA, CMD_RXFIFO);
0945
0946     if (debug_level >= DEBUG_LEVEL_ISR) {
0947         printk("%s(%d):rx_ready_async",
0948             __FILE__,__LINE__);
0949         printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
0950             __FILE__,__LINE__,icount->rx,icount->brk,
0951             icount->parity,icount->frame,icount->overrun);
0952     }
0953
0954     if (work)
0955         tty_flip_buffer_push(port);
0956 }
0957
0958
0959 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
0960 {
0961     if (!info->tx_active)
0962         return;
0963
0964     info->tx_active = false;
0965     info->tx_aborting = false;
0966
0967     if (info->params.mode == MGSL_MODE_ASYNC)
0968         return;
0969
0970     info->tx_count = info->tx_put = info->tx_get = 0;
0971     del_timer(&info->tx_timer);
0972
0973     if (info->drop_rts_on_tx_done) {
0974         get_signals(info);
0975         if (info->serial_signals & SerialSignal_RTS) {
0976             info->serial_signals &= ~SerialSignal_RTS;
0977             set_signals(info);
0978         }
0979         info->drop_rts_on_tx_done = false;
0980     }
0981
0982 #if SYNCLINK_GENERIC_HDLC
0983     if (info->netcount)
0984         hdlcdev_tx_done(info);
0985     else
0986 #endif
0987     {
0988         if (tty && (tty->flow.stopped || tty->hw_stopped)) {
0989             tx_stop(info);
0990             return;
0991         }
0992         info->pending_bh |= BH_TRANSMIT;
0993     }
0994 }
0995
0996 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
0997 {
0998     unsigned char fifo_count = 32;
0999     int c;
1000
1001     if (debug_level >= DEBUG_LEVEL_ISR)
1002         printk("%s(%d):tx_ready(%s)\n", __FILE__, __LINE__, info->device_name);
1003
1004     if (info->params.mode == MGSL_MODE_HDLC) {
1005         if (!info->tx_active)
1006             return;
1007     } else {
1008         if (tty && (tty->flow.stopped || tty->hw_stopped)) {
1009             tx_stop(info);
1010             return;
1011         }
1012         if (!info->tx_count)
1013             info->tx_active = false;
1014     }
1015
1016     if (!info->tx_count)
1017         return;
1018
1019     while (info->tx_count && fifo_count) {
1020         c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1021
1022         if (c == 1) {
1023             write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1024         } else {
1025             write_reg16(info, CHA + TXFIFO,
1026                       *((unsigned short*)(info->tx_buf + info->tx_get)));
1027         }
1028         info->tx_count -= c;
1029         info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1030         fifo_count -= c;
1031     }
1032
1033     if (info->params.mode == MGSL_MODE_ASYNC) {
1034         if (info->tx_count < WAKEUP_CHARS)
1035             info->pending_bh |= BH_TRANSMIT;
1036         issue_command(info, CHA, CMD_TXFIFO);
1037     } else {
1038         if (info->tx_count)
1039             issue_command(info, CHA, CMD_TXFIFO);
1040         else
1041             issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1042     }
1043 }
1044
1045 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1046 {
1047     get_signals(info);
1048     if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1049         irq_disable(info, CHB, IRQ_CTS);
1050     info->icount.cts++;
1051     if (info->serial_signals & SerialSignal_CTS)
1052         info->input_signal_events.cts_up++;
1053     else
1054         info->input_signal_events.cts_down++;
1055     wake_up_interruptible(&info->status_event_wait_q);
1056     wake_up_interruptible(&info->event_wait_q);
1057
1058     if (tty && tty_port_cts_enabled(&info->port)) {
1059         if (tty->hw_stopped) {
1060             if (info->serial_signals & SerialSignal_CTS) {
1061                 if (debug_level >= DEBUG_LEVEL_ISR)
1062                     printk("CTS tx start...");
1063                 tty->hw_stopped = 0;
1064                 tx_start(info, tty);
1065                 info->pending_bh |= BH_TRANSMIT;
1066                 return;
1067             }
1068         } else {
1069             if (!(info->serial_signals & SerialSignal_CTS)) {
1070                 if (debug_level >= DEBUG_LEVEL_ISR)
1071                     printk("CTS tx stop...");
1072                 tty->hw_stopped = 1;
1073                 tx_stop(info);
1074             }
1075         }
1076     }
1077     info->pending_bh |= BH_STATUS;
1078 }
1079
1080 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1081 {
1082     get_signals(info);
1083     if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1084         irq_disable(info, CHB, IRQ_DCD);
1085     info->icount.dcd++;
1086     if (info->serial_signals & SerialSignal_DCD) {
1087         info->input_signal_events.dcd_up++;
1088     }
1089     else
1090         info->input_signal_events.dcd_down++;
1091 #if SYNCLINK_GENERIC_HDLC
1092     if (info->netcount) {
1093         if (info->serial_signals & SerialSignal_DCD)
1094             netif_carrier_on(info->netdev);
1095         else
1096             netif_carrier_off(info->netdev);
1097     }
1098 #endif
1099     wake_up_interruptible(&info->status_event_wait_q);
1100     wake_up_interruptible(&info->event_wait_q);
1101
1102     if (tty_port_check_carrier(&info->port)) {
1103         if (debug_level >= DEBUG_LEVEL_ISR)
1104             printk("%s CD now %s...", info->device_name,
1105                    (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1106         if (info->serial_signals & SerialSignal_DCD)
1107             wake_up_interruptible(&info->port.open_wait);
1108         else {
1109             if (debug_level >= DEBUG_LEVEL_ISR)
1110                 printk("doing serial hangup...");
1111             if (tty)
1112                 tty_hangup(tty);
1113         }
1114     }
1115     info->pending_bh |= BH_STATUS;
1116 }
1117
1118 static void dsr_change(MGSLPC_INFO *info)
1119 {
1120     get_signals(info);
1121     if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1122         port_irq_disable(info, PVR_DSR);
1123     info->icount.dsr++;
1124     if (info->serial_signals & SerialSignal_DSR)
1125         info->input_signal_events.dsr_up++;
1126     else
1127         info->input_signal_events.dsr_down++;
1128     wake_up_interruptible(&info->status_event_wait_q);
1129     wake_up_interruptible(&info->event_wait_q);
1130     info->pending_bh |= BH_STATUS;
1131 }
1132
1133 static void ri_change(MGSLPC_INFO *info)
1134 {
1135     get_signals(info);
1136     if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1137         port_irq_disable(info, PVR_RI);
1138     info->icount.rng++;
1139     if (info->serial_signals & SerialSignal_RI)
1140         info->input_signal_events.ri_up++;
1141     else
1142         info->input_signal_events.ri_down++;
1143     wake_up_interruptible(&info->status_event_wait_q);
1144     wake_up_interruptible(&info->event_wait_q);
1145     info->pending_bh |= BH_STATUS;
1146 }
1147
1148 /* Interrupt service routine entry point.
1149  *
1150  * Arguments:
1151  *
1152  * irq     interrupt number that caused interrupt
1153  * dev_id  device ID supplied during interrupt registration
1154  */
1155 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1156 {
1157     MGSLPC_INFO *info = dev_id;
1158     struct tty_struct *tty;
1159     unsigned short isr;
1160     unsigned char gis, pis;
1161     int count=0;
1162
1163     if (debug_level >= DEBUG_LEVEL_ISR)
1164         printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1165
1166     if (!(info->p_dev->_locked))
1167         return IRQ_HANDLED;
1168
1169     tty = tty_port_tty_get(&info->port);
1170
1171     spin_lock(&info->lock);
1172
1173     while ((gis = read_reg(info, CHA + GIS))) {
1174         if (debug_level >= DEBUG_LEVEL_ISR)
1175             printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1176
1177         if ((gis & 0x70) || count > 1000) {
1178             printk("synclink_cs:hardware failed or ejected\n");
1179             break;
1180         }
1181         count++;
1182
1183         if (gis & (BIT1 | BIT0)) {
1184             isr = read_reg16(info, CHB + ISR);
1185             if (isr & IRQ_DCD)
1186                 dcd_change(info, tty);
1187             if (isr & IRQ_CTS)
1188                 cts_change(info, tty);
1189         }
1190         if (gis & (BIT3 | BIT2))
1191         {
1192             isr = read_reg16(info, CHA + ISR);
1193             if (isr & IRQ_TIMER) {
1194                 info->irq_occurred = true;
1195                 irq_disable(info, CHA, IRQ_TIMER);
1196             }
1197
1198             /* receive IRQs */
1199             if (isr & IRQ_EXITHUNT) {
1200                 info->icount.exithunt++;
1201                 wake_up_interruptible(&info->event_wait_q);
1202             }
1203             if (isr & IRQ_BREAK_ON) {
1204                 info->icount.brk++;
1205                 if (info->port.flags & ASYNC_SAK)
1206                     do_SAK(tty);
1207             }
1208             if (isr & IRQ_RXTIME) {
1209                 issue_command(info, CHA, CMD_RXFIFO_READ);
1210             }
1211             if (isr & (IRQ_RXEOM | IRQ_RXFIFO)) {
1212                 if (info->params.mode == MGSL_MODE_HDLC)
1213                     rx_ready_hdlc(info, isr & IRQ_RXEOM);
1214                 else
1215                     rx_ready_async(info, isr & IRQ_RXEOM);
1216             }
1217
1218             /* transmit IRQs */
1219             if (isr & IRQ_UNDERRUN) {
1220                 if (info->tx_aborting)
1221                     info->icount.txabort++;
1222                 else
1223                     info->icount.txunder++;
1224                 tx_done(info, tty);
1225             }
1226             else if (isr & IRQ_ALLSENT) {
1227                 info->icount.txok++;
1228                 tx_done(info, tty);
1229             }
1230             else if (isr & IRQ_TXFIFO)
1231                 tx_ready(info, tty);
1232         }
1233         if (gis & BIT7) {
1234             pis = read_reg(info, CHA + PIS);
1235             if (pis & BIT1)
1236                 dsr_change(info);
1237             if (pis & BIT2)
1238                 ri_change(info);
1239         }
1240     }
1241
1242     /* Request bottom half processing if there's something
1243      * for it to do and the bh is not already running
1244      */
1245
1246     if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1247         if (debug_level >= DEBUG_LEVEL_ISR)
1248             printk("%s(%d):%s queueing bh task.\n",
1249                 __FILE__,__LINE__,info->device_name);
1250         schedule_work(&info->task);
1251         info->bh_requested = true;
1252     }
1253
1254     spin_unlock(&info->lock);
1255     tty_kref_put(tty);
1256
1257     if (debug_level >= DEBUG_LEVEL_ISR)
1258         printk("%s(%d):mgslpc_isr(%d)exit.\n",
1259                __FILE__, __LINE__, info->irq_level);
1260
1261     return IRQ_HANDLED;
1262 }
1263
1264 /* Initialize and start device.
1265  */
1266 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1267 {
1268     int retval = 0;
1269
1270     if (debug_level >= DEBUG_LEVEL_INFO)
1271         printk("%s(%d):startup(%s)\n", __FILE__, __LINE__, info->device_name);
1272
1273     if (tty_port_initialized(&info->port))
1274         return 0;
1275
1276     if (!info->tx_buf) {
1277         /* allocate a page of memory for a transmit buffer */
1278         info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1279         if (!info->tx_buf) {
1280             printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1281                 __FILE__, __LINE__, info->device_name);
1282             return -ENOMEM;
1283         }
1284     }
1285
1286     info->pending_bh = 0;
1287
1288     memset(&info->icount, 0, sizeof(info->icount));
1289
1290     timer_setup(&info->tx_timer, tx_timeout, 0);
1291
1292     /* Allocate and claim adapter resources */
1293     retval = claim_resources(info);
1294
1295     /* perform existence check and diagnostics */
1296     if (!retval)
1297         retval = adapter_test(info);
1298
1299     if (retval) {
1300         if (capable(CAP_SYS_ADMIN) && tty)
1301             set_bit(TTY_IO_ERROR, &tty->flags);
1302         release_resources(info);
1303         return retval;
1304     }
1305
1306     /* program hardware for current parameters */
1307     mgslpc_change_params(info, tty);
1308
1309     if (tty)
1310         clear_bit(TTY_IO_ERROR, &tty->flags);
1311
1312     tty_port_set_initialized(&info->port, 1);
1313
1314     return 0;
1315 }
1316
1317 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1318  */
1319 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1320 {
1321     unsigned long flags;
1322
1323     if (!tty_port_initialized(&info->port))
1324         return;
1325
1326     if (debug_level >= DEBUG_LEVEL_INFO)
1327         printk("%s(%d):mgslpc_shutdown(%s)\n",
1328              __FILE__, __LINE__, info->device_name);
1329
1330     /* clear status wait queue because status changes */
1331     /* can't happen after shutting down the hardware */
1332     wake_up_interruptible(&info->status_event_wait_q);
1333     wake_up_interruptible(&info->event_wait_q);
1334
1335     del_timer_sync(&info->tx_timer);
1336
1337     if (info->tx_buf) {
1338         free_page((unsigned long) info->tx_buf);
1339         info->tx_buf = NULL;
1340     }
1341
1342     spin_lock_irqsave(&info->lock, flags);
1343
1344     rx_stop(info);
1345     tx_stop(info);
1346
1347     /* TODO:disable interrupts instead of reset to preserve signal states */
1348     reset_device(info);
1349
1350     if (!tty || C_HUPCL(tty)) {
1351         info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1352         set_signals(info);
1353     }
1354
1355     spin_unlock_irqrestore(&info->lock, flags);
1356
1357     release_resources(info);
1358
1359     if (tty)
1360         set_bit(TTY_IO_ERROR, &tty->flags);
1361
1362     tty_port_set_initialized(&info->port, 0);
1363 }
1364
1365 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1366 {
1367     unsigned long flags;
1368
1369     spin_lock_irqsave(&info->lock, flags);
1370
1371     rx_stop(info);
1372     tx_stop(info);
1373     info->tx_count = info->tx_put = info->tx_get = 0;
1374
1375     if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1376         hdlc_mode(info);
1377     else
1378         async_mode(info);
1379
1380     set_signals(info);
1381
1382     info->dcd_chkcount = 0;
1383     info->cts_chkcount = 0;
1384     info->ri_chkcount = 0;
1385     info->dsr_chkcount = 0;
1386
1387     irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1388     port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1389     get_signals(info);
1390
1391     if (info->netcount || (tty && C_CREAD(tty)))
1392         rx_start(info);
1393
1394     spin_unlock_irqrestore(&info->lock, flags);
1395 }
1396
1397 /* Reconfigure adapter based on new parameters
1398  */
1399 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1400 {
1401     unsigned cflag;
1402     int bits_per_char;
1403
1404     if (!tty)
1405         return;
1406
1407     if (debug_level >= DEBUG_LEVEL_INFO)
1408         printk("%s(%d):mgslpc_change_params(%s)\n",
1409              __FILE__, __LINE__, info->device_name);
1410
1411     cflag = tty->termios.c_cflag;
1412
1413     /* if B0 rate (hangup) specified then negate RTS and DTR */
1414     /* otherwise assert RTS and DTR */
1415     if (cflag & CBAUD)
1416         info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1417     else
1418         info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1419
1420     /* byte size and parity */
1421     if ((cflag & CSIZE) != CS8) {
1422         cflag &= ~CSIZE;
1423         cflag |= CS7;
1424         tty->termios.c_cflag = cflag;
1425     }
1426     info->params.data_bits = tty_get_char_size(cflag);
1427
1428     if (cflag & CSTOPB)
1429         info->params.stop_bits = 2;
1430     else
1431         info->params.stop_bits = 1;
1432
1433     info->params.parity = ASYNC_PARITY_NONE;
1434     if (cflag & PARENB) {
1435         if (cflag & PARODD)
1436             info->params.parity = ASYNC_PARITY_ODD;
1437         else
1438             info->params.parity = ASYNC_PARITY_EVEN;
1439         if (cflag & CMSPAR)
1440             info->params.parity = ASYNC_PARITY_SPACE;
1441     }
1442
1443     /* calculate number of jiffies to transmit a full
1444      * FIFO (32 bytes) at specified data rate
1445      */
1446     bits_per_char = info->params.data_bits +
1447             info->params.stop_bits + 1;
1448
1449     /* if port data rate is set to 460800 or less then
1450      * allow tty settings to override, otherwise keep the
1451      * current data rate.
1452      */
1453     if (info->params.data_rate <= 460800) {
1454         info->params.data_rate = tty_get_baud_rate(tty);
1455     }
1456
1457     if (info->params.data_rate) {
1458         info->timeout = (32*HZ*bits_per_char) /
1459                 info->params.data_rate;
1460     }
1461     info->timeout += HZ/50;     /* Add .02 seconds of slop */
1462
1463     tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1464     tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1465
1466     /* process tty input control flags */
1467
1468     info->read_status_mask = 0;
1469     if (I_INPCK(tty))
1470         info->read_status_mask |= BIT7 | BIT6;
1471     if (I_IGNPAR(tty))
1472         info->ignore_status_mask |= BIT7 | BIT6;
1473
1474     mgslpc_program_hw(info, tty);
1475 }
1476
1477 /* Add a character to the transmit buffer
1478  */
1479 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1480 {
1481     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1482     unsigned long flags;
1483
1484     if (debug_level >= DEBUG_LEVEL_INFO) {
1485         printk("%s(%d):mgslpc_put_char(%d) on %s\n",
1486             __FILE__, __LINE__, ch, info->device_name);
1487     }
1488
1489     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1490         return 0;
1491
1492     if (!info->tx_buf)
1493         return 0;
1494
1495     spin_lock_irqsave(&info->lock, flags);
1496
1497     if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1498         if (info->tx_count < TXBUFSIZE - 1) {
1499             info->tx_buf[info->tx_put++] = ch;
1500             info->tx_put &= TXBUFSIZE-1;
1501             info->tx_count++;
1502         }
1503     }
1504
1505     spin_unlock_irqrestore(&info->lock, flags);
1506     return 1;
1507 }
1508
1509 /* Enable transmitter so remaining characters in the
1510  * transmit buffer are sent.
1511  */
1512 static void mgslpc_flush_chars(struct tty_struct *tty)
1513 {
1514     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1515     unsigned long flags;
1516
1517     if (debug_level >= DEBUG_LEVEL_INFO)
1518         printk("%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1519             __FILE__, __LINE__, info->device_name, info->tx_count);
1520
1521     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1522         return;
1523
1524     if (info->tx_count <= 0 || tty->flow.stopped ||
1525         tty->hw_stopped || !info->tx_buf)
1526         return;
1527
1528     if (debug_level >= DEBUG_LEVEL_INFO)
1529         printk("%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1530             __FILE__, __LINE__, info->device_name);
1531
1532     spin_lock_irqsave(&info->lock, flags);
1533     if (!info->tx_active)
1534         tx_start(info, tty);
1535     spin_unlock_irqrestore(&info->lock, flags);
1536 }
1537
1538 /* Send a block of data
1539  *
1540  * Arguments:
1541  *
1542  * tty        pointer to tty information structure
1543  * buf        pointer to buffer containing send data
1544  * count      size of send data in bytes
1545  *
1546  * Returns: number of characters written
1547  */
1548 static int mgslpc_write(struct tty_struct * tty,
1549             const unsigned char *buf, int count)
1550 {
1551     int c, ret = 0;
1552     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1553     unsigned long flags;
1554
1555     if (debug_level >= DEBUG_LEVEL_INFO)
1556         printk("%s(%d):mgslpc_write(%s) count=%d\n",
1557             __FILE__, __LINE__, info->device_name, count);
1558
1559     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1560         !info->tx_buf)
1561         goto cleanup;
1562
1563     if (info->params.mode == MGSL_MODE_HDLC) {
1564         if (count > TXBUFSIZE) {
1565             ret = -EIO;
1566             goto cleanup;
1567         }
1568         if (info->tx_active)
1569             goto cleanup;
1570         else if (info->tx_count)
1571             goto start;
1572     }
1573
1574     for (;;) {
1575         c = min(count,
1576             min(TXBUFSIZE - info->tx_count - 1,
1577                 TXBUFSIZE - info->tx_put));
1578         if (c <= 0)
1579             break;
1580
1581         memcpy(info->tx_buf + info->tx_put, buf, c);
1582
1583         spin_lock_irqsave(&info->lock, flags);
1584         info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1585         info->tx_count += c;
1586         spin_unlock_irqrestore(&info->lock, flags);
1587
1588         buf += c;
1589         count -= c;
1590         ret += c;
1591     }
1592 start:
1593     if (info->tx_count && !tty->flow.stopped && !tty->hw_stopped) {
1594         spin_lock_irqsave(&info->lock, flags);
1595         if (!info->tx_active)
1596             tx_start(info, tty);
1597         spin_unlock_irqrestore(&info->lock, flags);
1598     }
1599 cleanup:
1600     if (debug_level >= DEBUG_LEVEL_INFO)
1601         printk("%s(%d):mgslpc_write(%s) returning=%d\n",
1602             __FILE__, __LINE__, info->device_name, ret);
1603     return ret;
1604 }
1605
1606 /* Return the count of free bytes in transmit buffer
1607  */
1608 static unsigned int mgslpc_write_room(struct tty_struct *tty)
1609 {
1610     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1611     int ret;
1612
1613     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1614         return 0;
1615
1616     if (info->params.mode == MGSL_MODE_HDLC) {
1617         /* HDLC (frame oriented) mode */
1618         if (info->tx_active)
1619             return 0;
1620         else
1621             return HDLC_MAX_FRAME_SIZE;
1622     } else {
1623         ret = TXBUFSIZE - info->tx_count - 1;
1624         if (ret < 0)
1625             ret = 0;
1626     }
1627
1628     if (debug_level >= DEBUG_LEVEL_INFO)
1629         printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1630              __FILE__, __LINE__, info->device_name, ret);
1631     return ret;
1632 }
1633
1634 /* Return the count of bytes in transmit buffer
1635  */
1636 static unsigned int mgslpc_chars_in_buffer(struct tty_struct *tty)
1637 {
1638     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1639     unsigned int rc;
1640
1641     if (debug_level >= DEBUG_LEVEL_INFO)
1642         printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1643              __FILE__, __LINE__, info->device_name);
1644
1645     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1646         return 0;
1647
1648     if (info->params.mode == MGSL_MODE_HDLC)
1649         rc = info->tx_active ? info->max_frame_size : 0;
1650     else
1651         rc = info->tx_count;
1652
1653     if (debug_level >= DEBUG_LEVEL_INFO)
1654         printk("%s(%d):mgslpc_chars_in_buffer(%s)=%u\n",
1655              __FILE__, __LINE__, info->device_name, rc);
1656
1657     return rc;
1658 }
1659
1660 /* Discard all data in the send buffer
1661  */
1662 static void mgslpc_flush_buffer(struct tty_struct *tty)
1663 {
1664     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1665     unsigned long flags;
1666
1667     if (debug_level >= DEBUG_LEVEL_INFO)
1668         printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1669              __FILE__, __LINE__, info->device_name);
1670
1671     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1672         return;
1673
1674     spin_lock_irqsave(&info->lock, flags);
1675     info->tx_count = info->tx_put = info->tx_get = 0;
1676     del_timer(&info->tx_timer);
1677     spin_unlock_irqrestore(&info->lock, flags);
1678
1679     wake_up_interruptible(&tty->write_wait);
1680     tty_wakeup(tty);
1681 }
1682
1683 /* Send a high-priority XON/XOFF character
1684  */
1685 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1686 {
1687     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1688     unsigned long flags;
1689
1690     if (debug_level >= DEBUG_LEVEL_INFO)
1691         printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1692              __FILE__, __LINE__, info->device_name, ch);
1693
1694     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1695         return;
1696
1697     info->x_char = ch;
1698     if (ch) {
1699         spin_lock_irqsave(&info->lock, flags);
1700         if (!info->tx_enabled)
1701             tx_start(info, tty);
1702         spin_unlock_irqrestore(&info->lock, flags);
1703     }
1704 }
1705
1706 /* Signal remote device to throttle send data (our receive data)
1707  */
1708 static void mgslpc_throttle(struct tty_struct * tty)
1709 {
1710     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1711     unsigned long flags;
1712
1713     if (debug_level >= DEBUG_LEVEL_INFO)
1714         printk("%s(%d):mgslpc_throttle(%s) entry\n",
1715              __FILE__, __LINE__, info->device_name);
1716
1717     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1718         return;
1719
1720     if (I_IXOFF(tty))
1721         mgslpc_send_xchar(tty, STOP_CHAR(tty));
1722
1723     if (C_CRTSCTS(tty)) {
1724         spin_lock_irqsave(&info->lock, flags);
1725         info->serial_signals &= ~SerialSignal_RTS;
1726         set_signals(info);
1727         spin_unlock_irqrestore(&info->lock, flags);
1728     }
1729 }
1730
1731 /* Signal remote device to stop throttling send data (our receive data)
1732  */
1733 static void mgslpc_unthrottle(struct tty_struct * tty)
1734 {
1735     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1736     unsigned long flags;
1737
1738     if (debug_level >= DEBUG_LEVEL_INFO)
1739         printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1740              __FILE__, __LINE__, info->device_name);
1741
1742     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1743         return;
1744
1745     if (I_IXOFF(tty)) {
1746         if (info->x_char)
1747             info->x_char = 0;
1748         else
1749             mgslpc_send_xchar(tty, START_CHAR(tty));
1750     }
1751
1752     if (C_CRTSCTS(tty)) {
1753         spin_lock_irqsave(&info->lock, flags);
1754         info->serial_signals |= SerialSignal_RTS;
1755         set_signals(info);
1756         spin_unlock_irqrestore(&info->lock, flags);
1757     }
1758 }
1759
1760 /* get the current serial statistics
1761  */
1762 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1763 {
1764     int err;
1765     if (debug_level >= DEBUG_LEVEL_INFO)
1766         printk("get_params(%s)\n", info->device_name);
1767     if (!user_icount) {
1768         memset(&info->icount, 0, sizeof(info->icount));
1769     } else {
1770         COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1771         if (err)
1772             return -EFAULT;
1773     }
1774     return 0;
1775 }
1776
1777 /* get the current serial parameters
1778  */
1779 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1780 {
1781     int err;
1782     if (debug_level >= DEBUG_LEVEL_INFO)
1783         printk("get_params(%s)\n", info->device_name);
1784     COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1785     if (err)
1786         return -EFAULT;
1787     return 0;
1788 }
1789
1790 /* set the serial parameters
1791  *
1792  * Arguments:
1793  *
1794  *  info        pointer to device instance data
1795  *  new_params  user buffer containing new serial params
1796  *
1797  * Returns: 0 if success, otherwise error code
1798  */
1799 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1800 {
1801     unsigned long flags;
1802     MGSL_PARAMS tmp_params;
1803     int err;
1804
1805     if (debug_level >= DEBUG_LEVEL_INFO)
1806         printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1807             info->device_name);
1808     COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1809     if (err) {
1810         if (debug_level >= DEBUG_LEVEL_INFO)
1811             printk("%s(%d):set_params(%s) user buffer copy failed\n",
1812                 __FILE__, __LINE__, info->device_name);
1813         return -EFAULT;
1814     }
1815
1816     spin_lock_irqsave(&info->lock, flags);
1817     memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1818     spin_unlock_irqrestore(&info->lock, flags);
1819
1820     mgslpc_change_params(info, tty);
1821
1822     return 0;
1823 }
1824
1825 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1826 {
1827     int err;
1828     if (debug_level >= DEBUG_LEVEL_INFO)
1829         printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1830     COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1831     if (err)
1832         return -EFAULT;
1833     return 0;
1834 }
1835
1836 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1837 {
1838     unsigned long flags;
1839     if (debug_level >= DEBUG_LEVEL_INFO)
1840         printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1841     spin_lock_irqsave(&info->lock, flags);
1842     info->idle_mode = idle_mode;
1843     tx_set_idle(info);
1844     spin_unlock_irqrestore(&info->lock, flags);
1845     return 0;
1846 }
1847
1848 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1849 {
1850     int err;
1851     if (debug_level >= DEBUG_LEVEL_INFO)
1852         printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1853     COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1854     if (err)
1855         return -EFAULT;
1856     return 0;
1857 }
1858
1859 static int set_interface(MGSLPC_INFO * info, int if_mode)
1860 {
1861     unsigned long flags;
1862     unsigned char val;
1863     if (debug_level >= DEBUG_LEVEL_INFO)
1864         printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1865     spin_lock_irqsave(&info->lock, flags);
1866     info->if_mode = if_mode;
1867
1868     val = read_reg(info, PVR) & 0x0f;
1869     switch (info->if_mode)
1870     {
1871     case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1872     case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1873     case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1874     }
1875     write_reg(info, PVR, val);
1876
1877     spin_unlock_irqrestore(&info->lock, flags);
1878     return 0;
1879 }
1880
1881 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1882 {
1883     unsigned long flags;
1884
1885     if (debug_level >= DEBUG_LEVEL_INFO)
1886         printk("set_txenable(%s,%d)\n", info->device_name, enable);
1887
1888     spin_lock_irqsave(&info->lock, flags);
1889     if (enable) {
1890         if (!info->tx_enabled)
1891             tx_start(info, tty);
1892     } else {
1893         if (info->tx_enabled)
1894             tx_stop(info);
1895     }
1896     spin_unlock_irqrestore(&info->lock, flags);
1897     return 0;
1898 }
1899
1900 static int tx_abort(MGSLPC_INFO * info)
1901 {
1902     unsigned long flags;
1903
1904     if (debug_level >= DEBUG_LEVEL_INFO)
1905         printk("tx_abort(%s)\n", info->device_name);
1906
1907     spin_lock_irqsave(&info->lock, flags);
1908     if (info->tx_active && info->tx_count &&
1909         info->params.mode == MGSL_MODE_HDLC) {
1910         /* clear data count so FIFO is not filled on next IRQ.
1911          * This results in underrun and abort transmission.
1912          */
1913         info->tx_count = info->tx_put = info->tx_get = 0;
1914         info->tx_aborting = true;
1915     }
1916     spin_unlock_irqrestore(&info->lock, flags);
1917     return 0;
1918 }
1919
1920 static int set_rxenable(MGSLPC_INFO * info, int enable)
1921 {
1922     unsigned long flags;
1923
1924     if (debug_level >= DEBUG_LEVEL_INFO)
1925         printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1926
1927     spin_lock_irqsave(&info->lock, flags);
1928     if (enable) {
1929         if (!info->rx_enabled)
1930             rx_start(info);
1931     } else {
1932         if (info->rx_enabled)
1933             rx_stop(info);
1934     }
1935     spin_unlock_irqrestore(&info->lock, flags);
1936     return 0;
1937 }
1938
1939 /* wait for specified event to occur
1940  *
1941  * Arguments:       info    pointer to device instance data
1942  *          mask    pointer to bitmask of events to wait for
1943  * Return Value:    0   if successful and bit mask updated with
1944  *              of events triggerred,
1945  *          otherwise error code
1946  */
1947 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1948 {
1949     unsigned long flags;
1950     int s;
1951     int rc=0;
1952     struct mgsl_icount cprev, cnow;
1953     int events;
1954     int mask;
1955     struct  _input_signal_events oldsigs, newsigs;
1956     DECLARE_WAITQUEUE(wait, current);
1957
1958     COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1959     if (rc)
1960         return  -EFAULT;
1961
1962     if (debug_level >= DEBUG_LEVEL_INFO)
1963         printk("wait_events(%s,%d)\n", info->device_name, mask);
1964
1965     spin_lock_irqsave(&info->lock, flags);
1966
1967     /* return immediately if state matches requested events */
1968     get_signals(info);
1969     s = info->serial_signals;
1970     events = mask &
1971         ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
1972           ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
1973           ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
1974           ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
1975     if (events) {
1976         spin_unlock_irqrestore(&info->lock, flags);
1977         goto exit;
1978     }
1979
1980     /* save current irq counts */
1981     cprev = info->icount;
1982     oldsigs = info->input_signal_events;
1983
1984     if ((info->params.mode == MGSL_MODE_HDLC) &&
1985         (mask & MgslEvent_ExitHuntMode))
1986         irq_enable(info, CHA, IRQ_EXITHUNT);
1987
1988     set_current_state(TASK_INTERRUPTIBLE);
1989     add_wait_queue(&info->event_wait_q, &wait);
1990
1991     spin_unlock_irqrestore(&info->lock, flags);
1992
1993
1994     for(;;) {
1995         schedule();
1996         if (signal_pending(current)) {
1997             rc = -ERESTARTSYS;
1998             break;
1999         }
2000
2001         /* get current irq counts */
2002         spin_lock_irqsave(&info->lock, flags);
2003         cnow = info->icount;
2004         newsigs = info->input_signal_events;
2005         set_current_state(TASK_INTERRUPTIBLE);
2006         spin_unlock_irqrestore(&info->lock, flags);
2007
2008         /* if no change, wait aborted for some reason */
2009         if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2010             newsigs.dsr_down == oldsigs.dsr_down &&
2011             newsigs.dcd_up   == oldsigs.dcd_up   &&
2012             newsigs.dcd_down == oldsigs.dcd_down &&
2013             newsigs.cts_up   == oldsigs.cts_up   &&
2014             newsigs.cts_down == oldsigs.cts_down &&
2015             newsigs.ri_up    == oldsigs.ri_up    &&
2016             newsigs.ri_down  == oldsigs.ri_down  &&
2017             cnow.exithunt    == cprev.exithunt   &&
2018             cnow.rxidle      == cprev.rxidle) {
2019             rc = -EIO;
2020             break;
2021         }
2022
2023         events = mask &
2024             ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2025               (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2026               (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2027               (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2028               (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2029               (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2030               (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2031               (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2032               (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2033               (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2034         if (events)
2035             break;
2036
2037         cprev = cnow;
2038         oldsigs = newsigs;
2039     }
2040
2041     remove_wait_queue(&info->event_wait_q, &wait);
2042     set_current_state(TASK_RUNNING);
2043
2044     if (mask & MgslEvent_ExitHuntMode) {
2045         spin_lock_irqsave(&info->lock, flags);
2046         if (!waitqueue_active(&info->event_wait_q))
2047             irq_disable(info, CHA, IRQ_EXITHUNT);
2048         spin_unlock_irqrestore(&info->lock, flags);
2049     }
2050 exit:
2051     if (rc == 0)
2052         PUT_USER(rc, events, mask_ptr);
2053     return rc;
2054 }
2055
2056 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2057 {
2058     unsigned long flags;
2059     int rc;
2060     struct mgsl_icount cprev, cnow;
2061     DECLARE_WAITQUEUE(wait, current);
2062
2063     /* save current irq counts */
2064     spin_lock_irqsave(&info->lock, flags);
2065     cprev = info->icount;
2066     add_wait_queue(&info->status_event_wait_q, &wait);
2067     set_current_state(TASK_INTERRUPTIBLE);
2068     spin_unlock_irqrestore(&info->lock, flags);
2069
2070     for(;;) {
2071         schedule();
2072         if (signal_pending(current)) {
2073             rc = -ERESTARTSYS;
2074             break;
2075         }
2076
2077         /* get new irq counts */
2078         spin_lock_irqsave(&info->lock, flags);
2079         cnow = info->icount;
2080         set_current_state(TASK_INTERRUPTIBLE);
2081         spin_unlock_irqrestore(&info->lock, flags);
2082
2083         /* if no change, wait aborted for some reason */
2084         if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2085             cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2086             rc = -EIO;
2087             break;
2088         }
2089
2090         /* check for change in caller specified modem input */
2091         if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2092             (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2093             (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2094             (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2095             rc = 0;
2096             break;
2097         }
2098
2099         cprev = cnow;
2100     }
2101     remove_wait_queue(&info->status_event_wait_q, &wait);
2102     set_current_state(TASK_RUNNING);
2103     return rc;
2104 }
2105
2106 /* return the state of the serial control and status signals
2107  */
2108 static int tiocmget(struct tty_struct *tty)
2109 {
2110     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2111     unsigned int result;
2112     unsigned long flags;
2113
2114     spin_lock_irqsave(&info->lock, flags);
2115     get_signals(info);
2116     spin_unlock_irqrestore(&info->lock, flags);
2117
2118     result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2119         ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2120         ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2121         ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2122         ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2123         ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2124
2125     if (debug_level >= DEBUG_LEVEL_INFO)
2126         printk("%s(%d):%s tiocmget() value=%08X\n",
2127              __FILE__, __LINE__, info->device_name, result);
2128     return result;
2129 }
2130
2131 /* set modem control signals (DTR/RTS)
2132  */
2133 static int tiocmset(struct tty_struct *tty,
2134             unsigned int set, unsigned int clear)
2135 {
2136     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2137     unsigned long flags;
2138
2139     if (debug_level >= DEBUG_LEVEL_INFO)
2140         printk("%s(%d):%s tiocmset(%x,%x)\n",
2141             __FILE__, __LINE__, info->device_name, set, clear);
2142
2143     if (set & TIOCM_RTS)
2144         info->serial_signals |= SerialSignal_RTS;
2145     if (set & TIOCM_DTR)
2146         info->serial_signals |= SerialSignal_DTR;
2147     if (clear & TIOCM_RTS)
2148         info->serial_signals &= ~SerialSignal_RTS;
2149     if (clear & TIOCM_DTR)
2150         info->serial_signals &= ~SerialSignal_DTR;
2151
2152     spin_lock_irqsave(&info->lock, flags);
2153     set_signals(info);
2154     spin_unlock_irqrestore(&info->lock, flags);
2155
2156     return 0;
2157 }
2158
2159 /* Set or clear transmit break condition
2160  *
2161  * Arguments:       tty     pointer to tty instance data
2162  *          break_state -1=set break condition, 0=clear
2163  */
2164 static int mgslpc_break(struct tty_struct *tty, int break_state)
2165 {
2166     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2167     unsigned long flags;
2168
2169     if (debug_level >= DEBUG_LEVEL_INFO)
2170         printk("%s(%d):mgslpc_break(%s,%d)\n",
2171              __FILE__, __LINE__, info->device_name, break_state);
2172
2173     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2174         return -EINVAL;
2175
2176     spin_lock_irqsave(&info->lock, flags);
2177     if (break_state == -1)
2178         set_reg_bits(info, CHA+DAFO, BIT6);
2179     else
2180         clear_reg_bits(info, CHA+DAFO, BIT6);
2181     spin_unlock_irqrestore(&info->lock, flags);
2182     return 0;
2183 }
2184
2185 static int mgslpc_get_icount(struct tty_struct *tty,
2186                 struct serial_icounter_struct *icount)
2187 {
2188     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2189     struct mgsl_icount cnow;    /* kernel counter temps */
2190     unsigned long flags;
2191
2192     spin_lock_irqsave(&info->lock, flags);
2193     cnow = info->icount;
2194     spin_unlock_irqrestore(&info->lock, flags);
2195
2196     icount->cts = cnow.cts;
2197     icount->dsr = cnow.dsr;
2198     icount->rng = cnow.rng;
2199     icount->dcd = cnow.dcd;
2200     icount->rx = cnow.rx;
2201     icount->tx = cnow.tx;
2202     icount->frame = cnow.frame;
2203     icount->overrun = cnow.overrun;
2204     icount->parity = cnow.parity;
2205     icount->brk = cnow.brk;
2206     icount->buf_overrun = cnow.buf_overrun;
2207
2208     return 0;
2209 }
2210
2211 /* Service an IOCTL request
2212  *
2213  * Arguments:
2214  *
2215  *  tty pointer to tty instance data
2216  *  cmd IOCTL command code
2217  *  arg command argument/context
2218  *
2219  * Return Value:    0 if success, otherwise error code
2220  */
2221 static int mgslpc_ioctl(struct tty_struct *tty,
2222             unsigned int cmd, unsigned long arg)
2223 {
2224     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2225     void __user *argp = (void __user *)arg;
2226
2227     if (debug_level >= DEBUG_LEVEL_INFO)
2228         printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__, __LINE__,
2229             info->device_name, cmd);
2230
2231     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2232         return -ENODEV;
2233
2234     if (cmd != TIOCMIWAIT) {
2235         if (tty_io_error(tty))
2236             return -EIO;
2237     }
2238
2239     switch (cmd) {
2240     case MGSL_IOCGPARAMS:
2241         return get_params(info, argp);
2242     case MGSL_IOCSPARAMS:
2243         return set_params(info, argp, tty);
2244     case MGSL_IOCGTXIDLE:
2245         return get_txidle(info, argp);
2246     case MGSL_IOCSTXIDLE:
2247         return set_txidle(info, (int)arg);
2248     case MGSL_IOCGIF:
2249         return get_interface(info, argp);
2250     case MGSL_IOCSIF:
2251         return set_interface(info,(int)arg);
2252     case MGSL_IOCTXENABLE:
2253         return set_txenable(info,(int)arg, tty);
2254     case MGSL_IOCRXENABLE:
2255         return set_rxenable(info,(int)arg);
2256     case MGSL_IOCTXABORT:
2257         return tx_abort(info);
2258     case MGSL_IOCGSTATS:
2259         return get_stats(info, argp);
2260     case MGSL_IOCWAITEVENT:
2261         return wait_events(info, argp);
2262     case TIOCMIWAIT:
2263         return modem_input_wait(info,(int)arg);
2264     default:
2265         return -ENOIOCTLCMD;
2266     }
2267     return 0;
2268 }
2269
2270 /* Set new termios settings
2271  *
2272  * Arguments:
2273  *
2274  *  tty     pointer to tty structure
2275  *  termios     pointer to buffer to hold returned old termios
2276  */
2277 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2278 {
2279     MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2280     unsigned long flags;
2281
2282     if (debug_level >= DEBUG_LEVEL_INFO)
2283         printk("%s(%d):mgslpc_set_termios %s\n", __FILE__, __LINE__,
2284             tty->driver->name);
2285
2286     /* just return if nothing has changed */
2287     if ((tty->termios.c_cflag == old_termios->c_cflag)
2288         && (RELEVANT_IFLAG(tty->termios.c_iflag)
2289         == RELEVANT_IFLAG(old_termios->c_iflag)))
2290       return;
2291
2292     mgslpc_change_params(info, tty);
2293
2294     /* Handle transition to B0 status */
2295     if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
2296         info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2297         spin_lock_irqsave(&info->lock, flags);
2298         set_signals(info);
2299         spin_unlock_irqrestore(&info->lock, flags);
2300     }
2301
2302     /* Handle transition away from B0 status */
2303     if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
2304         info->serial_signals |= SerialSignal_DTR;
2305         if (!C_CRTSCTS(tty) || !tty_throttled(tty))
2306             info->serial_signals |= SerialSignal_RTS;
2307         spin_lock_irqsave(&info->lock, flags);
2308         set_signals(info);
2309         spin_unlock_irqrestore(&info->lock, flags);
2310     }
2311
2312     /* Handle turning off CRTSCTS */
2313     if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
2314         tty->hw_stopped = 0;
2315         tx_release(tty);
2316     }
2317 }
2318
2319 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2320 {
2321     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2322     struct tty_port *port = &info->port;
2323
2324     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2325         return;
2326
2327     if (debug_level >= DEBUG_LEVEL_INFO)
2328         printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2329              __FILE__, __LINE__, info->device_name, port->count);
2330
2331     if (tty_port_close_start(port, tty, filp) == 0)
2332         goto cleanup;
2333
2334     if (tty_port_initialized(port))
2335         mgslpc_wait_until_sent(tty, info->timeout);
2336
2337     mgslpc_flush_buffer(tty);
2338
2339     tty_ldisc_flush(tty);
2340     shutdown(info, tty);
2341
2342     tty_port_close_end(port, tty);
2343     tty_port_tty_set(port, NULL);
2344 cleanup:
2345     if (debug_level >= DEBUG_LEVEL_INFO)
2346         printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__, __LINE__,
2347             tty->driver->name, port->count);
2348 }
2349
2350 /* Wait until the transmitter is empty.
2351  */
2352 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2353 {
2354     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2355     unsigned long orig_jiffies, char_time;
2356
2357     if (!info)
2358         return;
2359
2360     if (debug_level >= DEBUG_LEVEL_INFO)
2361         printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2362              __FILE__, __LINE__, info->device_name);
2363
2364     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2365         return;
2366
2367     if (!tty_port_initialized(&info->port))
2368         goto exit;
2369
2370     orig_jiffies = jiffies;
2371
2372     /* Set check interval to 1/5 of estimated time to
2373      * send a character, and make it at least 1. The check
2374      * interval should also be less than the timeout.
2375      * Note: use tight timings here to satisfy the NIST-PCTS.
2376      */
2377
2378     if (info->params.data_rate) {
2379             char_time = info->timeout/(32 * 5);
2380         if (!char_time)
2381             char_time++;
2382     } else
2383         char_time = 1;
2384
2385     if (timeout)
2386         char_time = min_t(unsigned long, char_time, timeout);
2387
2388     if (info->params.mode == MGSL_MODE_HDLC) {
2389         while (info->tx_active) {
2390             msleep_interruptible(jiffies_to_msecs(char_time));
2391             if (signal_pending(current))
2392                 break;
2393             if (timeout && time_after(jiffies, orig_jiffies + timeout))
2394                 break;
2395         }
2396     } else {
2397         while ((info->tx_count || info->tx_active) &&
2398             info->tx_enabled) {
2399             msleep_interruptible(jiffies_to_msecs(char_time));
2400             if (signal_pending(current))
2401                 break;
2402             if (timeout && time_after(jiffies, orig_jiffies + timeout))
2403                 break;
2404         }
2405     }
2406
2407 exit:
2408     if (debug_level >= DEBUG_LEVEL_INFO)
2409         printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2410              __FILE__, __LINE__, info->device_name);
2411 }
2412
2413 /* Called by tty_hangup() when a hangup is signaled.
2414  * This is the same as closing all open files for the port.
2415  */
2416 static void mgslpc_hangup(struct tty_struct *tty)
2417 {
2418     MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2419
2420     if (debug_level >= DEBUG_LEVEL_INFO)
2421         printk("%s(%d):mgslpc_hangup(%s)\n",
2422              __FILE__, __LINE__, info->device_name);
2423
2424     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2425         return;
2426
2427     mgslpc_flush_buffer(tty);
2428     shutdown(info, tty);
2429     tty_port_hangup(&info->port);
2430 }
2431
2432 static int carrier_raised(struct tty_port *port)
2433 {
2434     MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2435     unsigned long flags;
2436
2437     spin_lock_irqsave(&info->lock, flags);
2438     get_signals(info);
2439     spin_unlock_irqrestore(&info->lock, flags);
2440
2441     if (info->serial_signals & SerialSignal_DCD)
2442         return 1;
2443     return 0;
2444 }
2445
2446 static void dtr_rts(struct tty_port *port, int onoff)
2447 {
2448     MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2449     unsigned long flags;
2450
2451     spin_lock_irqsave(&info->lock, flags);
2452     if (onoff)
2453         info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2454     else
2455         info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2456     set_signals(info);
2457     spin_unlock_irqrestore(&info->lock, flags);
2458 }
2459
2460
2461 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2462 {
2463     MGSLPC_INFO *info;
2464     struct tty_port *port;
2465     int     retval, line;
2466     unsigned long   flags;
2467
2468     /* verify range of specified line number */
2469     line = tty->index;
2470     if (line >= mgslpc_device_count) {
2471         printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2472             __FILE__, __LINE__, line);
2473         return -ENODEV;
2474     }
2475
2476     /* find the info structure for the specified line */
2477     info = mgslpc_device_list;
2478     while(info && info->line != line)
2479         info = info->next_device;
2480     if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2481         return -ENODEV;
2482
2483     port = &info->port;
2484     tty->driver_data = info;
2485     tty_port_tty_set(port, tty);
2486
2487     if (debug_level >= DEBUG_LEVEL_INFO)
2488         printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2489              __FILE__, __LINE__, tty->driver->name, port->count);
2490
2491     spin_lock_irqsave(&info->netlock, flags);
2492     if (info->netcount) {
2493         retval = -EBUSY;
2494         spin_unlock_irqrestore(&info->netlock, flags);
2495         goto cleanup;
2496     }
2497     spin_lock(&port->lock);
2498     port->count++;
2499     spin_unlock(&port->lock);
2500     spin_unlock_irqrestore(&info->netlock, flags);
2501
2502     if (port->count == 1) {
2503         /* 1st open on this device, init hardware */
2504         retval = startup(info, tty);
2505         if (retval < 0)
2506             goto cleanup;
2507     }
2508
2509     retval = tty_port_block_til_ready(&info->port, tty, filp);
2510     if (retval) {
2511         if (debug_level >= DEBUG_LEVEL_INFO)
2512             printk("%s(%d):block_til_ready(%s) returned %d\n",
2513                  __FILE__, __LINE__, info->device_name, retval);
2514         goto cleanup;
2515     }
2516
2517     if (debug_level >= DEBUG_LEVEL_INFO)
2518         printk("%s(%d):mgslpc_open(%s) success\n",
2519              __FILE__, __LINE__, info->device_name);
2520     retval = 0;
2521
2522 cleanup:
2523     return retval;
2524 }
2525
2526 /*
2527  * /proc fs routines....
2528  */
2529
2530 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2531 {
2532     char    stat_buf[30];
2533     unsigned long flags;
2534
2535     seq_printf(m, "%s:io:%04X irq:%d",
2536               info->device_name, info->io_base, info->irq_level);
2537
2538     /* output current serial signal states */
2539     spin_lock_irqsave(&info->lock, flags);
2540     get_signals(info);
2541     spin_unlock_irqrestore(&info->lock, flags);
2542
2543     stat_buf[0] = 0;
2544     stat_buf[1] = 0;
2545     if (info->serial_signals & SerialSignal_RTS)
2546         strcat(stat_buf, "|RTS");
2547     if (info->serial_signals & SerialSignal_CTS)
2548         strcat(stat_buf, "|CTS");
2549     if (info->serial_signals & SerialSignal_DTR)
2550         strcat(stat_buf, "|DTR");
2551     if (info->serial_signals & SerialSignal_DSR)
2552         strcat(stat_buf, "|DSR");
2553     if (info->serial_signals & SerialSignal_DCD)
2554         strcat(stat_buf, "|CD");
2555     if (info->serial_signals & SerialSignal_RI)
2556         strcat(stat_buf, "|RI");
2557
2558     if (info->params.mode == MGSL_MODE_HDLC) {
2559         seq_printf(m, " HDLC txok:%d rxok:%d",
2560                   info->icount.txok, info->icount.rxok);
2561         if (info->icount.txunder)
2562             seq_printf(m, " txunder:%d", info->icount.txunder);
2563         if (info->icount.txabort)
2564             seq_printf(m, " txabort:%d", info->icount.txabort);
2565         if (info->icount.rxshort)
2566             seq_printf(m, " rxshort:%d", info->icount.rxshort);
2567         if (info->icount.rxlong)
2568             seq_printf(m, " rxlong:%d", info->icount.rxlong);
2569         if (info->icount.rxover)
2570             seq_printf(m, " rxover:%d", info->icount.rxover);
2571         if (info->icount.rxcrc)
2572             seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2573     } else {
2574         seq_printf(m, " ASYNC tx:%d rx:%d",
2575                   info->icount.tx, info->icount.rx);
2576         if (info->icount.frame)
2577             seq_printf(m, " fe:%d", info->icount.frame);
2578         if (info->icount.parity)
2579             seq_printf(m, " pe:%d", info->icount.parity);
2580         if (info->icount.brk)
2581             seq_printf(m, " brk:%d", info->icount.brk);
2582         if (info->icount.overrun)
2583             seq_printf(m, " oe:%d", info->icount.overrun);
2584     }
2585
2586     /* Append serial signal status to end */
2587     seq_printf(m, " %s\n", stat_buf+1);
2588
2589     seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2590                info->tx_active,info->bh_requested,info->bh_running,
2591                info->pending_bh);
2592 }
2593
2594 /* Called to print information about devices
2595  */
2596 static int mgslpc_proc_show(struct seq_file *m, void *v)
2597 {
2598     MGSLPC_INFO *info;
2599
2600     seq_printf(m, "synclink driver:%s\n", driver_version);
2601
2602     info = mgslpc_device_list;
2603     while (info) {
2604         line_info(m, info);
2605         info = info->next_device;
2606     }
2607     return 0;
2608 }
2609
2610 static int rx_alloc_buffers(MGSLPC_INFO *info)
2611 {
2612     /* each buffer has header and data */
2613     info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2614
2615     /* calculate total allocation size for 8 buffers */
2616     info->rx_buf_total_size = info->rx_buf_size * 8;
2617
2618     /* limit total allocated memory */
2619     if (info->rx_buf_total_size > 0x10000)
2620         info->rx_buf_total_size = 0x10000;
2621
2622     /* calculate number of buffers */
2623     info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2624
2625     info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2626     if (info->rx_buf == NULL)
2627         return -ENOMEM;
2628
2629     /* unused flag buffer to satisfy receive_buf calling interface */
2630     info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
2631     if (!info->flag_buf) {
2632         kfree(info->rx_buf);
2633         info->rx_buf = NULL;
2634         return -ENOMEM;
2635     }
2636
2637     rx_reset_buffers(info);
2638     return 0;
2639 }
2640
2641 static void rx_free_buffers(MGSLPC_INFO *info)
2642 {
2643     kfree(info->rx_buf);
2644     info->rx_buf = NULL;
2645     kfree(info->flag_buf);
2646     info->flag_buf = NULL;
2647 }
2648
2649 static int claim_resources(MGSLPC_INFO *info)
2650 {
2651     if (rx_alloc_buffers(info) < 0) {
2652         printk("Can't allocate rx buffer %s\n", info->device_name);
2653         release_resources(info);
2654         return -ENODEV;
2655     }
2656     return 0;
2657 }
2658
2659 static void release_resources(MGSLPC_INFO *info)
2660 {
2661     if (debug_level >= DEBUG_LEVEL_INFO)
2662         printk("release_resources(%s)\n", info->device_name);
2663     rx_free_buffers(info);
2664 }
2665
2666 /* Add the specified device instance data structure to the
2667  * global linked list of devices and increment the device count.
2668  *
2669  * Arguments:       info    pointer to device instance data
2670  */
2671 static int mgslpc_add_device(MGSLPC_INFO *info)
2672 {
2673     MGSLPC_INFO *current_dev = NULL;
2674     struct device *tty_dev;
2675     int ret;
2676
2677     info->next_device = NULL;
2678     info->line = mgslpc_device_count;
2679     sprintf(info->device_name,"ttySLP%d",info->line);
2680
2681     if (info->line < MAX_DEVICE_COUNT) {
2682         if (maxframe[info->line])
2683             info->max_frame_size = maxframe[info->line];
2684     }
2685
2686     mgslpc_device_count++;
2687
2688     if (!mgslpc_device_list)
2689         mgslpc_device_list = info;
2690     else {
2691         current_dev = mgslpc_device_list;
2692         while (current_dev->next_device)
2693             current_dev = current_dev->next_device;
2694         current_dev->next_device = info;
2695     }
2696
2697     if (info->max_frame_size < 4096)
2698         info->max_frame_size = 4096;
2699     else if (info->max_frame_size > 65535)
2700         info->max_frame_size = 65535;
2701
2702     printk("SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2703         info->device_name, info->io_base, info->irq_level);
2704
2705 #if SYNCLINK_GENERIC_HDLC
2706     ret = hdlcdev_init(info);
2707     if (ret != 0)
2708         goto failed;
2709 #endif
2710
2711     tty_dev = tty_port_register_device(&info->port, serial_driver, info->line,
2712             &info->p_dev->dev);
2713     if (IS_ERR(tty_dev)) {
2714         ret = PTR_ERR(tty_dev);
2715 #if SYNCLINK_GENERIC_HDLC
2716         hdlcdev_exit(info);
2717 #endif
2718         goto failed;
2719     }
2720
2721     return 0;
2722
2723 failed:
2724     if (current_dev)
2725         current_dev->next_device = NULL;
2726     else
2727         mgslpc_device_list = NULL;
2728     mgslpc_device_count--;
2729     return ret;
2730 }
2731
2732 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2733 {
2734     MGSLPC_INFO *info = mgslpc_device_list;
2735     MGSLPC_INFO *last = NULL;
2736
2737     while(info) {
2738         if (info == remove_info) {
2739             if (last)
2740                 last->next_device = info->next_device;
2741             else
2742                 mgslpc_device_list = info->next_device;
2743             tty_unregister_device(serial_driver, info->line);
2744 #if SYNCLINK_GENERIC_HDLC
2745             hdlcdev_exit(info);
2746 #endif
2747             release_resources(info);
2748             tty_port_destroy(&info->port);
2749             kfree(info);
2750             mgslpc_device_count--;
2751             return;
2752         }
2753         last = info;
2754         info = info->next_device;
2755     }
2756 }
2757
2758 static const struct pcmcia_device_id mgslpc_ids[] = {
2759     PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2760     PCMCIA_DEVICE_NULL
2761 };
2762 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2763
2764 static struct pcmcia_driver mgslpc_driver = {
2765     .owner      = THIS_MODULE,
2766     .name       = "synclink_cs",
2767     .probe      = mgslpc_probe,
2768     .remove     = mgslpc_detach,
2769     .id_table   = mgslpc_ids,
2770     .suspend    = mgslpc_suspend,
2771     .resume     = mgslpc_resume,
2772 };
2773
2774 static const struct tty_operations mgslpc_ops = {
2775     .open = mgslpc_open,
2776     .close = mgslpc_close,
2777     .write = mgslpc_write,
2778     .put_char = mgslpc_put_char,
2779     .flush_chars = mgslpc_flush_chars,
2780     .write_room = mgslpc_write_room,
2781     .chars_in_buffer = mgslpc_chars_in_buffer,
2782     .flush_buffer = mgslpc_flush_buffer,
2783     .ioctl = mgslpc_ioctl,
2784     .throttle = mgslpc_throttle,
2785     .unthrottle = mgslpc_unthrottle,
2786     .send_xchar = mgslpc_send_xchar,
2787     .break_ctl = mgslpc_break,
2788     .wait_until_sent = mgslpc_wait_until_sent,
2789     .set_termios = mgslpc_set_termios,
2790     .stop = tx_pause,
2791     .start = tx_release,
2792     .hangup = mgslpc_hangup,
2793     .tiocmget = tiocmget,
2794     .tiocmset = tiocmset,
2795     .get_icount = mgslpc_get_icount,
2796     .proc_show = mgslpc_proc_show,
2797 };
2798
2799 static int __init synclink_cs_init(void)
2800 {
2801     int rc;
2802
2803     if (break_on_load) {
2804         mgslpc_get_text_ptr();
2805         BREAKPOINT();
2806     }
2807
2808     serial_driver = tty_alloc_driver(MAX_DEVICE_COUNT,
2809             TTY_DRIVER_REAL_RAW |
2810             TTY_DRIVER_DYNAMIC_DEV);
2811     if (IS_ERR(serial_driver)) {
2812         rc = PTR_ERR(serial_driver);
2813         goto err;
2814     }
2815
2816     /* Initialize the tty_driver structure */
2817     serial_driver->driver_name = "synclink_cs";
2818     serial_driver->name = "ttySLP";
2819     serial_driver->major = ttymajor;
2820     serial_driver->minor_start = 64;
2821     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2822     serial_driver->subtype = SERIAL_TYPE_NORMAL;
2823     serial_driver->init_termios = tty_std_termios;
2824     serial_driver->init_termios.c_cflag =
2825     B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2826     tty_set_operations(serial_driver, &mgslpc_ops);
2827
2828     rc = tty_register_driver(serial_driver);
2829     if (rc < 0) {
2830         printk(KERN_ERR "%s(%d):Couldn't register serial driver\n",
2831                 __FILE__, __LINE__);
2832         goto err_put_tty;
2833     }
2834
2835     rc = pcmcia_register_driver(&mgslpc_driver);
2836     if (rc < 0)
2837         goto err_unreg_tty;
2838
2839     printk(KERN_INFO "%s %s, tty major#%d\n", driver_name, driver_version,
2840             serial_driver->major);
2841
2842     return 0;
2843 err_unreg_tty:
2844     tty_unregister_driver(serial_driver);
2845 err_put_tty:
2846     tty_driver_kref_put(serial_driver);
2847 err:
2848     return rc;
2849 }
2850
2851 static void __exit synclink_cs_exit(void)
2852 {
2853     pcmcia_unregister_driver(&mgslpc_driver);
2854     tty_unregister_driver(serial_driver);
2855     tty_driver_kref_put(serial_driver);
2856 }
2857
2858 module_init(synclink_cs_init);
2859 module_exit(synclink_cs_exit);
2860
2861 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2862 {
2863     unsigned int M, N;
2864     unsigned char val;
2865
2866     /* note:standard BRG mode is broken in V3.2 chip
2867      * so enhanced mode is always used
2868      */
2869
2870     if (rate) {
2871         N = 3686400 / rate;
2872         if (!N)
2873             N = 1;
2874         N >>= 1;
2875         for (M = 1; N > 64 && M < 16; M++)
2876             N >>= 1;
2877         N--;
2878
2879         /* BGR[5..0] = N
2880          * BGR[9..6] = M
2881          * BGR[7..0] contained in BGR register
2882          * BGR[9..8] contained in CCR2[7..6]
2883          * divisor = (N+1)*2^M
2884          *
2885          * Note: M *must* not be zero (causes asymetric duty cycle)
2886          */
2887         write_reg(info, (unsigned char) (channel + BGR),
2888                   (unsigned char) ((M << 6) + N));
2889         val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2890         val |= ((M << 4) & 0xc0);
2891         write_reg(info, (unsigned char) (channel + CCR2), val);
2892     }
2893 }
2894
2895 /* Enabled the AUX clock output at the specified frequency.
2896  */
2897 static void enable_auxclk(MGSLPC_INFO *info)
2898 {
2899     unsigned char val;
2900
2901     /* MODE
2902      *
2903      * 07..06  MDS[1..0] 10 = transparent HDLC mode
2904      * 05      ADM Address Mode, 0 = no addr recognition
2905      * 04      TMD Timer Mode, 0 = external
2906      * 03      RAC Receiver Active, 0 = inactive
2907      * 02      RTS 0=RTS active during xmit, 1=RTS always active
2908      * 01      TRS Timer Resolution, 1=512
2909      * 00      TLP Test Loop, 0 = no loop
2910      *
2911      * 1000 0010
2912      */
2913     val = 0x82;
2914
2915     /* channel B RTS is used to enable AUXCLK driver on SP505 */
2916     if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2917         val |= BIT2;
2918     write_reg(info, CHB + MODE, val);
2919
2920     /* CCR0
2921      *
2922      * 07      PU Power Up, 1=active, 0=power down
2923      * 06      MCE Master Clock Enable, 1=enabled
2924      * 05      Reserved, 0
2925      * 04..02  SC[2..0] Encoding
2926      * 01..00  SM[1..0] Serial Mode, 00=HDLC
2927      *
2928      * 11000000
2929      */
2930     write_reg(info, CHB + CCR0, 0xc0);
2931
2932     /* CCR1
2933      *
2934      * 07      SFLG Shared Flag, 0 = disable shared flags
2935      * 06      GALP Go Active On Loop, 0 = not used
2936      * 05      GLP Go On Loop, 0 = not used
2937      * 04      ODS Output Driver Select, 1=TxD is push-pull output
2938      * 03      ITF Interframe Time Fill, 0=mark, 1=flag
2939      * 02..00  CM[2..0] Clock Mode
2940      *
2941      * 0001 0111
2942      */
2943     write_reg(info, CHB + CCR1, 0x17);
2944
2945     /* CCR2 (Channel B)
2946      *
2947      * 07..06  BGR[9..8] Baud rate bits 9..8
2948      * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
2949      * 04      SSEL Clock source select, 1=submode b
2950      * 03      TOE 0=TxCLK is input, 1=TxCLK is output
2951      * 02      RWX Read/Write Exchange 0=disabled
2952      * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
2953      * 00      DIV, data inversion 0=disabled, 1=enabled
2954      *
2955      * 0011 1000
2956      */
2957     if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2958         write_reg(info, CHB + CCR2, 0x38);
2959     else
2960         write_reg(info, CHB + CCR2, 0x30);
2961
2962     /* CCR4
2963      *
2964      * 07      MCK4 Master Clock Divide by 4, 1=enabled
2965      * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
2966      * 05      TST1 Test Pin, 0=normal operation
2967      * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
2968      * 03..02  Reserved, must be 0
2969      * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
2970      *
2971      * 0101 0000
2972      */
2973     write_reg(info, CHB + CCR4, 0x50);
2974
2975     /* if auxclk not enabled, set internal BRG so
2976      * CTS transitions can be detected (requires TxC)
2977      */
2978     if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2979         mgslpc_set_rate(info, CHB, info->params.clock_speed);
2980     else
2981         mgslpc_set_rate(info, CHB, 921600);
2982 }
2983
2984 static void loopback_enable(MGSLPC_INFO *info)
2985 {
2986     unsigned char val;
2987
2988     /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
2989     val = read_reg(info, CHA + CCR1) | (BIT2 | BIT1 | BIT0);
2990     write_reg(info, CHA + CCR1, val);
2991
2992     /* CCR2:04 SSEL Clock source select, 1=submode b */
2993     val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
2994     write_reg(info, CHA + CCR2, val);
2995
2996     /* set LinkSpeed if available, otherwise default to 2Mbps */
2997     if (info->params.clock_speed)
2998         mgslpc_set_rate(info, CHA, info->params.clock_speed);
2999     else
3000         mgslpc_set_rate(info, CHA, 1843200);
3001
3002     /* MODE:00 TLP Test Loop, 1=loopback enabled */
3003     val = read_reg(info, CHA + MODE) | BIT0;
3004     write_reg(info, CHA + MODE, val);
3005 }
3006
3007 static void hdlc_mode(MGSLPC_INFO *info)
3008 {
3009     unsigned char val;
3010     unsigned char clkmode, clksubmode;
3011
3012     /* disable all interrupts */
3013     irq_disable(info, CHA, 0xffff);
3014     irq_disable(info, CHB, 0xffff);
3015     port_irq_disable(info, 0xff);
3016
3017     /* assume clock mode 0a, rcv=RxC xmt=TxC */
3018     clkmode = clksubmode = 0;
3019     if (info->params.flags & HDLC_FLAG_RXC_DPLL
3020         && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3021         /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3022         clkmode = 7;
3023     } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3024          && info->params.flags & HDLC_FLAG_TXC_BRG) {
3025         /* clock mode 7b, rcv = BRG, xmt = BRG */
3026         clkmode = 7;
3027         clksubmode = 1;
3028     } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3029         if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3030             /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3031             clkmode = 6;
3032             clksubmode = 1;
3033         } else {
3034             /* clock mode 6a, rcv = DPLL, xmt = TxC */
3035             clkmode = 6;
3036         }
3037     } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3038         /* clock mode 0b, rcv = RxC, xmt = BRG */
3039         clksubmode = 1;
3040     }
3041
3042     /* MODE
3043      *
3044      * 07..06  MDS[1..0] 10 = transparent HDLC mode
3045      * 05      ADM Address Mode, 0 = no addr recognition
3046      * 04      TMD Timer Mode, 0 = external
3047      * 03      RAC Receiver Active, 0 = inactive
3048      * 02      RTS 0=RTS active during xmit, 1=RTS always active
3049      * 01      TRS Timer Resolution, 1=512
3050      * 00      TLP Test Loop, 0 = no loop
3051      *
3052      * 1000 0010
3053      */
3054     val = 0x82;
3055     if (info->params.loopback)
3056         val |= BIT0;
3057
3058     /* preserve RTS state */
3059     if (info->serial_signals & SerialSignal_RTS)
3060         val |= BIT2;
3061     write_reg(info, CHA + MODE, val);
3062
3063     /* CCR0
3064      *
3065      * 07      PU Power Up, 1=active, 0=power down
3066      * 06      MCE Master Clock Enable, 1=enabled
3067      * 05      Reserved, 0
3068      * 04..02  SC[2..0] Encoding
3069      * 01..00  SM[1..0] Serial Mode, 00=HDLC
3070      *
3071      * 11000000
3072      */
3073     val = 0xc0;
3074     switch (info->params.encoding)
3075     {
3076     case HDLC_ENCODING_NRZI:
3077         val |= BIT3;
3078         break;
3079     case HDLC_ENCODING_BIPHASE_SPACE:
3080         val |= BIT4;
3081         break;      // FM0
3082     case HDLC_ENCODING_BIPHASE_MARK:
3083         val |= BIT4 | BIT2;
3084         break;      // FM1
3085     case HDLC_ENCODING_BIPHASE_LEVEL:
3086         val |= BIT4 | BIT3;
3087         break;      // Manchester
3088     }
3089     write_reg(info, CHA + CCR0, val);
3090
3091     /* CCR1
3092      *
3093      * 07      SFLG Shared Flag, 0 = disable shared flags
3094      * 06      GALP Go Active On Loop, 0 = not used
3095      * 05      GLP Go On Loop, 0 = not used
3096      * 04      ODS Output Driver Select, 1=TxD is push-pull output
3097      * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3098      * 02..00  CM[2..0] Clock Mode
3099      *
3100      * 0001 0000
3101      */
3102     val = 0x10 + clkmode;
3103     write_reg(info, CHA + CCR1, val);
3104
3105     /* CCR2
3106      *
3107      * 07..06  BGR[9..8] Baud rate bits 9..8
3108      * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3109      * 04      SSEL Clock source select, 1=submode b
3110      * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3111      * 02      RWX Read/Write Exchange 0=disabled
3112      * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3113      * 00      DIV, data inversion 0=disabled, 1=enabled
3114      *
3115      * 0000 0000
3116      */
3117     val = 0x00;
3118     if (clkmode == 2 || clkmode == 3 || clkmode == 6
3119         || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3120         val |= BIT5;
3121     if (clksubmode)
3122         val |= BIT4;
3123     if (info->params.crc_type == HDLC_CRC_32_CCITT)
3124         val |= BIT1;
3125     if (info->params.encoding == HDLC_ENCODING_NRZB)
3126         val |= BIT0;
3127     write_reg(info, CHA + CCR2, val);
3128
3129     /* CCR3
3130      *
3131      * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3132      * 05      EPT Enable preamble transmission, 1=enabled
3133      * 04      RADD Receive address pushed to FIFO, 0=disabled
3134      * 03      CRL CRC Reset Level, 0=FFFF
3135      * 02      RCRC Rx CRC 0=On 1=Off
3136      * 01      TCRC Tx CRC 0=On 1=Off
3137      * 00      PSD DPLL Phase Shift Disable
3138      *
3139      * 0000 0000
3140      */
3141     val = 0x00;
3142     if (info->params.crc_type == HDLC_CRC_NONE)
3143         val |= BIT2 | BIT1;
3144     if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3145         val |= BIT5;
3146     switch (info->params.preamble_length)
3147     {
3148     case HDLC_PREAMBLE_LENGTH_16BITS:
3149         val |= BIT6;
3150         break;
3151     case HDLC_PREAMBLE_LENGTH_32BITS:
3152         val |= BIT6;
3153         break;
3154     case HDLC_PREAMBLE_LENGTH_64BITS:
3155         val |= BIT7 | BIT6;
3156         break;
3157     }
3158     write_reg(info, CHA + CCR3, val);
3159
3160     /* PRE - Preamble pattern */
3161     val = 0;
3162     switch (info->params.preamble)
3163     {
3164     case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3165     case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3166     case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3167     case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3168     }
3169     write_reg(info, CHA + PRE, val);
3170
3171     /* CCR4
3172      *
3173      * 07      MCK4 Master Clock Divide by 4, 1=enabled
3174      * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3175      * 05      TST1 Test Pin, 0=normal operation
3176      * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3177      * 03..02  Reserved, must be 0
3178      * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3179      *
3180      * 0101 0000
3181      */
3182     val = 0x50;
3183     write_reg(info, CHA + CCR4, val);
3184     if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3185         mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3186     else
3187         mgslpc_set_rate(info, CHA, info->params.clock_speed);
3188
3189     /* RLCR Receive length check register
3190      *
3191      * 7     1=enable receive length check
3192      * 6..0  Max frame length = (RL + 1) * 32
3193      */
3194     write_reg(info, CHA + RLCR, 0);
3195
3196     /* XBCH Transmit Byte Count High
3197      *
3198      * 07      DMA mode, 0 = interrupt driven
3199      * 06      NRM, 0=ABM (ignored)
3200      * 05      CAS Carrier Auto Start
3201      * 04      XC Transmit Continuously (ignored)
3202      * 03..00  XBC[10..8] Transmit byte count bits 10..8
3203      *
3204      * 0000 0000
3205      */
3206     val = 0x00;
3207     if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3208         val |= BIT5;
3209     write_reg(info, CHA + XBCH, val);
3210     enable_auxclk(info);
3211     if (info->params.loopback || info->testing_irq)
3212         loopback_enable(info);
3213     if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3214     {
3215         irq_enable(info, CHB, IRQ_CTS);
3216         /* PVR[3] 1=AUTO CTS active */
3217         set_reg_bits(info, CHA + PVR, BIT3);
3218     } else
3219         clear_reg_bits(info, CHA + PVR, BIT3);
3220
3221     irq_enable(info, CHA,
3222              IRQ_RXEOM | IRQ_RXFIFO | IRQ_ALLSENT |
3223              IRQ_UNDERRUN | IRQ_TXFIFO);
3224     issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3225     wait_command_complete(info, CHA);
3226     read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3227
3228     /* Master clock mode enabled above to allow reset commands
3229      * to complete even if no data clocks are present.
3230      *
3231      * Disable master clock mode for normal communications because
3232      * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3233      * IRQ when in master clock mode.
3234      *
3235      * Leave master clock mode enabled for IRQ test because the
3236      * timer IRQ used by the test can only happen in master clock mode.
3237      */
3238     if (!info->testing_irq)
3239         clear_reg_bits(info, CHA + CCR0, BIT6);
3240
3241     tx_set_idle(info);
3242
3243     tx_stop(info);
3244     rx_stop(info);
3245 }
3246
3247 static void rx_stop(MGSLPC_INFO *info)
3248 {
3249     if (debug_level >= DEBUG_LEVEL_ISR)
3250         printk("%s(%d):rx_stop(%s)\n",
3251              __FILE__, __LINE__, info->device_name);
3252
3253     /* MODE:03 RAC Receiver Active, 0=inactive */
3254     clear_reg_bits(info, CHA + MODE, BIT3);
3255
3256     info->rx_enabled = false;
3257     info->rx_overflow = false;
3258 }
3259
3260 static void rx_start(MGSLPC_INFO *info)
3261 {
3262     if (debug_level >= DEBUG_LEVEL_ISR)
3263         printk("%s(%d):rx_start(%s)\n",
3264              __FILE__, __LINE__, info->device_name);
3265
3266     rx_reset_buffers(info);
3267     info->rx_enabled = false;
3268     info->rx_overflow = false;
3269
3270     /* MODE:03 RAC Receiver Active, 1=active */
3271     set_reg_bits(info, CHA + MODE, BIT3);
3272
3273     info->rx_enabled = true;
3274 }
3275
3276 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3277 {
3278     if (debug_level >= DEBUG_LEVEL_ISR)
3279         printk("%s(%d):tx_start(%s)\n",
3280              __FILE__, __LINE__, info->device_name);
3281
3282     if (info->tx_count) {
3283         /* If auto RTS enabled and RTS is inactive, then assert */
3284         /* RTS and set a flag indicating that the driver should */
3285         /* negate RTS when the transmission completes. */
3286         info->drop_rts_on_tx_done = false;
3287
3288         if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3289             get_signals(info);
3290             if (!(info->serial_signals & SerialSignal_RTS)) {
3291                 info->serial_signals |= SerialSignal_RTS;
3292                 set_signals(info);
3293                 info->drop_rts_on_tx_done = true;
3294             }
3295         }
3296
3297         if (info->params.mode == MGSL_MODE_ASYNC) {
3298             if (!info->tx_active) {
3299                 info->tx_active = true;
3300                 tx_ready(info, tty);
3301             }
3302         } else {
3303             info->tx_active = true;
3304             tx_ready(info, tty);
3305             mod_timer(&info->tx_timer, jiffies +
3306                     msecs_to_jiffies(5000));
3307         }
3308     }
3309
3310     if (!info->tx_enabled)
3311         info->tx_enabled = true;
3312 }
3313
3314 static void tx_stop(MGSLPC_INFO *info)
3315 {
3316     if (debug_level >= DEBUG_LEVEL_ISR)
3317         printk("%s(%d):tx_stop(%s)\n",
3318              __FILE__, __LINE__, info->device_name);
3319
3320     del_timer(&info->tx_timer);
3321
3322     info->tx_enabled = false;
3323     info->tx_active = false;
3324 }
3325
3326 /* Reset the adapter to a known state and prepare it for further use.
3327  */
3328 static void reset_device(MGSLPC_INFO *info)
3329 {
3330     /* power up both channels (set BIT7) */
3331     write_reg(info, CHA + CCR0, 0x80);
3332     write_reg(info, CHB + CCR0, 0x80);
3333     write_reg(info, CHA + MODE, 0);
3334     write_reg(info, CHB + MODE, 0);
3335
3336     /* disable all interrupts */
3337     irq_disable(info, CHA, 0xffff);
3338     irq_disable(info, CHB, 0xffff);
3339     port_irq_disable(info, 0xff);
3340
3341     /* PCR Port Configuration Register
3342      *
3343      * 07..04  DEC[3..0] Serial I/F select outputs
3344      * 03      output, 1=AUTO CTS control enabled
3345      * 02      RI Ring Indicator input 0=active
3346      * 01      DSR input 0=active
3347      * 00      DTR output 0=active
3348      *
3349      * 0000 0110
3350      */
3351     write_reg(info, PCR, 0x06);
3352
3353     /* PVR Port Value Register
3354      *
3355      * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3356      * 03      AUTO CTS output 1=enabled
3357      * 02      RI Ring Indicator input
3358      * 01      DSR input
3359      * 00      DTR output (1=inactive)
3360      *
3361      * 0000 0001
3362      */
3363 //  write_reg(info, PVR, PVR_DTR);
3364
3365     /* IPC Interrupt Port Configuration
3366      *
3367      * 07      VIS 1=Masked interrupts visible
3368      * 06..05  Reserved, 0
3369      * 04..03  SLA Slave address, 00 ignored
3370      * 02      CASM Cascading Mode, 1=daisy chain
3371      * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3372      *
3373      * 0000 0101
3374      */
3375     write_reg(info, IPC, 0x05);
3376 }
3377
3378 static void async_mode(MGSLPC_INFO *info)
3379 {
3380     unsigned char val;
3381
3382     /* disable all interrupts */
3383     irq_disable(info, CHA, 0xffff);
3384     irq_disable(info, CHB, 0xffff);
3385     port_irq_disable(info, 0xff);
3386
3387     /* MODE
3388      *
3389      * 07      Reserved, 0
3390      * 06      FRTS RTS State, 0=active
3391      * 05      FCTS Flow Control on CTS
3392      * 04      FLON Flow Control Enable
3393      * 03      RAC Receiver Active, 0 = inactive
3394      * 02      RTS 0=Auto RTS, 1=manual RTS
3395      * 01      TRS Timer Resolution, 1=512
3396      * 00      TLP Test Loop, 0 = no loop
3397      *
3398      * 0000 0110
3399      */
3400     val = 0x06;
3401     if (info->params.loopback)
3402         val |= BIT0;
3403
3404     /* preserve RTS state */
3405     if (!(info->serial_signals & SerialSignal_RTS))
3406         val |= BIT6;
3407     write_reg(info, CHA + MODE, val);
3408
3409     /* CCR0
3410      *
3411      * 07      PU Power Up, 1=active, 0=power down
3412      * 06      MCE Master Clock Enable, 1=enabled
3413      * 05      Reserved, 0
3414      * 04..02  SC[2..0] Encoding, 000=NRZ
3415      * 01..00  SM[1..0] Serial Mode, 11=Async
3416      *
3417      * 1000 0011
3418      */
3419     write_reg(info, CHA + CCR0, 0x83);
3420
3421     /* CCR1
3422      *
3423      * 07..05  Reserved, 0
3424      * 04      ODS Output Driver Select, 1=TxD is push-pull output
3425      * 03      BCR Bit Clock Rate, 1=16x
3426      * 02..00  CM[2..0] Clock Mode, 111=BRG
3427      *
3428      * 0001 1111
3429      */
3430     write_reg(info, CHA + CCR1, 0x1f);
3431
3432     /* CCR2 (channel A)
3433      *
3434      * 07..06  BGR[9..8] Baud rate bits 9..8
3435      * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3436      * 04      SSEL Clock source select, 1=submode b
3437      * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3438      * 02      RWX Read/Write Exchange 0=disabled
3439      * 01      Reserved, 0
3440      * 00      DIV, data inversion 0=disabled, 1=enabled
3441      *
3442      * 0001 0000
3443      */
3444     write_reg(info, CHA + CCR2, 0x10);
3445
3446     /* CCR3
3447      *
3448      * 07..01  Reserved, 0
3449      * 00      PSD DPLL Phase Shift Disable
3450      *
3451      * 0000 0000
3452      */
3453     write_reg(info, CHA + CCR3, 0);
3454
3455     /* CCR4
3456      *
3457      * 07      MCK4 Master Clock Divide by 4, 1=enabled
3458      * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3459      * 05      TST1 Test Pin, 0=normal operation
3460      * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3461      * 03..00  Reserved, must be 0
3462      *
3463      * 0101 0000
3464      */
3465     write_reg(info, CHA + CCR4, 0x50);
3466     mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3467
3468     /* DAFO Data Format
3469      *
3470      * 07      Reserved, 0
3471      * 06      XBRK transmit break, 0=normal operation
3472      * 05      Stop bits (0=1, 1=2)
3473      * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3474      * 02      PAREN Parity Enable
3475      * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3476      *
3477      */
3478     val = 0x00;
3479     if (info->params.data_bits != 8)
3480         val |= BIT0;    /* 7 bits */
3481     if (info->params.stop_bits != 1)
3482         val |= BIT5;
3483     if (info->params.parity != ASYNC_PARITY_NONE)
3484     {
3485         val |= BIT2;    /* Parity enable */
3486         if (info->params.parity == ASYNC_PARITY_ODD)
3487             val |= BIT3;
3488         else
3489             val |= BIT4;
3490     }
3491     write_reg(info, CHA + DAFO, val);
3492
3493     /* RFC Rx FIFO Control
3494      *
3495      * 07      Reserved, 0
3496      * 06      DPS, 1=parity bit not stored in data byte
3497      * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3498      * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3499      * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3500      * 01      Reserved, 0
3501      * 00      TCDE Terminate Char Detect Enable, 0=disabled
3502      *
3503      * 0101 1100
3504      */
3505     write_reg(info, CHA + RFC, 0x5c);
3506
3507     /* RLCR Receive length check register
3508      *
3509      * Max frame length = (RL + 1) * 32
3510      */
3511     write_reg(info, CHA + RLCR, 0);
3512
3513     /* XBCH Transmit Byte Count High
3514      *
3515      * 07      DMA mode, 0 = interrupt driven
3516      * 06      NRM, 0=ABM (ignored)
3517      * 05      CAS Carrier Auto Start
3518      * 04      XC Transmit Continuously (ignored)
3519      * 03..00  XBC[10..8] Transmit byte count bits 10..8
3520      *
3521      * 0000 0000
3522      */
3523     val = 0x00;
3524     if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3525         val |= BIT5;
3526     write_reg(info, CHA + XBCH, val);
3527     if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3528         irq_enable(info, CHA, IRQ_CTS);
3529
3530     /* MODE:03 RAC Receiver Active, 1=active */
3531     set_reg_bits(info, CHA + MODE, BIT3);
3532     enable_auxclk(info);
3533     if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3534         irq_enable(info, CHB, IRQ_CTS);
3535         /* PVR[3] 1=AUTO CTS active */
3536         set_reg_bits(info, CHA + PVR, BIT3);
3537     } else
3538         clear_reg_bits(info, CHA + PVR, BIT3);
3539     irq_enable(info, CHA,
3540               IRQ_RXEOM | IRQ_RXFIFO | IRQ_BREAK_ON | IRQ_RXTIME |
3541               IRQ_ALLSENT | IRQ_TXFIFO);
3542     issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3543     wait_command_complete(info, CHA);
3544     read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3545 }
3546
3547 /* Set the HDLC idle mode for the transmitter.
3548  */
3549 static void tx_set_idle(MGSLPC_INFO *info)
3550 {
3551     /* Note: ESCC2 only supports flags and one idle modes */
3552     if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3553         set_reg_bits(info, CHA + CCR1, BIT3);
3554     else
3555         clear_reg_bits(info, CHA + CCR1, BIT3);
3556 }
3557
3558 /* get state of the V24 status (input) signals.
3559  */
3560 static void get_signals(MGSLPC_INFO *info)
3561 {
3562     unsigned char status = 0;
3563
3564     /* preserve RTS and DTR */
3565     info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
3566
3567     if (read_reg(info, CHB + VSTR) & BIT7)
3568         info->serial_signals |= SerialSignal_DCD;
3569     if (read_reg(info, CHB + STAR) & BIT1)
3570         info->serial_signals |= SerialSignal_CTS;
3571
3572     status = read_reg(info, CHA + PVR);
3573     if (!(status & PVR_RI))
3574         info->serial_signals |= SerialSignal_RI;
3575     if (!(status & PVR_DSR))
3576         info->serial_signals |= SerialSignal_DSR;
3577 }
3578
3579 /* Set the state of RTS and DTR based on contents of
3580  * serial_signals member of device extension.
3581  */
3582 static void set_signals(MGSLPC_INFO *info)
3583 {
3584     unsigned char val;
3585
3586     val = read_reg(info, CHA + MODE);
3587     if (info->params.mode == MGSL_MODE_ASYNC) {
3588         if (info->serial_signals & SerialSignal_RTS)
3589             val &= ~BIT6;
3590         else
3591             val |= BIT6;
3592     } else {
3593         if (info->serial_signals & SerialSignal_RTS)
3594             val |= BIT2;
3595         else
3596             val &= ~BIT2;
3597     }
3598     write_reg(info, CHA + MODE, val);
3599
3600     if (info->serial_signals & SerialSignal_DTR)
3601         clear_reg_bits(info, CHA + PVR, PVR_DTR);
3602     else
3603         set_reg_bits(info, CHA + PVR, PVR_DTR);
3604 }
3605
3606 static void rx_reset_buffers(MGSLPC_INFO *info)
3607 {
3608     RXBUF *buf;
3609     int i;
3610
3611     info->rx_put = 0;
3612     info->rx_get = 0;
3613     info->rx_frame_count = 0;
3614     for (i=0 ; i < info->rx_buf_count ; i++) {
3615         buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3616         buf->status = buf->count = 0;
3617     }
3618 }
3619
3620 /* Attempt to return a received HDLC frame
3621  * Only frames received without errors are returned.
3622  *
3623  * Returns true if frame returned, otherwise false
3624  */
3625 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3626 {
3627     unsigned short status;
3628     RXBUF *buf;
3629     unsigned int framesize = 0;
3630     unsigned long flags;
3631     bool return_frame = false;
3632
3633     if (info->rx_frame_count == 0)
3634         return false;
3635
3636     buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3637
3638     status = buf->status;
3639
3640     /* 07  VFR  1=valid frame
3641      * 06  RDO  1=data overrun
3642      * 05  CRC  1=OK, 0=error
3643      * 04  RAB  1=frame aborted
3644      */
3645     if ((status & 0xf0) != 0xA0) {
3646         if (!(status & BIT7) || (status & BIT4))
3647             info->icount.rxabort++;
3648         else if (status & BIT6)
3649             info->icount.rxover++;
3650         else if (!(status & BIT5)) {
3651             info->icount.rxcrc++;
3652             if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3653                 return_frame = true;
3654         }
3655         framesize = 0;
3656 #if SYNCLINK_GENERIC_HDLC
3657         {
3658             info->netdev->stats.rx_errors++;
3659             info->netdev->stats.rx_frame_errors++;
3660         }
3661 #endif
3662     } else
3663         return_frame = true;
3664
3665     if (return_frame)
3666         framesize = buf->count;
3667
3668     if (debug_level >= DEBUG_LEVEL_BH)
3669         printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3670             __FILE__, __LINE__, info->device_name, status, framesize);
3671
3672     if (debug_level >= DEBUG_LEVEL_DATA)
3673         trace_block(info, buf->data, framesize, 0);
3674
3675     if (framesize) {
3676         if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3677               framesize+1 > info->max_frame_size) ||
3678             framesize > info->max_frame_size)
3679             info->icount.rxlong++;
3680         else {
3681             if (status & BIT5)
3682                 info->icount.rxok++;
3683
3684             if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3685                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3686                 ++framesize;
3687             }
3688
3689 #if SYNCLINK_GENERIC_HDLC
3690             if (info->netcount)
3691                 hdlcdev_rx(info, buf->data, framesize);
3692             else
3693 #endif
3694                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3695         }
3696     }
3697
3698     spin_lock_irqsave(&info->lock, flags);
3699     buf->status = buf->count = 0;
3700     info->rx_frame_count--;
3701     info->rx_get++;
3702     if (info->rx_get >= info->rx_buf_count)
3703         info->rx_get = 0;
3704     spin_unlock_irqrestore(&info->lock, flags);
3705
3706     return true;
3707 }
3708
3709 static bool register_test(MGSLPC_INFO *info)
3710 {
3711     static unsigned char patterns[] =
3712         { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3713     static unsigned int count = ARRAY_SIZE(patterns);
3714     unsigned int i;
3715     bool rc = true;
3716     unsigned long flags;
3717
3718     spin_lock_irqsave(&info->lock, flags);
3719     reset_device(info);
3720
3721     for (i = 0; i < count; i++) {
3722         write_reg(info, XAD1, patterns[i]);
3723         write_reg(info, XAD2, patterns[(i + 1) % count]);
3724         if ((read_reg(info, XAD1) != patterns[i]) ||
3725             (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3726             rc = false;
3727             break;
3728         }
3729     }
3730
3731     spin_unlock_irqrestore(&info->lock, flags);
3732     return rc;
3733 }
3734
3735 static bool irq_test(MGSLPC_INFO *info)
3736 {
3737     unsigned long end_time;
3738     unsigned long flags;
3739
3740     spin_lock_irqsave(&info->lock, flags);
3741     reset_device(info);
3742
3743     info->testing_irq = true;
3744     hdlc_mode(info);
3745
3746     info->irq_occurred = false;
3747
3748     /* init hdlc mode */
3749
3750     irq_enable(info, CHA, IRQ_TIMER);
3751     write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3752     issue_command(info, CHA, CMD_START_TIMER);
3753
3754     spin_unlock_irqrestore(&info->lock, flags);
3755
3756     end_time=100;
3757     while(end_time-- && !info->irq_occurred) {
3758         msleep_interruptible(10);
3759     }
3760
3761     info->testing_irq = false;
3762
3763     spin_lock_irqsave(&info->lock, flags);
3764     reset_device(info);
3765     spin_unlock_irqrestore(&info->lock, flags);
3766
3767     return info->irq_occurred;
3768 }
3769
3770 static int adapter_test(MGSLPC_INFO *info)
3771 {
3772     if (!register_test(info)) {
3773         info->init_error = DiagStatus_AddressFailure;
3774         printk("%s(%d):Register test failure for device %s Addr=%04X\n",
3775             __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base));
3776         return -ENODEV;
3777     }
3778
3779     if (!irq_test(info)) {
3780         info->init_error = DiagStatus_IrqFailure;
3781         printk("%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3782             __FILE__, __LINE__, info->device_name, (unsigned short)(info->irq_level));
3783         return -ENODEV;
3784     }
3785
3786     if (debug_level >= DEBUG_LEVEL_INFO)
3787         printk("%s(%d):device %s passed diagnostics\n",
3788             __FILE__, __LINE__, info->device_name);
3789     return 0;
3790 }
3791
3792 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3793 {
3794     int i;
3795     int linecount;
3796     if (xmit)
3797         printk("%s tx data:\n", info->device_name);
3798     else
3799         printk("%s rx data:\n", info->device_name);
3800
3801     while(count) {
3802         if (count > 16)
3803             linecount = 16;
3804         else
3805             linecount = count;
3806
3807         for(i=0;i<linecount;i++)
3808             printk("%02X ", (unsigned char)data[i]);
3809         for(;i<17;i++)
3810             printk("   ");
3811         for(i=0;i<linecount;i++) {
3812             if (data[i]>=040 && data[i]<=0176)
3813                 printk("%c", data[i]);
3814             else
3815                 printk(".");
3816         }
3817         printk("\n");
3818
3819         data  += linecount;
3820         count -= linecount;
3821     }
3822 }
3823
3824 /* HDLC frame time out
3825  * update stats and do tx completion processing
3826  */
3827 static void tx_timeout(struct timer_list *t)
3828 {
3829     MGSLPC_INFO *info = from_timer(info, t, tx_timer);
3830     unsigned long flags;
3831
3832     if (debug_level >= DEBUG_LEVEL_INFO)
3833         printk("%s(%d):tx_timeout(%s)\n",
3834             __FILE__, __LINE__, info->device_name);
3835     if (info->tx_active &&
3836         info->params.mode == MGSL_MODE_HDLC) {
3837         info->icount.txtimeout++;
3838     }
3839     spin_lock_irqsave(&info->lock, flags);
3840     info->tx_active = false;
3841     info->tx_count = info->tx_put = info->tx_get = 0;
3842
3843     spin_unlock_irqrestore(&info->lock, flags);
3844
3845 #if SYNCLINK_GENERIC_HDLC
3846     if (info->netcount)
3847         hdlcdev_tx_done(info);
3848     else
3849 #endif
3850     {
3851         struct tty_struct *tty = tty_port_tty_get(&info->port);
3852         bh_transmit(info, tty);
3853         tty_kref_put(tty);
3854     }
3855 }
3856
3857 #if SYNCLINK_GENERIC_HDLC
3858
3859 /**
3860  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3861  * set encoding and frame check sequence (FCS) options
3862  *
3863  * dev       pointer to network device structure
3864  * encoding  serial encoding setting
3865  * parity    FCS setting
3866  *
3867  * returns 0 if success, otherwise error code
3868  */
3869 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3870               unsigned short parity)
3871 {
3872     MGSLPC_INFO *info = dev_to_port(dev);
3873     struct tty_struct *tty;
3874     unsigned char  new_encoding;
3875     unsigned short new_crctype;
3876
3877     /* return error if TTY interface open */
3878     if (info->port.count)
3879         return -EBUSY;
3880
3881     switch (encoding)
3882     {
3883     case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3884     case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3885     case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3886     case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3887     case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3888     default: return -EINVAL;
3889     }
3890
3891     switch (parity)
3892     {
3893     case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3894     case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3895     case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3896     default: return -EINVAL;
3897     }
3898
3899     info->params.encoding = new_encoding;
3900     info->params.crc_type = new_crctype;
3901
3902     /* if network interface up, reprogram hardware */
3903     if (info->netcount) {
3904         tty = tty_port_tty_get(&info->port);
3905         mgslpc_program_hw(info, tty);
3906         tty_kref_put(tty);
3907     }
3908
3909     return 0;
3910 }
3911
3912 /**
3913  * called by generic HDLC layer to send frame
3914  *
3915  * skb  socket buffer containing HDLC frame
3916  * dev  pointer to network device structure
3917  */
3918 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3919                       struct net_device *dev)
3920 {
3921     MGSLPC_INFO *info = dev_to_port(dev);
3922     unsigned long flags;
3923
3924     if (debug_level >= DEBUG_LEVEL_INFO)
3925         printk(KERN_INFO "%s:hdlc_xmit(%s)\n", __FILE__, dev->name);
3926
3927     /* stop sending until this frame completes */
3928     netif_stop_queue(dev);
3929
3930     /* copy data to device buffers */
3931     skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3932     info->tx_get = 0;
3933     info->tx_put = info->tx_count = skb->len;
3934
3935     /* update network statistics */
3936     dev->stats.tx_packets++;
3937     dev->stats.tx_bytes += skb->len;
3938
3939     /* done with socket buffer, so free it */
3940     dev_kfree_skb(skb);
3941
3942     /* save start time for transmit timeout detection */
3943     netif_trans_update(dev);
3944
3945     /* start hardware transmitter if necessary */
3946     spin_lock_irqsave(&info->lock, flags);
3947     if (!info->tx_active) {
3948         struct tty_struct *tty = tty_port_tty_get(&info->port);
3949         tx_start(info, tty);
3950         tty_kref_put(tty);
3951     }
3952     spin_unlock_irqrestore(&info->lock, flags);
3953
3954     return NETDEV_TX_OK;
3955 }
3956
3957 /**
3958  * called by network layer when interface enabled
3959  * claim resources and initialize hardware
3960  *
3961  * dev  pointer to network device structure
3962  *
3963  * returns 0 if success, otherwise error code
3964  */
3965 static int hdlcdev_open(struct net_device *dev)
3966 {
3967     MGSLPC_INFO *info = dev_to_port(dev);
3968     struct tty_struct *tty;
3969     int rc;
3970     unsigned long flags;
3971
3972     if (debug_level >= DEBUG_LEVEL_INFO)
3973         printk("%s:hdlcdev_open(%s)\n", __FILE__, dev->name);
3974
3975     /* generic HDLC layer open processing */
3976     rc = hdlc_open(dev);
3977     if (rc != 0)
3978         return rc;
3979
3980     /* arbitrate between network and tty opens */
3981     spin_lock_irqsave(&info->netlock, flags);
3982     if (info->port.count != 0 || info->netcount != 0) {
3983         printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
3984         spin_unlock_irqrestore(&info->netlock, flags);
3985         return -EBUSY;
3986     }
3987     info->netcount=1;
3988     spin_unlock_irqrestore(&info->netlock, flags);
3989
3990     tty = tty_port_tty_get(&info->port);
3991     /* claim resources and init adapter */
3992     rc = startup(info, tty);
3993     if (rc != 0) {
3994         tty_kref_put(tty);
3995         spin_lock_irqsave(&info->netlock, flags);
3996         info->netcount=0;
3997         spin_unlock_irqrestore(&info->netlock, flags);
3998         return rc;
3999     }
4000     /* assert RTS and DTR, apply hardware settings */
4001     info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
4002     mgslpc_program_hw(info, tty);
4003     tty_kref_put(tty);
4004
4005     /* enable network layer transmit */
4006     netif_trans_update(dev);
4007     netif_start_queue(dev);
4008
4009     /* inform generic HDLC layer of current DCD status */
4010     spin_lock_irqsave(&info->lock, flags);
4011     get_signals(info);
4012     spin_unlock_irqrestore(&info->lock, flags);
4013     if (info->serial_signals & SerialSignal_DCD)
4014         netif_carrier_on(dev);
4015     else
4016         netif_carrier_off(dev);
4017     return 0;
4018 }
4019
4020 /**
4021  * called by network layer when interface is disabled
4022  * shutdown hardware and release resources
4023  *
4024  * dev  pointer to network device structure
4025  *
4026  * returns 0 if success, otherwise error code
4027  */
4028 static int hdlcdev_close(struct net_device *dev)
4029 {
4030     MGSLPC_INFO *info = dev_to_port(dev);
4031     struct tty_struct *tty = tty_port_tty_get(&info->port);
4032     unsigned long flags;
4033
4034     if (debug_level >= DEBUG_LEVEL_INFO)
4035         printk("%s:hdlcdev_close(%s)\n", __FILE__, dev->name);
4036
4037     netif_stop_queue(dev);
4038
4039     /* shutdown adapter and release resources */
4040     shutdown(info, tty);
4041     tty_kref_put(tty);
4042     hdlc_close(dev);
4043
4044     spin_lock_irqsave(&info->netlock, flags);
4045     info->netcount=0;
4046     spin_unlock_irqrestore(&info->netlock, flags);
4047
4048     return 0;
4049 }
4050
4051 /**
4052  * called by network layer to process IOCTL call to network device
4053  *
4054  * dev  pointer to network device structure
4055  * ifs  pointer to network interface settings structure
4056  *
4057  * returns 0 if success, otherwise error code
4058  */
4059 static int hdlcdev_wan_ioctl(struct net_device *dev, struct if_settings *ifs)
4060 {
4061     const size_t size = sizeof(sync_serial_settings);
4062     sync_serial_settings new_line;
4063     sync_serial_settings __user *line = ifs->ifs_ifsu.sync;
4064     MGSLPC_INFO *info = dev_to_port(dev);
4065     unsigned int flags;
4066
4067     if (debug_level >= DEBUG_LEVEL_INFO)
4068         printk("%s:hdlcdev_ioctl(%s)\n", __FILE__, dev->name);
4069
4070     /* return error if TTY interface open */
4071     if (info->port.count)
4072         return -EBUSY;
4073
4074     memset(&new_line, 0, size);
4075
4076     switch (ifs->type) {
4077     case IF_GET_IFACE: /* return current sync_serial_settings */
4078
4079         ifs->type = IF_IFACE_SYNC_SERIAL;
4080         if (ifs->size < size) {
4081             ifs->size = size; /* data size wanted */
4082             return -ENOBUFS;
4083         }
4084
4085         flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4086                           HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4087                           HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4088                           HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4089
4090         switch (flags){
4091         case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4092         case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4093         case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4094         case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4095         default: new_line.clock_type = CLOCK_DEFAULT;
4096         }
4097
4098         new_line.clock_rate = info->params.clock_speed;
4099         new_line.loopback   = info->params.loopback ? 1:0;
4100
4101         if (copy_to_user(line, &new_line, size))
4102             return -EFAULT;
4103         return 0;
4104
4105     case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4106
4107         if(!capable(CAP_NET_ADMIN))
4108             return -EPERM;
4109         if (copy_from_user(&new_line, line, size))
4110             return -EFAULT;
4111
4112         switch (new_line.clock_type)
4113         {
4114         case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4115         case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4116         case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4117         case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4118         case CLOCK_DEFAULT:  flags = info->params.flags &
4119                          (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4120                           HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4121                           HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4122                           HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4123         default: return -EINVAL;
4124         }
4125
4126         if (new_line.loopback != 0 && new_line.loopback != 1)
4127             return -EINVAL;
4128
4129         info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4130                     HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4131                     HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4132                     HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4133         info->params.flags |= flags;
4134
4135         info->params.loopback = new_line.loopback;
4136
4137         if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4138             info->params.clock_speed = new_line.clock_rate;
4139         else
4140             info->params.clock_speed = 0;
4141
4142         /* if network interface up, reprogram hardware */
4143         if (info->netcount) {
4144             struct tty_struct *tty = tty_port_tty_get(&info->port);
4145             mgslpc_program_hw(info, tty);
4146             tty_kref_put(tty);
4147         }
4148         return 0;
4149     default:
4150         return hdlc_ioctl(dev, ifs);
4151     }
4152 }
4153
4154 /**
4155  * called by network layer when transmit timeout is detected
4156  *
4157  * dev  pointer to network device structure
4158  */
4159 static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
4160 {
4161     MGSLPC_INFO *info = dev_to_port(dev);
4162     unsigned long flags;
4163
4164     if (debug_level >= DEBUG_LEVEL_INFO)
4165         printk("hdlcdev_tx_timeout(%s)\n", dev->name);
4166
4167     dev->stats.tx_errors++;
4168     dev->stats.tx_aborted_errors++;
4169
4170     spin_lock_irqsave(&info->lock, flags);
4171     tx_stop(info);
4172     spin_unlock_irqrestore(&info->lock, flags);
4173
4174     netif_wake_queue(dev);
4175 }
4176
4177 /**
4178  * called by device driver when transmit completes
4179  * reenable network layer transmit if stopped
4180  *
4181  * info  pointer to device instance information
4182  */
4183 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4184 {
4185     if (netif_queue_stopped(info->netdev))
4186         netif_wake_queue(info->netdev);
4187 }
4188
4189 /**
4190  * called by device driver when frame received
4191  * pass frame to network layer
4192  *
4193  * info  pointer to device instance information
4194  * buf   pointer to buffer contianing frame data
4195  * size  count of data bytes in buf
4196  */
4197 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4198 {
4199     struct sk_buff *skb = dev_alloc_skb(size);
4200     struct net_device *dev = info->netdev;
4201
4202     if (debug_level >= DEBUG_LEVEL_INFO)
4203         printk("hdlcdev_rx(%s)\n", dev->name);
4204
4205     if (skb == NULL) {
4206         printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4207         dev->stats.rx_dropped++;
4208         return;
4209     }
4210
4211     skb_put_data(skb, buf, size);
4212
4213     skb->protocol = hdlc_type_trans(skb, dev);
4214
4215     dev->stats.rx_packets++;
4216     dev->stats.rx_bytes += size;
4217
4218     netif_rx(skb);
4219 }
4220
4221 static const struct net_device_ops hdlcdev_ops = {
4222     .ndo_open       = hdlcdev_open,
4223     .ndo_stop       = hdlcdev_close,
4224     .ndo_start_xmit = hdlc_start_xmit,
4225     .ndo_siocwandev = hdlcdev_wan_ioctl,
4226     .ndo_tx_timeout = hdlcdev_tx_timeout,
4227 };
4228
4229 /**
4230  * called by device driver when adding device instance
4231  * do generic HDLC initialization
4232  *
4233  * info  pointer to device instance information
4234  *
4235  * returns 0 if success, otherwise error code
4236  */
4237 static int hdlcdev_init(MGSLPC_INFO *info)
4238 {
4239     int rc;
4240     struct net_device *dev;
4241     hdlc_device *hdlc;
4242
4243     /* allocate and initialize network and HDLC layer objects */
4244
4245     dev = alloc_hdlcdev(info);
4246     if (dev == NULL) {
4247         printk(KERN_ERR "%s:hdlc device allocation failure\n", __FILE__);
4248         return -ENOMEM;
4249     }
4250
4251     /* for network layer reporting purposes only */
4252     dev->base_addr = info->io_base;
4253     dev->irq       = info->irq_level;
4254
4255     /* network layer callbacks and settings */
4256     dev->netdev_ops     = &hdlcdev_ops;
4257     dev->watchdog_timeo = 10 * HZ;
4258     dev->tx_queue_len   = 50;
4259
4260     /* generic HDLC layer callbacks and settings */
4261     hdlc         = dev_to_hdlc(dev);
4262     hdlc->attach = hdlcdev_attach;
4263     hdlc->xmit   = hdlcdev_xmit;
4264
4265     /* register objects with HDLC layer */
4266     rc = register_hdlc_device(dev);
4267     if (rc) {
4268         printk(KERN_WARNING "%s:unable to register hdlc device\n", __FILE__);
4269         free_netdev(dev);
4270         return rc;
4271     }
4272
4273     info->netdev = dev;
4274     return 0;
4275 }
4276
4277 /**
4278  * called by device driver when removing device instance
4279  * do generic HDLC cleanup
4280  *
4281  * info  pointer to device instance information
4282  */
4283 static void hdlcdev_exit(MGSLPC_INFO *info)
4284 {
4285     unregister_hdlc_device(info->netdev);
4286     free_netdev(info->netdev);
4287     info->netdev = NULL;
4288 }
4289
4290 #endif /* CONFIG_HDLC */
4291