drivers/char/pc8736x_gpio.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* linux/drivers/char/pc8736x_gpio.c
0003
0004    National Semiconductor PC8736x GPIO driver.  Allows a user space
0005    process to play with the GPIO pins.
0006
0007    Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com>
0008
0009    adapted from linux/drivers/char/scx200_gpio.c
0010    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>,
0011 */
0012
0013 #include <linux/fs.h>
0014 #include <linux/module.h>
0015 #include <linux/errno.h>
0016 #include <linux/kernel.h>
0017 #include <linux/init.h>
0018 #include <linux/cdev.h>
0019 #include <linux/io.h>
0020 #include <linux/ioport.h>
0021 #include <linux/mutex.h>
0022 #include <linux/nsc_gpio.h>
0023 #include <linux/platform_device.h>
0024 #include <linux/uaccess.h>
0025
0026 #define DEVNAME "pc8736x_gpio"
0027
0028 MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
0029 MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver");
0030 MODULE_LICENSE("GPL");
0031
0032 static int major;       /* default to dynamic major */
0033 module_param(major, int, 0);
0034 MODULE_PARM_DESC(major, "Major device number");
0035
0036 static DEFINE_MUTEX(pc8736x_gpio_config_lock);
0037 static unsigned pc8736x_gpio_base;
0038 static u8 pc8736x_gpio_shadow[4];
0039
0040 #define SIO_BASE1       0x2E    /* 1st command-reg to check */
0041 #define SIO_BASE2       0x4E    /* alt command-reg to check */
0042
0043 #define SIO_SID     0x20    /* SuperI/O ID Register */
0044 #define SIO_SID_PC87365 0xe5    /* Expected value in ID Register for PC87365 */
0045 #define SIO_SID_PC87366 0xe9    /* Expected value in ID Register for PC87366 */
0046
0047 #define SIO_CF1     0x21    /* chip config, bit0 is chip enable */
0048
0049 #define PC8736X_GPIO_RANGE  16 /* ioaddr range */
0050 #define PC8736X_GPIO_CT     32 /* minors matching 4 8 bit ports */
0051
0052 #define SIO_UNIT_SEL    0x7 /* unit select reg */
0053 #define SIO_UNIT_ACT    0x30    /* unit enable */
0054 #define SIO_GPIO_UNIT   0x7 /* unit number of GPIO */
0055 #define SIO_VLM_UNIT    0x0D
0056 #define SIO_TMS_UNIT    0x0E
0057
0058 /* config-space addrs to read/write each unit's runtime addr */
0059 #define SIO_BASE_HADDR      0x60
0060 #define SIO_BASE_LADDR      0x61
0061
0062 /* GPIO config-space pin-control addresses */
0063 #define SIO_GPIO_PIN_SELECT 0xF0
0064 #define SIO_GPIO_PIN_CONFIG     0xF1
0065 #define SIO_GPIO_PIN_EVENT      0xF2
0066
0067 static unsigned char superio_cmd = 0;
0068 static unsigned char selected_device = 0xFF;    /* bogus start val */
0069
0070 /* GPIO port runtime access, functionality */
0071 static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */
0072 /* static int event_capable[] = { 1, 1, 0, 0 };   ports 2,3 are hobbled */
0073
0074 #define PORT_OUT    0
0075 #define PORT_IN     1
0076 #define PORT_EVT_EN 2
0077 #define PORT_EVT_STST   3
0078
0079 static struct platform_device *pdev;  /* use in dev_*() */
0080
0081 static inline void superio_outb(int addr, int val)
0082 {
0083     outb_p(addr, superio_cmd);
0084     outb_p(val, superio_cmd + 1);
0085 }
0086
0087 static inline int superio_inb(int addr)
0088 {
0089     outb_p(addr, superio_cmd);
0090     return inb_p(superio_cmd + 1);
0091 }
0092
0093 static int pc8736x_superio_present(void)
0094 {
0095     int id;
0096
0097     /* try the 2 possible values, read a hardware reg to verify */
0098     superio_cmd = SIO_BASE1;
0099     id = superio_inb(SIO_SID);
0100     if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366)
0101         return superio_cmd;
0102
0103     superio_cmd = SIO_BASE2;
0104     id = superio_inb(SIO_SID);
0105     if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366)
0106         return superio_cmd;
0107
0108     return 0;
0109 }
0110
0111 static void device_select(unsigned devldn)
0112 {
0113     superio_outb(SIO_UNIT_SEL, devldn);
0114     selected_device = devldn;
0115 }
0116
0117 static void select_pin(unsigned iminor)
0118 {
0119     /* select GPIO port/pin from device minor number */
0120     device_select(SIO_GPIO_UNIT);
0121     superio_outb(SIO_GPIO_PIN_SELECT,
0122              ((iminor << 1) & 0xF0) | (iminor & 0x7));
0123 }
0124
0125 static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
0126                         u32 func_slct)
0127 {
0128     u32 config, new_config;
0129
0130     mutex_lock(&pc8736x_gpio_config_lock);
0131
0132     device_select(SIO_GPIO_UNIT);
0133     select_pin(index);
0134
0135     /* read current config value */
0136     config = superio_inb(func_slct);
0137
0138     /* set new config */
0139     new_config = (config & mask) | bits;
0140     superio_outb(func_slct, new_config);
0141
0142     mutex_unlock(&pc8736x_gpio_config_lock);
0143
0144     return config;
0145 }
0146
0147 static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
0148 {
0149     return pc8736x_gpio_configure_fn(index, mask, bits,
0150                      SIO_GPIO_PIN_CONFIG);
0151 }
0152
0153 static int pc8736x_gpio_get(unsigned minor)
0154 {
0155     int port, bit, val;
0156
0157     port = minor >> 3;
0158     bit = minor & 7;
0159     val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
0160     val >>= bit;
0161     val &= 1;
0162
0163     dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n",
0164         minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit,
0165         val);
0166
0167     return val;
0168 }
0169
0170 static void pc8736x_gpio_set(unsigned minor, int val)
0171 {
0172     int port, bit, curval;
0173
0174     minor &= 0x1f;
0175     port = minor >> 3;
0176     bit = minor & 7;
0177     curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
0178
0179     dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n",
0180         pc8736x_gpio_base + port_offset[port] + PORT_OUT,
0181         curval, bit, (curval & ~(1 << bit)), val, (val << bit));
0182
0183     val = (curval & ~(1 << bit)) | (val << bit);
0184
0185     dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)"
0186         " %2x -> %2x\n", minor, port, bit, curval, val);
0187
0188     outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT);
0189
0190     curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT);
0191     val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN);
0192
0193     dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val);
0194     pc8736x_gpio_shadow[port] = val;
0195 }
0196
0197 static int pc8736x_gpio_current(unsigned minor)
0198 {
0199     int port, bit;
0200     minor &= 0x1f;
0201     port = minor >> 3;
0202     bit = minor & 7;
0203     return ((pc8736x_gpio_shadow[port] >> bit) & 0x01);
0204 }
0205
0206 static void pc8736x_gpio_change(unsigned index)
0207 {
0208     pc8736x_gpio_set(index, !pc8736x_gpio_current(index));
0209 }
0210
0211 static struct nsc_gpio_ops pc8736x_gpio_ops = {
0212     .owner      = THIS_MODULE,
0213     .gpio_config    = pc8736x_gpio_configure,
0214     .gpio_dump  = nsc_gpio_dump,
0215     .gpio_get   = pc8736x_gpio_get,
0216     .gpio_set   = pc8736x_gpio_set,
0217     .gpio_change    = pc8736x_gpio_change,
0218     .gpio_current   = pc8736x_gpio_current
0219 };
0220
0221 static int pc8736x_gpio_open(struct inode *inode, struct file *file)
0222 {
0223     unsigned m = iminor(inode);
0224     file->private_data = &pc8736x_gpio_ops;
0225
0226     dev_dbg(&pdev->dev, "open %d\n", m);
0227
0228     if (m >= PC8736X_GPIO_CT)
0229         return -EINVAL;
0230     return nonseekable_open(inode, file);
0231 }
0232
0233 static const struct file_operations pc8736x_gpio_fileops = {
0234     .owner  = THIS_MODULE,
0235     .open   = pc8736x_gpio_open,
0236     .write  = nsc_gpio_write,
0237     .read   = nsc_gpio_read,
0238     .llseek = no_llseek,
0239 };
0240
0241 static void __init pc8736x_init_shadow(void)
0242 {
0243     int port;
0244
0245     /* read the current values driven on the GPIO signals */
0246     for (port = 0; port < 4; ++port)
0247         pc8736x_gpio_shadow[port]
0248             = inb_p(pc8736x_gpio_base + port_offset[port]
0249                 + PORT_OUT);
0250
0251 }
0252
0253 static struct cdev pc8736x_gpio_cdev;
0254
0255 static int __init pc8736x_gpio_init(void)
0256 {
0257     int rc;
0258     dev_t devid;
0259
0260     pdev = platform_device_alloc(DEVNAME, 0);
0261     if (!pdev)
0262         return -ENOMEM;
0263
0264     rc = platform_device_add(pdev);
0265     if (rc) {
0266         rc = -ENODEV;
0267         goto undo_platform_dev_alloc;
0268     }
0269     dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n");
0270
0271     if (!pc8736x_superio_present()) {
0272         rc = -ENODEV;
0273         dev_err(&pdev->dev, "no device found\n");
0274         goto undo_platform_dev_add;
0275     }
0276     pc8736x_gpio_ops.dev = &pdev->dev;
0277
0278     /* Verify that chip and it's GPIO unit are both enabled.
0279        My BIOS does this, so I take minimum action here
0280      */
0281     rc = superio_inb(SIO_CF1);
0282     if (!(rc & 0x01)) {
0283         rc = -ENODEV;
0284         dev_err(&pdev->dev, "device not enabled\n");
0285         goto undo_platform_dev_add;
0286     }
0287     device_select(SIO_GPIO_UNIT);
0288     if (!superio_inb(SIO_UNIT_ACT)) {
0289         rc = -ENODEV;
0290         dev_err(&pdev->dev, "GPIO unit not enabled\n");
0291         goto undo_platform_dev_add;
0292     }
0293
0294     /* read the GPIO unit base addr that chip responds to */
0295     pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8
0296                  | superio_inb(SIO_BASE_LADDR));
0297
0298     if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) {
0299         rc = -ENODEV;
0300         dev_err(&pdev->dev, "GPIO ioport %x busy\n",
0301             pc8736x_gpio_base);
0302         goto undo_platform_dev_add;
0303     }
0304     dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base);
0305
0306     if (major) {
0307         devid = MKDEV(major, 0);
0308         rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME);
0309     } else {
0310         rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME);
0311         major = MAJOR(devid);
0312     }
0313
0314     if (rc < 0) {
0315         dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc);
0316         goto undo_request_region;
0317     }
0318     if (!major) {
0319         major = rc;
0320         dev_dbg(&pdev->dev, "got dynamic major %d\n", major);
0321     }
0322
0323     pc8736x_init_shadow();
0324
0325     /* ignore minor errs, and succeed */
0326     cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops);
0327     cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT);
0328
0329     return 0;
0330
0331 undo_request_region:
0332     release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
0333 undo_platform_dev_add:
0334     platform_device_del(pdev);
0335 undo_platform_dev_alloc:
0336     platform_device_put(pdev);
0337
0338     return rc;
0339 }
0340
0341 static void __exit pc8736x_gpio_cleanup(void)
0342 {
0343     dev_dbg(&pdev->dev, "cleanup\n");
0344
0345     cdev_del(&pc8736x_gpio_cdev);
0346     unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT);
0347     release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE);
0348
0349     platform_device_unregister(pdev);
0350 }
0351
0352 module_init(pc8736x_gpio_init);
0353 module_exit(pc8736x_gpio_cleanup);