char/hw_random/npcm-rng.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2019 Nuvoton Technology corporation.
0003
0004 #include <linux/kernel.h>
0005 #include <linux/module.h>
0006 #include <linux/io.h>
0007 #include <linux/iopoll.h>
0008 #include <linux/init.h>
0009 #include <linux/random.h>
0010 #include <linux/err.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/hw_random.h>
0013 #include <linux/delay.h>
0014 #include <linux/of_irq.h>
0015 #include <linux/pm_runtime.h>
0016
0017 #define NPCM_RNGCS_REG      0x00    /* Control and status register */
0018 #define NPCM_RNGD_REG       0x04    /* Data register */
0019 #define NPCM_RNGMODE_REG    0x08    /* Mode register */
0020
0021 #define NPCM_RNG_CLK_SET_25MHZ  GENMASK(4, 3) /* 20-25 MHz */
0022 #define NPCM_RNG_DATA_VALID BIT(1)
0023 #define NPCM_RNG_ENABLE     BIT(0)
0024 #define NPCM_RNG_M1ROSEL    BIT(1)
0025
0026 #define NPCM_RNG_TIMEOUT_USEC   20000
0027 #define NPCM_RNG_POLL_USEC  1000
0028
0029 #define to_npcm_rng(p)  container_of(p, struct npcm_rng, rng)
0030
0031 struct npcm_rng {
0032     void __iomem *base;
0033     struct hwrng rng;
0034 };
0035
0036 static int npcm_rng_init(struct hwrng *rng)
0037 {
0038     struct npcm_rng *priv = to_npcm_rng(rng);
0039
0040     writel(NPCM_RNG_CLK_SET_25MHZ | NPCM_RNG_ENABLE,
0041            priv->base + NPCM_RNGCS_REG);
0042
0043     return 0;
0044 }
0045
0046 static void npcm_rng_cleanup(struct hwrng *rng)
0047 {
0048     struct npcm_rng *priv = to_npcm_rng(rng);
0049
0050     writel(NPCM_RNG_CLK_SET_25MHZ, priv->base + NPCM_RNGCS_REG);
0051 }
0052
0053 static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
0054 {
0055     struct npcm_rng *priv = to_npcm_rng(rng);
0056     int retval = 0;
0057     int ready;
0058
0059     pm_runtime_get_sync((struct device *)priv->rng.priv);
0060
0061     while (max) {
0062         if (wait) {
0063             if (readb_poll_timeout(priv->base + NPCM_RNGCS_REG,
0064                            ready,
0065                            ready & NPCM_RNG_DATA_VALID,
0066                            NPCM_RNG_POLL_USEC,
0067                            NPCM_RNG_TIMEOUT_USEC))
0068                 break;
0069         } else {
0070             if ((readb(priv->base + NPCM_RNGCS_REG) &
0071                 NPCM_RNG_DATA_VALID) == 0)
0072                 break;
0073         }
0074
0075         *(u8 *)buf = readb(priv->base + NPCM_RNGD_REG);
0076         retval++;
0077         buf++;
0078         max--;
0079     }
0080
0081     pm_runtime_mark_last_busy((struct device *)priv->rng.priv);
0082     pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv);
0083
0084     return retval || !wait ? retval : -EIO;
0085 }
0086
0087 static int npcm_rng_probe(struct platform_device *pdev)
0088 {
0089     struct npcm_rng *priv;
0090     int ret;
0091
0092     priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
0093     if (!priv)
0094         return -ENOMEM;
0095
0096     priv->base = devm_platform_ioremap_resource(pdev, 0);
0097     if (IS_ERR(priv->base))
0098         return PTR_ERR(priv->base);
0099
0100     dev_set_drvdata(&pdev->dev, priv);
0101     pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
0102     pm_runtime_use_autosuspend(&pdev->dev);
0103     pm_runtime_enable(&pdev->dev);
0104
0105 #ifndef CONFIG_PM
0106     priv->rng.init = npcm_rng_init;
0107     priv->rng.cleanup = npcm_rng_cleanup;
0108 #endif
0109     priv->rng.name = pdev->name;
0110     priv->rng.read = npcm_rng_read;
0111     priv->rng.priv = (unsigned long)&pdev->dev;
0112     priv->rng.quality = 1000;
0113
0114     writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNGMODE_REG);
0115
0116     ret = devm_hwrng_register(&pdev->dev, &priv->rng);
0117     if (ret) {
0118         dev_err(&pdev->dev, "Failed to register rng device: %d\n",
0119             ret);
0120         pm_runtime_disable(&pdev->dev);
0121         pm_runtime_set_suspended(&pdev->dev);
0122         return ret;
0123     }
0124
0125     return 0;
0126 }
0127
0128 static int npcm_rng_remove(struct platform_device *pdev)
0129 {
0130     struct npcm_rng *priv = platform_get_drvdata(pdev);
0131
0132     devm_hwrng_unregister(&pdev->dev, &priv->rng);
0133     pm_runtime_disable(&pdev->dev);
0134     pm_runtime_set_suspended(&pdev->dev);
0135
0136     return 0;
0137 }
0138
0139 #ifdef CONFIG_PM
0140 static int npcm_rng_runtime_suspend(struct device *dev)
0141 {
0142     struct npcm_rng *priv = dev_get_drvdata(dev);
0143
0144     npcm_rng_cleanup(&priv->rng);
0145
0146     return 0;
0147 }
0148
0149 static int npcm_rng_runtime_resume(struct device *dev)
0150 {
0151     struct npcm_rng *priv = dev_get_drvdata(dev);
0152
0153     return npcm_rng_init(&priv->rng);
0154 }
0155 #endif
0156
0157 static const struct dev_pm_ops npcm_rng_pm_ops = {
0158     SET_RUNTIME_PM_OPS(npcm_rng_runtime_suspend,
0159                npcm_rng_runtime_resume, NULL)
0160     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0161                 pm_runtime_force_resume)
0162 };
0163
0164 static const struct of_device_id rng_dt_id[] __maybe_unused = {
0165     { .compatible = "nuvoton,npcm750-rng",  },
0166     {},
0167 };
0168 MODULE_DEVICE_TABLE(of, rng_dt_id);
0169
0170 static struct platform_driver npcm_rng_driver = {
0171     .driver = {
0172         .name       = "npcm-rng",
0173         .pm     = &npcm_rng_pm_ops,
0174         .of_match_table = of_match_ptr(rng_dt_id),
0175     },
0176     .probe      = npcm_rng_probe,
0177     .remove     = npcm_rng_remove,
0178 };
0179
0180 module_platform_driver(npcm_rng_driver);
0181
0182 MODULE_DESCRIPTION("Nuvoton NPCM Random Number Generator Driver");
0183 MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>");
0184 MODULE_LICENSE("GPL v2");