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0011 #include <linux/hw_random.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/io.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/clk.h>
0017 #include <linux/pm_runtime.h>
0018 #include <linux/err.h>
0019 #include <linux/regmap.h>
0020 #include <linux/mfd/syscon.h>
0021 #include <linux/of.h>
0022 #include <linux/of_address.h>
0023 #include <linux/delay.h>
0024 #include <linux/timekeeping.h>
0025
0026 #define SA_CMD_STATUS_OFS 0x8
0027
0028
0029 #define SA_CMD_STATUS_REG_TRNG_ENABLE BIT(3)
0030
0031
0032 #define TRNG_CNTL_REG_TRNG_ENABLE BIT(10)
0033
0034
0035 #define TRNG_STATUS_REG_READY BIT(0)
0036
0037
0038 #define TRNG_INTACK_REG_READY BIT(0)
0039
0040
0041
0042
0043
0044
0045 #define TRNG_DEF_STARTUP_CYCLES 0
0046 #define TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT 16
0047
0048
0049
0050
0051
0052
0053 #define TRNG_DEF_MIN_REFILL_CYCLES 1
0054 #define TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT 0
0055
0056
0057
0058
0059
0060
0061 #define TRNG_DEF_MAX_REFILL_CYCLES 0
0062 #define TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT 16
0063
0064
0065 #define TRNG_DEF_CLK_DIV_CYCLES 0
0066 #define TRNG_CFG_REG_SAMPLE_DIV_SHIFT 8
0067
0068
0069 #define SA_MAX_RNG_DATA_RETRIES 5
0070
0071 #define SA_RNG_DATA_RETRY_DELAY 5
0072
0073 struct trng_regs {
0074 u32 output_l;
0075 u32 output_h;
0076 u32 status;
0077 u32 intmask;
0078 u32 intack;
0079 u32 control;
0080 u32 config;
0081 };
0082
0083 struct ks_sa_rng {
0084 struct device *dev;
0085 struct hwrng rng;
0086 struct clk *clk;
0087 struct regmap *regmap_cfg;
0088 struct trng_regs __iomem *reg_rng;
0089 u64 ready_ts;
0090 unsigned int refill_delay_ns;
0091 };
0092
0093 static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles)
0094 {
0095 return DIV_ROUND_UP_ULL((TRNG_DEF_CLK_DIV_CYCLES + 1) * 1000000000ull *
0096 cycles, clk_rate);
0097 }
0098
0099 static unsigned int startup_delay_ns(unsigned long clk_rate)
0100 {
0101 if (!TRNG_DEF_STARTUP_CYCLES)
0102 return cycles_to_ns(clk_rate, BIT(24));
0103 return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES);
0104 }
0105
0106 static unsigned int refill_delay_ns(unsigned long clk_rate)
0107 {
0108 if (!TRNG_DEF_MAX_REFILL_CYCLES)
0109 return cycles_to_ns(clk_rate, BIT(24));
0110 return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES);
0111 }
0112
0113 static int ks_sa_rng_init(struct hwrng *rng)
0114 {
0115 u32 value;
0116 struct device *dev = (struct device *)rng->priv;
0117 struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
0118 unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);
0119
0120
0121 regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
0122 SA_CMD_STATUS_REG_TRNG_ENABLE,
0123 SA_CMD_STATUS_REG_TRNG_ENABLE);
0124
0125
0126 writel(0, &ks_sa_rng->reg_rng->control);
0127 value = TRNG_DEF_STARTUP_CYCLES << TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT;
0128 writel(value, &ks_sa_rng->reg_rng->control);
0129
0130 value = (TRNG_DEF_MIN_REFILL_CYCLES <<
0131 TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT) |
0132 (TRNG_DEF_MAX_REFILL_CYCLES <<
0133 TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT) |
0134 (TRNG_DEF_CLK_DIV_CYCLES <<
0135 TRNG_CFG_REG_SAMPLE_DIV_SHIFT);
0136
0137 writel(value, &ks_sa_rng->reg_rng->config);
0138
0139
0140 writel(0, &ks_sa_rng->reg_rng->intmask);
0141
0142
0143 value = readl(&ks_sa_rng->reg_rng->control);
0144 value |= TRNG_CNTL_REG_TRNG_ENABLE;
0145 writel(value, &ks_sa_rng->reg_rng->control);
0146
0147 ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate);
0148 ks_sa_rng->ready_ts = ktime_get_ns() +
0149 startup_delay_ns(clk_rate);
0150
0151 return 0;
0152 }
0153
0154 static void ks_sa_rng_cleanup(struct hwrng *rng)
0155 {
0156 struct device *dev = (struct device *)rng->priv;
0157 struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
0158
0159
0160 writel(0, &ks_sa_rng->reg_rng->control);
0161 regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
0162 SA_CMD_STATUS_REG_TRNG_ENABLE, 0);
0163 }
0164
0165 static int ks_sa_rng_data_read(struct hwrng *rng, u32 *data)
0166 {
0167 struct device *dev = (struct device *)rng->priv;
0168 struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
0169
0170
0171 data[0] = readl(&ks_sa_rng->reg_rng->output_l);
0172 data[1] = readl(&ks_sa_rng->reg_rng->output_h);
0173
0174 writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
0175 ks_sa_rng->ready_ts = ktime_get_ns() + ks_sa_rng->refill_delay_ns;
0176
0177 return sizeof(u32) * 2;
0178 }
0179
0180 static int ks_sa_rng_data_present(struct hwrng *rng, int wait)
0181 {
0182 struct device *dev = (struct device *)rng->priv;
0183 struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
0184 u64 now = ktime_get_ns();
0185
0186 u32 ready;
0187 int j;
0188
0189 if (wait && now < ks_sa_rng->ready_ts) {
0190
0191 unsigned long min_delay =
0192 DIV_ROUND_UP((u32)(ks_sa_rng->ready_ts - now), 1000);
0193
0194 usleep_range(min_delay, min_delay + SA_RNG_DATA_RETRY_DELAY);
0195 }
0196
0197 for (j = 0; j < SA_MAX_RNG_DATA_RETRIES; j++) {
0198 ready = readl(&ks_sa_rng->reg_rng->status);
0199 ready &= TRNG_STATUS_REG_READY;
0200
0201 if (ready || !wait)
0202 break;
0203
0204 udelay(SA_RNG_DATA_RETRY_DELAY);
0205 }
0206
0207 return ready;
0208 }
0209
0210 static int ks_sa_rng_probe(struct platform_device *pdev)
0211 {
0212 struct ks_sa_rng *ks_sa_rng;
0213 struct device *dev = &pdev->dev;
0214 int ret;
0215
0216 ks_sa_rng = devm_kzalloc(dev, sizeof(*ks_sa_rng), GFP_KERNEL);
0217 if (!ks_sa_rng)
0218 return -ENOMEM;
0219
0220 ks_sa_rng->dev = dev;
0221 ks_sa_rng->rng = (struct hwrng) {
0222 .name = "ks_sa_hwrng",
0223 .init = ks_sa_rng_init,
0224 .data_read = ks_sa_rng_data_read,
0225 .data_present = ks_sa_rng_data_present,
0226 .cleanup = ks_sa_rng_cleanup,
0227 };
0228 ks_sa_rng->rng.priv = (unsigned long)dev;
0229
0230 ks_sa_rng->reg_rng = devm_platform_ioremap_resource(pdev, 0);
0231 if (IS_ERR(ks_sa_rng->reg_rng))
0232 return PTR_ERR(ks_sa_rng->reg_rng);
0233
0234 ks_sa_rng->regmap_cfg =
0235 syscon_regmap_lookup_by_phandle(dev->of_node,
0236 "ti,syscon-sa-cfg");
0237
0238 if (IS_ERR(ks_sa_rng->regmap_cfg)) {
0239 dev_err(dev, "syscon_node_to_regmap failed\n");
0240 return -EINVAL;
0241 }
0242
0243 pm_runtime_enable(dev);
0244 ret = pm_runtime_resume_and_get(dev);
0245 if (ret < 0) {
0246 dev_err(dev, "Failed to enable SA power-domain\n");
0247 pm_runtime_disable(dev);
0248 return ret;
0249 }
0250
0251 platform_set_drvdata(pdev, ks_sa_rng);
0252
0253 return devm_hwrng_register(&pdev->dev, &ks_sa_rng->rng);
0254 }
0255
0256 static int ks_sa_rng_remove(struct platform_device *pdev)
0257 {
0258 pm_runtime_put_sync(&pdev->dev);
0259 pm_runtime_disable(&pdev->dev);
0260
0261 return 0;
0262 }
0263
0264 static const struct of_device_id ks_sa_rng_dt_match[] = {
0265 {
0266 .compatible = "ti,keystone-rng",
0267 },
0268 { },
0269 };
0270 MODULE_DEVICE_TABLE(of, ks_sa_rng_dt_match);
0271
0272 static struct platform_driver ks_sa_rng_driver = {
0273 .driver = {
0274 .name = "ks-sa-rng",
0275 .of_match_table = ks_sa_rng_dt_match,
0276 },
0277 .probe = ks_sa_rng_probe,
0278 .remove = ks_sa_rng_remove,
0279 };
0280
0281 module_platform_driver(ks_sa_rng_driver);
0282
0283 MODULE_DESCRIPTION("Keystone NETCP SA H/W Random Number Generator driver");
0284 MODULE_AUTHOR("Vitaly Andrianov <vitalya@ti.com>");
0285 MODULE_LICENSE("GPL");