drivers/char/hpet.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Intel & MS High Precision Event Timer Implementation.
0004  *
0005  * Copyright (C) 2003 Intel Corporation
0006  *  Venki Pallipadi
0007  * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
0008  *  Bob Picco <robert.picco@hp.com>
0009  */
0010
0011 #include <linux/interrupt.h>
0012 #include <linux/kernel.h>
0013 #include <linux/types.h>
0014 #include <linux/miscdevice.h>
0015 #include <linux/major.h>
0016 #include <linux/ioport.h>
0017 #include <linux/fcntl.h>
0018 #include <linux/init.h>
0019 #include <linux/io-64-nonatomic-lo-hi.h>
0020 #include <linux/poll.h>
0021 #include <linux/mm.h>
0022 #include <linux/proc_fs.h>
0023 #include <linux/spinlock.h>
0024 #include <linux/sysctl.h>
0025 #include <linux/wait.h>
0026 #include <linux/sched/signal.h>
0027 #include <linux/bcd.h>
0028 #include <linux/seq_file.h>
0029 #include <linux/bitops.h>
0030 #include <linux/compat.h>
0031 #include <linux/clocksource.h>
0032 #include <linux/uaccess.h>
0033 #include <linux/slab.h>
0034 #include <linux/io.h>
0035 #include <linux/acpi.h>
0036 #include <linux/hpet.h>
0037 #include <asm/current.h>
0038 #include <asm/irq.h>
0039 #include <asm/div64.h>
0040
0041 /*
0042  * The High Precision Event Timer driver.
0043  * This driver is closely modelled after the rtc.c driver.
0044  * See HPET spec revision 1.
0045  */
0046 #define HPET_USER_FREQ  (64)
0047 #define HPET_DRIFT  (500)
0048
0049 #define HPET_RANGE_SIZE     1024    /* from HPET spec */
0050
0051
0052 /* WARNING -- don't get confused.  These macros are never used
0053  * to write the (single) counter, and rarely to read it.
0054  * They're badly named; to fix, someday.
0055  */
0056 #if BITS_PER_LONG == 64
0057 #define write_counter(V, MC)    writeq(V, MC)
0058 #define read_counter(MC)    readq(MC)
0059 #else
0060 #define write_counter(V, MC)    writel(V, MC)
0061 #define read_counter(MC)    readl(MC)
0062 #endif
0063
0064 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
0065 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
0066
0067 /* This clocksource driver currently only works on ia64 */
0068 #ifdef CONFIG_IA64
0069 static void __iomem *hpet_mctr;
0070
0071 static u64 read_hpet(struct clocksource *cs)
0072 {
0073     return (u64)read_counter((void __iomem *)hpet_mctr);
0074 }
0075
0076 static struct clocksource clocksource_hpet = {
0077     .name       = "hpet",
0078     .rating     = 250,
0079     .read       = read_hpet,
0080     .mask       = CLOCKSOURCE_MASK(64),
0081     .flags      = CLOCK_SOURCE_IS_CONTINUOUS,
0082 };
0083 static struct clocksource *hpet_clocksource;
0084 #endif
0085
0086 /* A lock for concurrent access by app and isr hpet activity. */
0087 static DEFINE_SPINLOCK(hpet_lock);
0088
0089 #define HPET_DEV_NAME   (7)
0090
0091 struct hpet_dev {
0092     struct hpets *hd_hpets;
0093     struct hpet __iomem *hd_hpet;
0094     struct hpet_timer __iomem *hd_timer;
0095     unsigned long hd_ireqfreq;
0096     unsigned long hd_irqdata;
0097     wait_queue_head_t hd_waitqueue;
0098     struct fasync_struct *hd_async_queue;
0099     unsigned int hd_flags;
0100     unsigned int hd_irq;
0101     unsigned int hd_hdwirq;
0102     char hd_name[HPET_DEV_NAME];
0103 };
0104
0105 struct hpets {
0106     struct hpets *hp_next;
0107     struct hpet __iomem *hp_hpet;
0108     unsigned long hp_hpet_phys;
0109     struct clocksource *hp_clocksource;
0110     unsigned long long hp_tick_freq;
0111     unsigned long hp_delta;
0112     unsigned int hp_ntimer;
0113     unsigned int hp_which;
0114     struct hpet_dev hp_dev[];
0115 };
0116
0117 static struct hpets *hpets;
0118
0119 #define HPET_OPEN       0x0001
0120 #define HPET_IE         0x0002  /* interrupt enabled */
0121 #define HPET_PERIODIC       0x0004
0122 #define HPET_SHARED_IRQ     0x0008
0123
0124 static irqreturn_t hpet_interrupt(int irq, void *data)
0125 {
0126     struct hpet_dev *devp;
0127     unsigned long isr;
0128
0129     devp = data;
0130     isr = 1 << (devp - devp->hd_hpets->hp_dev);
0131
0132     if ((devp->hd_flags & HPET_SHARED_IRQ) &&
0133         !(isr & readl(&devp->hd_hpet->hpet_isr)))
0134         return IRQ_NONE;
0135
0136     spin_lock(&hpet_lock);
0137     devp->hd_irqdata++;
0138
0139     /*
0140      * For non-periodic timers, increment the accumulator.
0141      * This has the effect of treating non-periodic like periodic.
0142      */
0143     if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
0144         unsigned long t, mc, base, k;
0145         struct hpet __iomem *hpet = devp->hd_hpet;
0146         struct hpets *hpetp = devp->hd_hpets;
0147
0148         t = devp->hd_ireqfreq;
0149         read_counter(&devp->hd_timer->hpet_compare);
0150         mc = read_counter(&hpet->hpet_mc);
0151         /* The time for the next interrupt would logically be t + m,
0152          * however, if we are very unlucky and the interrupt is delayed
0153          * for longer than t then we will completely miss the next
0154          * interrupt if we set t + m and an application will hang.
0155          * Therefore we need to make a more complex computation assuming
0156          * that there exists a k for which the following is true:
0157          * k * t + base < mc + delta
0158          * (k + 1) * t + base > mc + delta
0159          * where t is the interval in hpet ticks for the given freq,
0160          * base is the theoretical start value 0 < base < t,
0161          * mc is the main counter value at the time of the interrupt,
0162          * delta is the time it takes to write the a value to the
0163          * comparator.
0164          * k may then be computed as (mc - base + delta) / t .
0165          */
0166         base = mc % t;
0167         k = (mc - base + hpetp->hp_delta) / t;
0168         write_counter(t * (k + 1) + base,
0169                   &devp->hd_timer->hpet_compare);
0170     }
0171
0172     if (devp->hd_flags & HPET_SHARED_IRQ)
0173         writel(isr, &devp->hd_hpet->hpet_isr);
0174     spin_unlock(&hpet_lock);
0175
0176     wake_up_interruptible(&devp->hd_waitqueue);
0177
0178     kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
0179
0180     return IRQ_HANDLED;
0181 }
0182
0183 static void hpet_timer_set_irq(struct hpet_dev *devp)
0184 {
0185     unsigned long v;
0186     int irq, gsi;
0187     struct hpet_timer __iomem *timer;
0188
0189     spin_lock_irq(&hpet_lock);
0190     if (devp->hd_hdwirq) {
0191         spin_unlock_irq(&hpet_lock);
0192         return;
0193     }
0194
0195     timer = devp->hd_timer;
0196
0197     /* we prefer level triggered mode */
0198     v = readl(&timer->hpet_config);
0199     if (!(v & Tn_INT_TYPE_CNF_MASK)) {
0200         v |= Tn_INT_TYPE_CNF_MASK;
0201         writel(v, &timer->hpet_config);
0202     }
0203     spin_unlock_irq(&hpet_lock);
0204
0205     v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
0206                  Tn_INT_ROUTE_CAP_SHIFT;
0207
0208     /*
0209      * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
0210      * legacy device. In IO APIC mode, we skip all the legacy IRQS.
0211      */
0212     if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
0213         v &= ~0xf3df;
0214     else
0215         v &= ~0xffff;
0216
0217     for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
0218         if (irq >= nr_irqs) {
0219             irq = HPET_MAX_IRQ;
0220             break;
0221         }
0222
0223         gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
0224                     ACPI_ACTIVE_LOW);
0225         if (gsi > 0)
0226             break;
0227
0228         /* FIXME: Setup interrupt source table */
0229     }
0230
0231     if (irq < HPET_MAX_IRQ) {
0232         spin_lock_irq(&hpet_lock);
0233         v = readl(&timer->hpet_config);
0234         v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
0235         writel(v, &timer->hpet_config);
0236         devp->hd_hdwirq = gsi;
0237         spin_unlock_irq(&hpet_lock);
0238     }
0239     return;
0240 }
0241
0242 static int hpet_open(struct inode *inode, struct file *file)
0243 {
0244     struct hpet_dev *devp;
0245     struct hpets *hpetp;
0246     int i;
0247
0248     if (file->f_mode & FMODE_WRITE)
0249         return -EINVAL;
0250
0251     mutex_lock(&hpet_mutex);
0252     spin_lock_irq(&hpet_lock);
0253
0254     for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
0255         for (i = 0; i < hpetp->hp_ntimer; i++)
0256             if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
0257                 continue;
0258             } else {
0259                 devp = &hpetp->hp_dev[i];
0260                 break;
0261             }
0262
0263     if (!devp) {
0264         spin_unlock_irq(&hpet_lock);
0265         mutex_unlock(&hpet_mutex);
0266         return -EBUSY;
0267     }
0268
0269     file->private_data = devp;
0270     devp->hd_irqdata = 0;
0271     devp->hd_flags |= HPET_OPEN;
0272     spin_unlock_irq(&hpet_lock);
0273     mutex_unlock(&hpet_mutex);
0274
0275     hpet_timer_set_irq(devp);
0276
0277     return 0;
0278 }
0279
0280 static ssize_t
0281 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
0282 {
0283     DECLARE_WAITQUEUE(wait, current);
0284     unsigned long data;
0285     ssize_t retval;
0286     struct hpet_dev *devp;
0287
0288     devp = file->private_data;
0289     if (!devp->hd_ireqfreq)
0290         return -EIO;
0291
0292     if (count < sizeof(unsigned long))
0293         return -EINVAL;
0294
0295     add_wait_queue(&devp->hd_waitqueue, &wait);
0296
0297     for ( ; ; ) {
0298         set_current_state(TASK_INTERRUPTIBLE);
0299
0300         spin_lock_irq(&hpet_lock);
0301         data = devp->hd_irqdata;
0302         devp->hd_irqdata = 0;
0303         spin_unlock_irq(&hpet_lock);
0304
0305         if (data) {
0306             break;
0307         } else if (file->f_flags & O_NONBLOCK) {
0308             retval = -EAGAIN;
0309             goto out;
0310         } else if (signal_pending(current)) {
0311             retval = -ERESTARTSYS;
0312             goto out;
0313         }
0314         schedule();
0315     }
0316
0317     retval = put_user(data, (unsigned long __user *)buf);
0318     if (!retval)
0319         retval = sizeof(unsigned long);
0320 out:
0321     __set_current_state(TASK_RUNNING);
0322     remove_wait_queue(&devp->hd_waitqueue, &wait);
0323
0324     return retval;
0325 }
0326
0327 static __poll_t hpet_poll(struct file *file, poll_table * wait)
0328 {
0329     unsigned long v;
0330     struct hpet_dev *devp;
0331
0332     devp = file->private_data;
0333
0334     if (!devp->hd_ireqfreq)
0335         return 0;
0336
0337     poll_wait(file, &devp->hd_waitqueue, wait);
0338
0339     spin_lock_irq(&hpet_lock);
0340     v = devp->hd_irqdata;
0341     spin_unlock_irq(&hpet_lock);
0342
0343     if (v != 0)
0344         return EPOLLIN | EPOLLRDNORM;
0345
0346     return 0;
0347 }
0348
0349 #ifdef CONFIG_HPET_MMAP
0350 #ifdef CONFIG_HPET_MMAP_DEFAULT
0351 static int hpet_mmap_enabled = 1;
0352 #else
0353 static int hpet_mmap_enabled = 0;
0354 #endif
0355
0356 static __init int hpet_mmap_enable(char *str)
0357 {
0358     get_option(&str, &hpet_mmap_enabled);
0359     pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
0360     return 1;
0361 }
0362 __setup("hpet_mmap=", hpet_mmap_enable);
0363
0364 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
0365 {
0366     struct hpet_dev *devp;
0367     unsigned long addr;
0368
0369     if (!hpet_mmap_enabled)
0370         return -EACCES;
0371
0372     devp = file->private_data;
0373     addr = devp->hd_hpets->hp_hpet_phys;
0374
0375     if (addr & (PAGE_SIZE - 1))
0376         return -ENOSYS;
0377
0378     vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
0379     return vm_iomap_memory(vma, addr, PAGE_SIZE);
0380 }
0381 #else
0382 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
0383 {
0384     return -ENOSYS;
0385 }
0386 #endif
0387
0388 static int hpet_fasync(int fd, struct file *file, int on)
0389 {
0390     struct hpet_dev *devp;
0391
0392     devp = file->private_data;
0393
0394     if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
0395         return 0;
0396     else
0397         return -EIO;
0398 }
0399
0400 static int hpet_release(struct inode *inode, struct file *file)
0401 {
0402     struct hpet_dev *devp;
0403     struct hpet_timer __iomem *timer;
0404     int irq = 0;
0405
0406     devp = file->private_data;
0407     timer = devp->hd_timer;
0408
0409     spin_lock_irq(&hpet_lock);
0410
0411     writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
0412            &timer->hpet_config);
0413
0414     irq = devp->hd_irq;
0415     devp->hd_irq = 0;
0416
0417     devp->hd_ireqfreq = 0;
0418
0419     if (devp->hd_flags & HPET_PERIODIC
0420         && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
0421         unsigned long v;
0422
0423         v = readq(&timer->hpet_config);
0424         v ^= Tn_TYPE_CNF_MASK;
0425         writeq(v, &timer->hpet_config);
0426     }
0427
0428     devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
0429     spin_unlock_irq(&hpet_lock);
0430
0431     if (irq)
0432         free_irq(irq, devp);
0433
0434     file->private_data = NULL;
0435     return 0;
0436 }
0437
0438 static int hpet_ioctl_ieon(struct hpet_dev *devp)
0439 {
0440     struct hpet_timer __iomem *timer;
0441     struct hpet __iomem *hpet;
0442     struct hpets *hpetp;
0443     int irq;
0444     unsigned long g, v, t, m;
0445     unsigned long flags, isr;
0446
0447     timer = devp->hd_timer;
0448     hpet = devp->hd_hpet;
0449     hpetp = devp->hd_hpets;
0450
0451     if (!devp->hd_ireqfreq)
0452         return -EIO;
0453
0454     spin_lock_irq(&hpet_lock);
0455
0456     if (devp->hd_flags & HPET_IE) {
0457         spin_unlock_irq(&hpet_lock);
0458         return -EBUSY;
0459     }
0460
0461     devp->hd_flags |= HPET_IE;
0462
0463     if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
0464         devp->hd_flags |= HPET_SHARED_IRQ;
0465     spin_unlock_irq(&hpet_lock);
0466
0467     irq = devp->hd_hdwirq;
0468
0469     if (irq) {
0470         unsigned long irq_flags;
0471
0472         if (devp->hd_flags & HPET_SHARED_IRQ) {
0473             /*
0474              * To prevent the interrupt handler from seeing an
0475              * unwanted interrupt status bit, program the timer
0476              * so that it will not fire in the near future ...
0477              */
0478             writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
0479                    &timer->hpet_config);
0480             write_counter(read_counter(&hpet->hpet_mc),
0481                       &timer->hpet_compare);
0482             /* ... and clear any left-over status. */
0483             isr = 1 << (devp - devp->hd_hpets->hp_dev);
0484             writel(isr, &hpet->hpet_isr);
0485         }
0486
0487         sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
0488         irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
0489         if (request_irq(irq, hpet_interrupt, irq_flags,
0490                 devp->hd_name, (void *)devp)) {
0491             printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
0492             irq = 0;
0493         }
0494     }
0495
0496     if (irq == 0) {
0497         spin_lock_irq(&hpet_lock);
0498         devp->hd_flags ^= HPET_IE;
0499         spin_unlock_irq(&hpet_lock);
0500         return -EIO;
0501     }
0502
0503     devp->hd_irq = irq;
0504     t = devp->hd_ireqfreq;
0505     v = readq(&timer->hpet_config);
0506
0507     /* 64-bit comparators are not yet supported through the ioctls,
0508      * so force this into 32-bit mode if it supports both modes
0509      */
0510     g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
0511
0512     if (devp->hd_flags & HPET_PERIODIC) {
0513         g |= Tn_TYPE_CNF_MASK;
0514         v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
0515         writeq(v, &timer->hpet_config);
0516         local_irq_save(flags);
0517
0518         /*
0519          * NOTE: First we modify the hidden accumulator
0520          * register supported by periodic-capable comparators.
0521          * We never want to modify the (single) counter; that
0522          * would affect all the comparators. The value written
0523          * is the counter value when the first interrupt is due.
0524          */
0525         m = read_counter(&hpet->hpet_mc);
0526         write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
0527         /*
0528          * Then we modify the comparator, indicating the period
0529          * for subsequent interrupt.
0530          */
0531         write_counter(t, &timer->hpet_compare);
0532     } else {
0533         local_irq_save(flags);
0534         m = read_counter(&hpet->hpet_mc);
0535         write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
0536     }
0537
0538     if (devp->hd_flags & HPET_SHARED_IRQ) {
0539         isr = 1 << (devp - devp->hd_hpets->hp_dev);
0540         writel(isr, &hpet->hpet_isr);
0541     }
0542     writeq(g, &timer->hpet_config);
0543     local_irq_restore(flags);
0544
0545     return 0;
0546 }
0547
0548 /* converts Hz to number of timer ticks */
0549 static inline unsigned long hpet_time_div(struct hpets *hpets,
0550                       unsigned long dis)
0551 {
0552     unsigned long long m;
0553
0554     m = hpets->hp_tick_freq + (dis >> 1);
0555     return div64_ul(m, dis);
0556 }
0557
0558 static int
0559 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
0560           struct hpet_info *info)
0561 {
0562     struct hpet_timer __iomem *timer;
0563     struct hpets *hpetp;
0564     int err;
0565     unsigned long v;
0566
0567     switch (cmd) {
0568     case HPET_IE_OFF:
0569     case HPET_INFO:
0570     case HPET_EPI:
0571     case HPET_DPI:
0572     case HPET_IRQFREQ:
0573         timer = devp->hd_timer;
0574         hpetp = devp->hd_hpets;
0575         break;
0576     case HPET_IE_ON:
0577         return hpet_ioctl_ieon(devp);
0578     default:
0579         return -EINVAL;
0580     }
0581
0582     err = 0;
0583
0584     switch (cmd) {
0585     case HPET_IE_OFF:
0586         if ((devp->hd_flags & HPET_IE) == 0)
0587             break;
0588         v = readq(&timer->hpet_config);
0589         v &= ~Tn_INT_ENB_CNF_MASK;
0590         writeq(v, &timer->hpet_config);
0591         if (devp->hd_irq) {
0592             free_irq(devp->hd_irq, devp);
0593             devp->hd_irq = 0;
0594         }
0595         devp->hd_flags ^= HPET_IE;
0596         break;
0597     case HPET_INFO:
0598         {
0599             memset(info, 0, sizeof(*info));
0600             if (devp->hd_ireqfreq)
0601                 info->hi_ireqfreq =
0602                     hpet_time_div(hpetp, devp->hd_ireqfreq);
0603             info->hi_flags =
0604                 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
0605             info->hi_hpet = hpetp->hp_which;
0606             info->hi_timer = devp - hpetp->hp_dev;
0607             break;
0608         }
0609     case HPET_EPI:
0610         v = readq(&timer->hpet_config);
0611         if ((v & Tn_PER_INT_CAP_MASK) == 0) {
0612             err = -ENXIO;
0613             break;
0614         }
0615         devp->hd_flags |= HPET_PERIODIC;
0616         break;
0617     case HPET_DPI:
0618         v = readq(&timer->hpet_config);
0619         if ((v & Tn_PER_INT_CAP_MASK) == 0) {
0620             err = -ENXIO;
0621             break;
0622         }
0623         if (devp->hd_flags & HPET_PERIODIC &&
0624             readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
0625             v = readq(&timer->hpet_config);
0626             v ^= Tn_TYPE_CNF_MASK;
0627             writeq(v, &timer->hpet_config);
0628         }
0629         devp->hd_flags &= ~HPET_PERIODIC;
0630         break;
0631     case HPET_IRQFREQ:
0632         if ((arg > hpet_max_freq) &&
0633             !capable(CAP_SYS_RESOURCE)) {
0634             err = -EACCES;
0635             break;
0636         }
0637
0638         if (!arg) {
0639             err = -EINVAL;
0640             break;
0641         }
0642
0643         devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
0644     }
0645
0646     return err;
0647 }
0648
0649 static long
0650 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
0651 {
0652     struct hpet_info info;
0653     int err;
0654
0655     mutex_lock(&hpet_mutex);
0656     err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
0657     mutex_unlock(&hpet_mutex);
0658
0659     if ((cmd == HPET_INFO) && !err &&
0660         (copy_to_user((void __user *)arg, &info, sizeof(info))))
0661         err = -EFAULT;
0662
0663     return err;
0664 }
0665
0666 #ifdef CONFIG_COMPAT
0667 struct compat_hpet_info {
0668     compat_ulong_t hi_ireqfreq; /* Hz */
0669     compat_ulong_t hi_flags;    /* information */
0670     unsigned short hi_hpet;
0671     unsigned short hi_timer;
0672 };
0673
0674 static long
0675 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
0676 {
0677     struct hpet_info info;
0678     int err;
0679
0680     mutex_lock(&hpet_mutex);
0681     err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
0682     mutex_unlock(&hpet_mutex);
0683
0684     if ((cmd == HPET_INFO) && !err) {
0685         struct compat_hpet_info __user *u = compat_ptr(arg);
0686         if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
0687             put_user(info.hi_flags, &u->hi_flags) ||
0688             put_user(info.hi_hpet, &u->hi_hpet) ||
0689             put_user(info.hi_timer, &u->hi_timer))
0690             err = -EFAULT;
0691     }
0692
0693     return err;
0694 }
0695 #endif
0696
0697 static const struct file_operations hpet_fops = {
0698     .owner = THIS_MODULE,
0699     .llseek = no_llseek,
0700     .read = hpet_read,
0701     .poll = hpet_poll,
0702     .unlocked_ioctl = hpet_ioctl,
0703 #ifdef CONFIG_COMPAT
0704     .compat_ioctl = hpet_compat_ioctl,
0705 #endif
0706     .open = hpet_open,
0707     .release = hpet_release,
0708     .fasync = hpet_fasync,
0709     .mmap = hpet_mmap,
0710 };
0711
0712 static int hpet_is_known(struct hpet_data *hdp)
0713 {
0714     struct hpets *hpetp;
0715
0716     for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
0717         if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
0718             return 1;
0719
0720     return 0;
0721 }
0722
0723 static struct ctl_table hpet_table[] = {
0724     {
0725      .procname = "max-user-freq",
0726      .data = &hpet_max_freq,
0727      .maxlen = sizeof(int),
0728      .mode = 0644,
0729      .proc_handler = proc_dointvec,
0730      },
0731     {}
0732 };
0733
0734 static struct ctl_table_header *sysctl_header;
0735
0736 /*
0737  * Adjustment for when arming the timer with
0738  * initial conditions.  That is, main counter
0739  * ticks expired before interrupts are enabled.
0740  */
0741 #define TICK_CALIBRATE  (1000UL)
0742
0743 static unsigned long __hpet_calibrate(struct hpets *hpetp)
0744 {
0745     struct hpet_timer __iomem *timer = NULL;
0746     unsigned long t, m, count, i, flags, start;
0747     struct hpet_dev *devp;
0748     int j;
0749     struct hpet __iomem *hpet;
0750
0751     for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
0752         if ((devp->hd_flags & HPET_OPEN) == 0) {
0753             timer = devp->hd_timer;
0754             break;
0755         }
0756
0757     if (!timer)
0758         return 0;
0759
0760     hpet = hpetp->hp_hpet;
0761     t = read_counter(&timer->hpet_compare);
0762
0763     i = 0;
0764     count = hpet_time_div(hpetp, TICK_CALIBRATE);
0765
0766     local_irq_save(flags);
0767
0768     start = read_counter(&hpet->hpet_mc);
0769
0770     do {
0771         m = read_counter(&hpet->hpet_mc);
0772         write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
0773     } while (i++, (m - start) < count);
0774
0775     local_irq_restore(flags);
0776
0777     return (m - start) / i;
0778 }
0779
0780 static unsigned long hpet_calibrate(struct hpets *hpetp)
0781 {
0782     unsigned long ret = ~0UL;
0783     unsigned long tmp;
0784
0785     /*
0786      * Try to calibrate until return value becomes stable small value.
0787      * If SMI interruption occurs in calibration loop, the return value
0788      * will be big. This avoids its impact.
0789      */
0790     for ( ; ; ) {
0791         tmp = __hpet_calibrate(hpetp);
0792         if (ret <= tmp)
0793             break;
0794         ret = tmp;
0795     }
0796
0797     return ret;
0798 }
0799
0800 int hpet_alloc(struct hpet_data *hdp)
0801 {
0802     u64 cap, mcfg;
0803     struct hpet_dev *devp;
0804     u32 i, ntimer;
0805     struct hpets *hpetp;
0806     struct hpet __iomem *hpet;
0807     static struct hpets *last;
0808     unsigned long period;
0809     unsigned long long temp;
0810     u32 remainder;
0811
0812     /*
0813      * hpet_alloc can be called by platform dependent code.
0814      * If platform dependent code has allocated the hpet that
0815      * ACPI has also reported, then we catch it here.
0816      */
0817     if (hpet_is_known(hdp)) {
0818         printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
0819             __func__);
0820         return 0;
0821     }
0822
0823     hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
0824             GFP_KERNEL);
0825
0826     if (!hpetp)
0827         return -ENOMEM;
0828
0829     hpetp->hp_which = hpet_nhpet++;
0830     hpetp->hp_hpet = hdp->hd_address;
0831     hpetp->hp_hpet_phys = hdp->hd_phys_address;
0832
0833     hpetp->hp_ntimer = hdp->hd_nirqs;
0834
0835     for (i = 0; i < hdp->hd_nirqs; i++)
0836         hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
0837
0838     hpet = hpetp->hp_hpet;
0839
0840     cap = readq(&hpet->hpet_cap);
0841
0842     ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
0843
0844     if (hpetp->hp_ntimer != ntimer) {
0845         printk(KERN_WARNING "hpet: number irqs doesn't agree"
0846                " with number of timers\n");
0847         kfree(hpetp);
0848         return -ENODEV;
0849     }
0850
0851     if (last)
0852         last->hp_next = hpetp;
0853     else
0854         hpets = hpetp;
0855
0856     last = hpetp;
0857
0858     period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
0859         HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
0860     temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
0861     temp += period >> 1; /* round */
0862     do_div(temp, period);
0863     hpetp->hp_tick_freq = temp; /* ticks per second */
0864
0865     printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
0866         hpetp->hp_which, hdp->hd_phys_address,
0867         hpetp->hp_ntimer > 1 ? "s" : "");
0868     for (i = 0; i < hpetp->hp_ntimer; i++)
0869         printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
0870     printk(KERN_CONT "\n");
0871
0872     temp = hpetp->hp_tick_freq;
0873     remainder = do_div(temp, 1000000);
0874     printk(KERN_INFO
0875         "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
0876         hpetp->hp_which, hpetp->hp_ntimer,
0877         cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
0878         (unsigned) temp, remainder);
0879
0880     mcfg = readq(&hpet->hpet_config);
0881     if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
0882         write_counter(0L, &hpet->hpet_mc);
0883         mcfg |= HPET_ENABLE_CNF_MASK;
0884         writeq(mcfg, &hpet->hpet_config);
0885     }
0886
0887     for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
0888         struct hpet_timer __iomem *timer;
0889
0890         timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
0891
0892         devp->hd_hpets = hpetp;
0893         devp->hd_hpet = hpet;
0894         devp->hd_timer = timer;
0895
0896         /*
0897          * If the timer was reserved by platform code,
0898          * then make timer unavailable for opens.
0899          */
0900         if (hdp->hd_state & (1 << i)) {
0901             devp->hd_flags = HPET_OPEN;
0902             continue;
0903         }
0904
0905         init_waitqueue_head(&devp->hd_waitqueue);
0906     }
0907
0908     hpetp->hp_delta = hpet_calibrate(hpetp);
0909
0910 /* This clocksource driver currently only works on ia64 */
0911 #ifdef CONFIG_IA64
0912     if (!hpet_clocksource) {
0913         hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
0914         clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
0915         clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
0916         hpetp->hp_clocksource = &clocksource_hpet;
0917         hpet_clocksource = &clocksource_hpet;
0918     }
0919 #endif
0920
0921     return 0;
0922 }
0923
0924 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
0925 {
0926     struct hpet_data *hdp;
0927     acpi_status status;
0928     struct acpi_resource_address64 addr;
0929
0930     hdp = data;
0931
0932     status = acpi_resource_to_address64(res, &addr);
0933
0934     if (ACPI_SUCCESS(status)) {
0935         hdp->hd_phys_address = addr.address.minimum;
0936         hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
0937         if (!hdp->hd_address)
0938             return AE_ERROR;
0939
0940         if (hpet_is_known(hdp)) {
0941             iounmap(hdp->hd_address);
0942             return AE_ALREADY_EXISTS;
0943         }
0944     } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
0945         struct acpi_resource_fixed_memory32 *fixmem32;
0946
0947         fixmem32 = &res->data.fixed_memory32;
0948
0949         hdp->hd_phys_address = fixmem32->address;
0950         hdp->hd_address = ioremap(fixmem32->address,
0951                         HPET_RANGE_SIZE);
0952         if (!hdp->hd_address)
0953             return AE_ERROR;
0954
0955         if (hpet_is_known(hdp)) {
0956             iounmap(hdp->hd_address);
0957             return AE_ALREADY_EXISTS;
0958         }
0959     } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
0960         struct acpi_resource_extended_irq *irqp;
0961         int i, irq;
0962
0963         irqp = &res->data.extended_irq;
0964
0965         for (i = 0; i < irqp->interrupt_count; i++) {
0966             if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
0967                 break;
0968
0969             irq = acpi_register_gsi(NULL, irqp->interrupts[i],
0970                         irqp->triggering,
0971                         irqp->polarity);
0972             if (irq < 0)
0973                 return AE_ERROR;
0974
0975             hdp->hd_irq[hdp->hd_nirqs] = irq;
0976             hdp->hd_nirqs++;
0977         }
0978     }
0979
0980     return AE_OK;
0981 }
0982
0983 static int hpet_acpi_add(struct acpi_device *device)
0984 {
0985     acpi_status result;
0986     struct hpet_data data;
0987
0988     memset(&data, 0, sizeof(data));
0989
0990     result =
0991         acpi_walk_resources(device->handle, METHOD_NAME__CRS,
0992                 hpet_resources, &data);
0993
0994     if (ACPI_FAILURE(result))
0995         return -ENODEV;
0996
0997     if (!data.hd_address || !data.hd_nirqs) {
0998         if (data.hd_address)
0999             iounmap(data.hd_address);
1000         printk("%s: no address or irqs in _CRS\n", __func__);
1001         return -ENODEV;
1002     }
1003
1004     return hpet_alloc(&data);
1005 }
1006
1007 static const struct acpi_device_id hpet_device_ids[] = {
1008     {"PNP0103", 0},
1009     {"", 0},
1010 };
1011
1012 static struct acpi_driver hpet_acpi_driver = {
1013     .name = "hpet",
1014     .ids = hpet_device_ids,
1015     .ops = {
1016         .add = hpet_acpi_add,
1017         },
1018 };
1019
1020 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1021
1022 static int __init hpet_init(void)
1023 {
1024     int result;
1025
1026     result = misc_register(&hpet_misc);
1027     if (result < 0)
1028         return -ENODEV;
1029
1030     sysctl_header = register_sysctl("dev/hpet", hpet_table);
1031
1032     result = acpi_bus_register_driver(&hpet_acpi_driver);
1033     if (result < 0) {
1034         if (sysctl_header)
1035             unregister_sysctl_table(sysctl_header);
1036         misc_deregister(&hpet_misc);
1037         return result;
1038     }
1039
1040     return 0;
1041 }
1042 device_initcall(hpet_init);
1043
1044 /*
1045 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1046 MODULE_LICENSE("GPL");
1047 */