char/agp/via-agp.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * VIA AGPGART routines.
0004  */
0005
0006 #include <linux/types.h>
0007 #include <linux/module.h>
0008 #include <linux/pci.h>
0009 #include <linux/init.h>
0010 #include <linux/agp_backend.h>
0011 #include "agp.h"
0012
0013 static const struct pci_device_id agp_via_pci_table[];
0014
0015 #define VIA_GARTCTRL    0x80
0016 #define VIA_APSIZE  0x84
0017 #define VIA_ATTBASE 0x88
0018
0019 #define VIA_AGP3_GARTCTRL   0x90
0020 #define VIA_AGP3_APSIZE     0x94
0021 #define VIA_AGP3_ATTBASE    0x98
0022 #define VIA_AGPSEL      0xfd
0023
0024 static int via_fetch_size(void)
0025 {
0026     int i;
0027     u8 temp;
0028     struct aper_size_info_8 *values;
0029
0030     values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
0031     pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp);
0032     for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
0033         if (temp == values[i].size_value) {
0034             agp_bridge->previous_size =
0035                 agp_bridge->current_size = (void *) (values + i);
0036             agp_bridge->aperture_size_idx = i;
0037             return values[i].size;
0038         }
0039     }
0040     printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp);
0041     return 0;
0042 }
0043
0044
0045 static int via_configure(void)
0046 {
0047     struct aper_size_info_8 *current_size;
0048
0049     current_size = A_SIZE_8(agp_bridge->current_size);
0050     /* aperture size */
0051     pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
0052                   current_size->size_value);
0053     /* address to map to */
0054     agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
0055                             AGP_APERTURE_BAR);
0056
0057     /* GART control register */
0058     pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
0059
0060     /* attbase - aperture GATT base */
0061     pci_write_config_dword(agp_bridge->dev, VIA_ATTBASE,
0062                 (agp_bridge->gatt_bus_addr & 0xfffff000) | 3);
0063     return 0;
0064 }
0065
0066
0067 static void via_cleanup(void)
0068 {
0069     struct aper_size_info_8 *previous_size;
0070
0071     previous_size = A_SIZE_8(agp_bridge->previous_size);
0072     pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
0073                   previous_size->size_value);
0074     /* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
0075      * during reinitialization.
0076      */
0077 }
0078
0079
0080 static void via_tlbflush(struct agp_memory *mem)
0081 {
0082     u32 temp;
0083
0084     pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp);
0085     temp |= (1<<7);
0086     pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
0087     temp &= ~(1<<7);
0088     pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
0089 }
0090
0091
0092 static const struct aper_size_info_8 via_generic_sizes[9] =
0093 {
0094     {256, 65536, 6, 0},
0095     {128, 32768, 5, 128},
0096     {64, 16384, 4, 192},
0097     {32, 8192, 3, 224},
0098     {16, 4096, 2, 240},
0099     {8, 2048, 1, 248},
0100     {4, 1024, 0, 252},
0101     {2, 512, 0, 254},
0102     {1, 256, 0, 255}
0103 };
0104
0105
0106 static int via_fetch_size_agp3(void)
0107 {
0108     int i;
0109     u16 temp;
0110     struct aper_size_info_16 *values;
0111
0112     values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
0113     pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp);
0114     temp &= 0xfff;
0115
0116     for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
0117         if (temp == values[i].size_value) {
0118             agp_bridge->previous_size =
0119                 agp_bridge->current_size = (void *) (values + i);
0120             agp_bridge->aperture_size_idx = i;
0121             return values[i].size;
0122         }
0123     }
0124     return 0;
0125 }
0126
0127
0128 static int via_configure_agp3(void)
0129 {
0130     u32 temp;
0131
0132     /* address to map to */
0133     agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
0134                             AGP_APERTURE_BAR);
0135
0136     /* attbase - aperture GATT base */
0137     pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
0138         agp_bridge->gatt_bus_addr & 0xfffff000);
0139
0140     /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
0141      *    translation table first.
0142      * 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
0143      *    graphics AGP aperture for the AGP3.0 port.
0144      */
0145     pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
0146     pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
0147     return 0;
0148 }
0149
0150
0151 static void via_cleanup_agp3(void)
0152 {
0153     struct aper_size_info_16 *previous_size;
0154
0155     previous_size = A_SIZE_16(agp_bridge->previous_size);
0156     pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, previous_size->size_value);
0157 }
0158
0159
0160 static void via_tlbflush_agp3(struct agp_memory *mem)
0161 {
0162     u32 temp;
0163
0164     pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
0165     pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
0166     pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp);
0167 }
0168
0169
0170 static const struct agp_bridge_driver via_agp3_driver = {
0171     .owner          = THIS_MODULE,
0172     .aperture_sizes     = agp3_generic_sizes,
0173     .size_type      = U8_APER_SIZE,
0174     .num_aperture_sizes = 10,
0175     .needs_scratch_page = true,
0176     .configure      = via_configure_agp3,
0177     .fetch_size     = via_fetch_size_agp3,
0178     .cleanup        = via_cleanup_agp3,
0179     .tlb_flush      = via_tlbflush_agp3,
0180     .mask_memory        = agp_generic_mask_memory,
0181     .masks          = NULL,
0182     .agp_enable     = agp_generic_enable,
0183     .cache_flush        = global_cache_flush,
0184     .create_gatt_table  = agp_generic_create_gatt_table,
0185     .free_gatt_table    = agp_generic_free_gatt_table,
0186     .insert_memory      = agp_generic_insert_memory,
0187     .remove_memory      = agp_generic_remove_memory,
0188     .alloc_by_type      = agp_generic_alloc_by_type,
0189     .free_by_type       = agp_generic_free_by_type,
0190     .agp_alloc_page     = agp_generic_alloc_page,
0191     .agp_alloc_pages    = agp_generic_alloc_pages,
0192     .agp_destroy_page   = agp_generic_destroy_page,
0193     .agp_destroy_pages  = agp_generic_destroy_pages,
0194     .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
0195 };
0196
0197 static const struct agp_bridge_driver via_driver = {
0198     .owner          = THIS_MODULE,
0199     .aperture_sizes     = via_generic_sizes,
0200     .size_type      = U8_APER_SIZE,
0201     .num_aperture_sizes = 9,
0202     .needs_scratch_page = true,
0203     .configure      = via_configure,
0204     .fetch_size     = via_fetch_size,
0205     .cleanup        = via_cleanup,
0206     .tlb_flush      = via_tlbflush,
0207     .mask_memory        = agp_generic_mask_memory,
0208     .masks          = NULL,
0209     .agp_enable     = agp_generic_enable,
0210     .cache_flush        = global_cache_flush,
0211     .create_gatt_table  = agp_generic_create_gatt_table,
0212     .free_gatt_table    = agp_generic_free_gatt_table,
0213     .insert_memory      = agp_generic_insert_memory,
0214     .remove_memory      = agp_generic_remove_memory,
0215     .alloc_by_type      = agp_generic_alloc_by_type,
0216     .free_by_type       = agp_generic_free_by_type,
0217     .agp_alloc_page     = agp_generic_alloc_page,
0218     .agp_alloc_pages    = agp_generic_alloc_pages,
0219     .agp_destroy_page   = agp_generic_destroy_page,
0220     .agp_destroy_pages  = agp_generic_destroy_pages,
0221     .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
0222 };
0223
0224 static struct agp_device_ids via_agp_device_ids[] =
0225 {
0226     {
0227         .device_id  = PCI_DEVICE_ID_VIA_82C597_0,
0228         .chipset_name   = "Apollo VP3",
0229     },
0230
0231     {
0232         .device_id  = PCI_DEVICE_ID_VIA_82C598_0,
0233         .chipset_name   = "Apollo MVP3",
0234     },
0235
0236     {
0237         .device_id  = PCI_DEVICE_ID_VIA_8501_0,
0238         .chipset_name   = "Apollo MVP4",
0239     },
0240
0241     /* VT8601 */
0242     {
0243         .device_id  = PCI_DEVICE_ID_VIA_8601_0,
0244         .chipset_name   = "Apollo ProMedia/PLE133Ta",
0245     },
0246
0247     /* VT82C693A / VT28C694T */
0248     {
0249         .device_id  = PCI_DEVICE_ID_VIA_82C691_0,
0250         .chipset_name   = "Apollo Pro 133",
0251     },
0252
0253     {
0254         .device_id  = PCI_DEVICE_ID_VIA_8371_0,
0255         .chipset_name   = "KX133",
0256     },
0257
0258     /* VT8633 */
0259     {
0260         .device_id  = PCI_DEVICE_ID_VIA_8633_0,
0261         .chipset_name   = "Pro 266",
0262     },
0263
0264     {
0265         .device_id  = PCI_DEVICE_ID_VIA_XN266,
0266         .chipset_name   = "Apollo Pro266",
0267     },
0268
0269     /* VT8361 */
0270     {
0271         .device_id  = PCI_DEVICE_ID_VIA_8361,
0272         .chipset_name   = "KLE133",
0273     },
0274
0275     /* VT8365 / VT8362 */
0276     {
0277         .device_id  = PCI_DEVICE_ID_VIA_8363_0,
0278         .chipset_name   = "Twister-K/KT133x/KM133",
0279     },
0280
0281     /* VT8753A */
0282     {
0283         .device_id  = PCI_DEVICE_ID_VIA_8753_0,
0284         .chipset_name   = "P4X266",
0285     },
0286
0287     /* VT8366 */
0288     {
0289         .device_id  = PCI_DEVICE_ID_VIA_8367_0,
0290         .chipset_name   = "KT266/KY266x/KT333",
0291     },
0292
0293     /* VT8633 (for CuMine/ Celeron) */
0294     {
0295         .device_id  = PCI_DEVICE_ID_VIA_8653_0,
0296         .chipset_name   = "Pro266T",
0297     },
0298
0299     /* KM266 / PM266 */
0300     {
0301         .device_id  = PCI_DEVICE_ID_VIA_XM266,
0302         .chipset_name   = "PM266/KM266",
0303     },
0304
0305     /* CLE266 */
0306     {
0307         .device_id  = PCI_DEVICE_ID_VIA_862X_0,
0308         .chipset_name   = "CLE266",
0309     },
0310
0311     {
0312         .device_id  = PCI_DEVICE_ID_VIA_8377_0,
0313         .chipset_name   = "KT400/KT400A/KT600",
0314     },
0315
0316     /* VT8604 / VT8605 / VT8603
0317      * (Apollo Pro133A chipset with S3 Savage4) */
0318     {
0319         .device_id  = PCI_DEVICE_ID_VIA_8605_0,
0320         .chipset_name   = "ProSavage PM133/PL133/PN133"
0321     },
0322
0323     /* P4M266x/P4N266 */
0324     {
0325         .device_id  = PCI_DEVICE_ID_VIA_8703_51_0,
0326         .chipset_name   = "P4M266x/P4N266",
0327     },
0328
0329     /* VT8754 */
0330     {
0331         .device_id  = PCI_DEVICE_ID_VIA_8754C_0,
0332         .chipset_name   = "PT800",
0333     },
0334
0335     /* P4X600 */
0336     {
0337         .device_id  = PCI_DEVICE_ID_VIA_8763_0,
0338         .chipset_name   = "P4X600"
0339     },
0340
0341     /* KM400 */
0342     {
0343         .device_id  = PCI_DEVICE_ID_VIA_8378_0,
0344         .chipset_name   = "KM400/KM400A",
0345     },
0346
0347     /* PT880 */
0348     {
0349         .device_id  = PCI_DEVICE_ID_VIA_PT880,
0350         .chipset_name   = "PT880",
0351     },
0352
0353     /* PT880 Ultra */
0354     {
0355         .device_id  = PCI_DEVICE_ID_VIA_PT880ULTRA,
0356         .chipset_name   = "PT880 Ultra",
0357     },
0358
0359     /* PT890 */
0360     {
0361         .device_id  = PCI_DEVICE_ID_VIA_8783_0,
0362         .chipset_name   = "PT890",
0363     },
0364
0365     /* PM800/PN800/PM880/PN880 */
0366     {
0367         .device_id  = PCI_DEVICE_ID_VIA_PX8X0_0,
0368         .chipset_name   = "PM800/PN800/PM880/PN880",
0369     },
0370     /* KT880 */
0371     {
0372         .device_id  = PCI_DEVICE_ID_VIA_3269_0,
0373         .chipset_name   = "KT880",
0374     },
0375     /* KTxxx/Px8xx */
0376     {
0377         .device_id  = PCI_DEVICE_ID_VIA_83_87XX_1,
0378         .chipset_name   = "VT83xx/VT87xx/KTxxx/Px8xx",
0379     },
0380     /* P4M800 */
0381     {
0382         .device_id  = PCI_DEVICE_ID_VIA_3296_0,
0383         .chipset_name   = "P4M800",
0384     },
0385     /* P4M800CE */
0386     {
0387         .device_id  = PCI_DEVICE_ID_VIA_P4M800CE,
0388         .chipset_name   = "VT3314",
0389     },
0390     /* VT3324 / CX700 */
0391     {
0392         .device_id  = PCI_DEVICE_ID_VIA_VT3324,
0393         .chipset_name   = "CX700",
0394     },
0395     /* VT3336 - this is a chipset for AMD Athlon/K8 CPU. Due to K8's unique
0396      * architecture, the AGP resource and behavior are different from
0397      * the traditional AGP which resides only in chipset. AGP is used
0398      * by 3D driver which wasn't available for the VT3336 and VT3364
0399      * generation until now.  Unfortunately, by testing, VT3364 works
0400      * but VT3336 doesn't. - explanation from via, just leave this as
0401      * as a placeholder to avoid future patches adding it back in.
0402      */
0403 #if 0
0404     {
0405         .device_id  = PCI_DEVICE_ID_VIA_VT3336,
0406         .chipset_name   = "VT3336",
0407     },
0408 #endif
0409     /* P4M890 */
0410     {
0411         .device_id  = PCI_DEVICE_ID_VIA_P4M890,
0412         .chipset_name   = "P4M890",
0413     },
0414     /* P4M900 */
0415     {
0416         .device_id  = PCI_DEVICE_ID_VIA_VT3364,
0417         .chipset_name   = "P4M900",
0418     },
0419     { }, /* dummy final entry, always present */
0420 };
0421
0422
0423 /*
0424  * VIA's AGP3 chipsets do magick to put the AGP bridge compliant
0425  * with the same standards version as the graphics card.
0426  */
0427 static void check_via_agp3 (struct agp_bridge_data *bridge)
0428 {
0429     u8 reg;
0430
0431     pci_read_config_byte(bridge->dev, VIA_AGPSEL, &reg);
0432     /* Check AGP 2.0 compatibility mode. */
0433     if ((reg & (1<<1))==0)
0434         bridge->driver = &via_agp3_driver;
0435 }
0436
0437
0438 static int agp_via_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
0439 {
0440     struct agp_device_ids *devs = via_agp_device_ids;
0441     struct agp_bridge_data *bridge;
0442     int j = 0;
0443     u8 cap_ptr;
0444
0445     cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
0446     if (!cap_ptr)
0447         return -ENODEV;
0448
0449     j = ent - agp_via_pci_table;
0450     printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name);
0451
0452     bridge = agp_alloc_bridge();
0453     if (!bridge)
0454         return -ENOMEM;
0455
0456     bridge->dev = pdev;
0457     bridge->capndx = cap_ptr;
0458     bridge->driver = &via_driver;
0459
0460     /*
0461      * Garg, there are KT400s with KT266 IDs.
0462      */
0463     if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
0464         /* Is there a KT400 subsystem ? */
0465         if (pdev->subsystem_device == PCI_DEVICE_ID_VIA_8377_0) {
0466             printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
0467             check_via_agp3(bridge);
0468         }
0469     }
0470
0471     /* If this is an AGP3 bridge, check which mode its in and adjust. */
0472     get_agp_version(bridge);
0473     if (bridge->major_version >= 3)
0474         check_via_agp3(bridge);
0475
0476     /* Fill in the mode register */
0477     pci_read_config_dword(pdev,
0478             bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
0479
0480     pci_set_drvdata(pdev, bridge);
0481     return agp_add_bridge(bridge);
0482 }
0483
0484 static void agp_via_remove(struct pci_dev *pdev)
0485 {
0486     struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
0487
0488     agp_remove_bridge(bridge);
0489     agp_put_bridge(bridge);
0490 }
0491
0492 #define agp_via_suspend NULL
0493
0494 static int __maybe_unused agp_via_resume(struct device *dev)
0495 {
0496     struct agp_bridge_data *bridge = dev_get_drvdata(dev);
0497
0498     if (bridge->driver == &via_agp3_driver)
0499         return via_configure_agp3();
0500     else if (bridge->driver == &via_driver)
0501         return via_configure();
0502
0503     return 0;
0504 }
0505
0506 /* must be the same order as name table above */
0507 static const struct pci_device_id agp_via_pci_table[] = {
0508 #define ID(x) \
0509     {                       \
0510     .class      = (PCI_CLASS_BRIDGE_HOST << 8), \
0511     .class_mask = ~0,               \
0512     .vendor     = PCI_VENDOR_ID_VIA,        \
0513     .device     = x,                \
0514     .subvendor  = PCI_ANY_ID,           \
0515     .subdevice  = PCI_ANY_ID,           \
0516     }
0517     ID(PCI_DEVICE_ID_VIA_82C597_0),
0518     ID(PCI_DEVICE_ID_VIA_82C598_0),
0519     ID(PCI_DEVICE_ID_VIA_8501_0),
0520     ID(PCI_DEVICE_ID_VIA_8601_0),
0521     ID(PCI_DEVICE_ID_VIA_82C691_0),
0522     ID(PCI_DEVICE_ID_VIA_8371_0),
0523     ID(PCI_DEVICE_ID_VIA_8633_0),
0524     ID(PCI_DEVICE_ID_VIA_XN266),
0525     ID(PCI_DEVICE_ID_VIA_8361),
0526     ID(PCI_DEVICE_ID_VIA_8363_0),
0527     ID(PCI_DEVICE_ID_VIA_8753_0),
0528     ID(PCI_DEVICE_ID_VIA_8367_0),
0529     ID(PCI_DEVICE_ID_VIA_8653_0),
0530     ID(PCI_DEVICE_ID_VIA_XM266),
0531     ID(PCI_DEVICE_ID_VIA_862X_0),
0532     ID(PCI_DEVICE_ID_VIA_8377_0),
0533     ID(PCI_DEVICE_ID_VIA_8605_0),
0534     ID(PCI_DEVICE_ID_VIA_8703_51_0),
0535     ID(PCI_DEVICE_ID_VIA_8754C_0),
0536     ID(PCI_DEVICE_ID_VIA_8763_0),
0537     ID(PCI_DEVICE_ID_VIA_8378_0),
0538     ID(PCI_DEVICE_ID_VIA_PT880),
0539     ID(PCI_DEVICE_ID_VIA_PT880ULTRA),
0540     ID(PCI_DEVICE_ID_VIA_8783_0),
0541     ID(PCI_DEVICE_ID_VIA_PX8X0_0),
0542     ID(PCI_DEVICE_ID_VIA_3269_0),
0543     ID(PCI_DEVICE_ID_VIA_83_87XX_1),
0544     ID(PCI_DEVICE_ID_VIA_3296_0),
0545     ID(PCI_DEVICE_ID_VIA_P4M800CE),
0546     ID(PCI_DEVICE_ID_VIA_VT3324),
0547     ID(PCI_DEVICE_ID_VIA_P4M890),
0548     ID(PCI_DEVICE_ID_VIA_VT3364),
0549     { }
0550 };
0551
0552 MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
0553
0554 static SIMPLE_DEV_PM_OPS(agp_via_pm_ops, agp_via_suspend, agp_via_resume);
0555
0556 static struct pci_driver agp_via_pci_driver = {
0557     .name       = "agpgart-via",
0558     .id_table   = agp_via_pci_table,
0559     .probe      = agp_via_probe,
0560     .remove     = agp_via_remove,
0561     .driver.pm      = &agp_via_pm_ops,
0562 };
0563
0564
0565 static int __init agp_via_init(void)
0566 {
0567     if (agp_off)
0568         return -EINVAL;
0569     return pci_register_driver(&agp_via_pci_driver);
0570 }
0571
0572 static void __exit agp_via_cleanup(void)
0573 {
0574     pci_unregister_driver(&agp_via_pci_driver);
0575 }
0576
0577 module_init(agp_via_init);
0578 module_exit(agp_via_cleanup);
0579
0580 MODULE_LICENSE("GPL");
0581 MODULE_AUTHOR("Dave Jones");