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0001 /*
0002  * AGPGART driver.
0003  * Copyright (C) 2004 Silicon Graphics, Inc.
0004  * Copyright (C) 2002-2005 Dave Jones.
0005  * Copyright (C) 1999 Jeff Hartmann.
0006  * Copyright (C) 1999 Precision Insight, Inc.
0007  * Copyright (C) 1999 Xi Graphics, Inc.
0008  *
0009  * Permission is hereby granted, free of charge, to any person obtaining a
0010  * copy of this software and associated documentation files (the "Software"),
0011  * to deal in the Software without restriction, including without limitation
0012  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0013  * and/or sell copies of the Software, and to permit persons to whom the
0014  * Software is furnished to do so, subject to the following conditions:
0015  *
0016  * The above copyright notice and this permission notice shall be included
0017  * in all copies or substantial portions of the Software.
0018  *
0019  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
0020  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0021  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0022  * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
0023  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
0024  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
0025  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0026  *
0027  * TODO:
0028  * - Allocate more than order 0 pages to avoid too much linear map splitting.
0029  */
0030 #include <linux/module.h>
0031 #include <linux/pci.h>
0032 #include <linux/pagemap.h>
0033 #include <linux/miscdevice.h>
0034 #include <linux/pm.h>
0035 #include <linux/agp_backend.h>
0036 #include <linux/vmalloc.h>
0037 #include <linux/dma-mapping.h>
0038 #include <linux/mm.h>
0039 #include <linux/sched.h>
0040 #include <linux/slab.h>
0041 #include <asm/io.h>
0042 #ifdef CONFIG_X86
0043 #include <asm/set_memory.h>
0044 #endif
0045 #include "agp.h"
0046 
0047 __u32 *agp_gatt_table;
0048 int agp_memory_reserved;
0049 
0050 /*
0051  * Needed by the Nforce GART driver for the time being. Would be
0052  * nice to do this some other way instead of needing this export.
0053  */
0054 EXPORT_SYMBOL_GPL(agp_memory_reserved);
0055 
0056 /*
0057  * Generic routines for handling agp_memory structures -
0058  * They use the basic page allocation routines to do the brunt of the work.
0059  */
0060 
0061 void agp_free_key(int key)
0062 {
0063     if (key < 0)
0064         return;
0065 
0066     if (key < MAXKEY)
0067         clear_bit(key, agp_bridge->key_list);
0068 }
0069 EXPORT_SYMBOL(agp_free_key);
0070 
0071 
0072 static int agp_get_key(void)
0073 {
0074     int bit;
0075 
0076     bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
0077     if (bit < MAXKEY) {
0078         set_bit(bit, agp_bridge->key_list);
0079         return bit;
0080     }
0081     return -1;
0082 }
0083 
0084 /*
0085  * Use kmalloc if possible for the page list. Otherwise fall back to
0086  * vmalloc. This speeds things up and also saves memory for small AGP
0087  * regions.
0088  */
0089 
0090 void agp_alloc_page_array(size_t size, struct agp_memory *mem)
0091 {
0092     mem->pages = kvmalloc(size, GFP_KERNEL);
0093 }
0094 EXPORT_SYMBOL(agp_alloc_page_array);
0095 
0096 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
0097 {
0098     struct agp_memory *new;
0099     unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
0100 
0101     if (INT_MAX/sizeof(struct page *) < num_agp_pages)
0102         return NULL;
0103 
0104     new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
0105     if (new == NULL)
0106         return NULL;
0107 
0108     new->key = agp_get_key();
0109 
0110     if (new->key < 0) {
0111         kfree(new);
0112         return NULL;
0113     }
0114 
0115     agp_alloc_page_array(alloc_size, new);
0116 
0117     if (new->pages == NULL) {
0118         agp_free_key(new->key);
0119         kfree(new);
0120         return NULL;
0121     }
0122     new->num_scratch_pages = 0;
0123     return new;
0124 }
0125 
0126 struct agp_memory *agp_create_memory(int scratch_pages)
0127 {
0128     struct agp_memory *new;
0129 
0130     new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
0131     if (new == NULL)
0132         return NULL;
0133 
0134     new->key = agp_get_key();
0135 
0136     if (new->key < 0) {
0137         kfree(new);
0138         return NULL;
0139     }
0140 
0141     agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
0142 
0143     if (new->pages == NULL) {
0144         agp_free_key(new->key);
0145         kfree(new);
0146         return NULL;
0147     }
0148     new->num_scratch_pages = scratch_pages;
0149     new->type = AGP_NORMAL_MEMORY;
0150     return new;
0151 }
0152 EXPORT_SYMBOL(agp_create_memory);
0153 
0154 /**
0155  *  agp_free_memory - free memory associated with an agp_memory pointer.
0156  *
0157  *  @curr:      agp_memory pointer to be freed.
0158  *
0159  *  It is the only function that can be called when the backend is not owned
0160  *  by the caller.  (So it can free memory on client death.)
0161  */
0162 void agp_free_memory(struct agp_memory *curr)
0163 {
0164     size_t i;
0165 
0166     if (curr == NULL)
0167         return;
0168 
0169     if (curr->is_bound)
0170         agp_unbind_memory(curr);
0171 
0172     if (curr->type >= AGP_USER_TYPES) {
0173         agp_generic_free_by_type(curr);
0174         return;
0175     }
0176 
0177     if (curr->type != 0) {
0178         curr->bridge->driver->free_by_type(curr);
0179         return;
0180     }
0181     if (curr->page_count != 0) {
0182         if (curr->bridge->driver->agp_destroy_pages) {
0183             curr->bridge->driver->agp_destroy_pages(curr);
0184         } else {
0185 
0186             for (i = 0; i < curr->page_count; i++) {
0187                 curr->bridge->driver->agp_destroy_page(
0188                     curr->pages[i],
0189                     AGP_PAGE_DESTROY_UNMAP);
0190             }
0191             for (i = 0; i < curr->page_count; i++) {
0192                 curr->bridge->driver->agp_destroy_page(
0193                     curr->pages[i],
0194                     AGP_PAGE_DESTROY_FREE);
0195             }
0196         }
0197     }
0198     agp_free_key(curr->key);
0199     agp_free_page_array(curr);
0200     kfree(curr);
0201 }
0202 EXPORT_SYMBOL(agp_free_memory);
0203 
0204 #define ENTRIES_PER_PAGE        (PAGE_SIZE / sizeof(unsigned long))
0205 
0206 /**
0207  *  agp_allocate_memory  -  allocate a group of pages of a certain type.
0208  *
0209  *  @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
0210  *  @page_count:    size_t argument of the number of pages
0211  *  @type:  u32 argument of the type of memory to be allocated.
0212  *
0213  *  Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
0214  *  maps to physical ram.  Any other type is device dependent.
0215  *
0216  *  It returns NULL whenever memory is unavailable.
0217  */
0218 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
0219                     size_t page_count, u32 type)
0220 {
0221     int scratch_pages;
0222     struct agp_memory *new;
0223     size_t i;
0224     int cur_memory;
0225 
0226     if (!bridge)
0227         return NULL;
0228 
0229     cur_memory = atomic_read(&bridge->current_memory_agp);
0230     if ((cur_memory + page_count > bridge->max_memory_agp) ||
0231         (cur_memory + page_count < page_count))
0232         return NULL;
0233 
0234     if (type >= AGP_USER_TYPES) {
0235         new = agp_generic_alloc_user(page_count, type);
0236         if (new)
0237             new->bridge = bridge;
0238         return new;
0239     }
0240 
0241     if (type != 0) {
0242         new = bridge->driver->alloc_by_type(page_count, type);
0243         if (new)
0244             new->bridge = bridge;
0245         return new;
0246     }
0247 
0248     scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
0249 
0250     new = agp_create_memory(scratch_pages);
0251 
0252     if (new == NULL)
0253         return NULL;
0254 
0255     if (bridge->driver->agp_alloc_pages) {
0256         if (bridge->driver->agp_alloc_pages(bridge, new, page_count)) {
0257             agp_free_memory(new);
0258             return NULL;
0259         }
0260         new->bridge = bridge;
0261         return new;
0262     }
0263 
0264     for (i = 0; i < page_count; i++) {
0265         struct page *page = bridge->driver->agp_alloc_page(bridge);
0266 
0267         if (page == NULL) {
0268             agp_free_memory(new);
0269             return NULL;
0270         }
0271         new->pages[i] = page;
0272         new->page_count++;
0273     }
0274     new->bridge = bridge;
0275 
0276     return new;
0277 }
0278 EXPORT_SYMBOL(agp_allocate_memory);
0279 
0280 
0281 /* End - Generic routines for handling agp_memory structures */
0282 
0283 
0284 static int agp_return_size(void)
0285 {
0286     int current_size;
0287     void *temp;
0288 
0289     temp = agp_bridge->current_size;
0290 
0291     switch (agp_bridge->driver->size_type) {
0292     case U8_APER_SIZE:
0293         current_size = A_SIZE_8(temp)->size;
0294         break;
0295     case U16_APER_SIZE:
0296         current_size = A_SIZE_16(temp)->size;
0297         break;
0298     case U32_APER_SIZE:
0299         current_size = A_SIZE_32(temp)->size;
0300         break;
0301     case LVL2_APER_SIZE:
0302         current_size = A_SIZE_LVL2(temp)->size;
0303         break;
0304     case FIXED_APER_SIZE:
0305         current_size = A_SIZE_FIX(temp)->size;
0306         break;
0307     default:
0308         current_size = 0;
0309         break;
0310     }
0311 
0312     current_size -= (agp_memory_reserved / (1024*1024));
0313     if (current_size <0)
0314         current_size = 0;
0315     return current_size;
0316 }
0317 
0318 
0319 int agp_num_entries(void)
0320 {
0321     int num_entries;
0322     void *temp;
0323 
0324     temp = agp_bridge->current_size;
0325 
0326     switch (agp_bridge->driver->size_type) {
0327     case U8_APER_SIZE:
0328         num_entries = A_SIZE_8(temp)->num_entries;
0329         break;
0330     case U16_APER_SIZE:
0331         num_entries = A_SIZE_16(temp)->num_entries;
0332         break;
0333     case U32_APER_SIZE:
0334         num_entries = A_SIZE_32(temp)->num_entries;
0335         break;
0336     case LVL2_APER_SIZE:
0337         num_entries = A_SIZE_LVL2(temp)->num_entries;
0338         break;
0339     case FIXED_APER_SIZE:
0340         num_entries = A_SIZE_FIX(temp)->num_entries;
0341         break;
0342     default:
0343         num_entries = 0;
0344         break;
0345     }
0346 
0347     num_entries -= agp_memory_reserved>>PAGE_SHIFT;
0348     if (num_entries<0)
0349         num_entries = 0;
0350     return num_entries;
0351 }
0352 EXPORT_SYMBOL_GPL(agp_num_entries);
0353 
0354 
0355 /**
0356  *  agp_copy_info  -  copy bridge state information
0357  *
0358  *  @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
0359  *  @info:      agp_kern_info pointer.  The caller should insure that this pointer is valid.
0360  *
0361  *  This function copies information about the agp bridge device and the state of
0362  *  the agp backend into an agp_kern_info pointer.
0363  */
0364 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
0365 {
0366     memset(info, 0, sizeof(struct agp_kern_info));
0367     if (!bridge) {
0368         info->chipset = NOT_SUPPORTED;
0369         return -EIO;
0370     }
0371 
0372     info->version.major = bridge->version->major;
0373     info->version.minor = bridge->version->minor;
0374     info->chipset = SUPPORTED;
0375     info->device = bridge->dev;
0376     if (bridge->mode & AGPSTAT_MODE_3_0)
0377         info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
0378     else
0379         info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
0380     info->aper_base = bridge->gart_bus_addr;
0381     info->aper_size = agp_return_size();
0382     info->max_memory = bridge->max_memory_agp;
0383     info->current_memory = atomic_read(&bridge->current_memory_agp);
0384     info->cant_use_aperture = bridge->driver->cant_use_aperture;
0385     info->vm_ops = bridge->vm_ops;
0386     info->page_mask = ~0UL;
0387     return 0;
0388 }
0389 EXPORT_SYMBOL(agp_copy_info);
0390 
0391 /* End - Routine to copy over information structure */
0392 
0393 /*
0394  * Routines for handling swapping of agp_memory into the GATT -
0395  * These routines take agp_memory and insert them into the GATT.
0396  * They call device specific routines to actually write to the GATT.
0397  */
0398 
0399 /**
0400  *  agp_bind_memory  -  Bind an agp_memory structure into the GATT.
0401  *
0402  *  @curr:      agp_memory pointer
0403  *  @pg_start:  an offset into the graphics aperture translation table
0404  *
0405  *  It returns -EINVAL if the pointer == NULL.
0406  *  It returns -EBUSY if the area of the table requested is already in use.
0407  */
0408 int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
0409 {
0410     int ret_val;
0411 
0412     if (curr == NULL)
0413         return -EINVAL;
0414 
0415     if (curr->is_bound) {
0416         printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
0417         return -EINVAL;
0418     }
0419     if (!curr->is_flushed) {
0420         curr->bridge->driver->cache_flush();
0421         curr->is_flushed = true;
0422     }
0423 
0424     ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
0425 
0426     if (ret_val != 0)
0427         return ret_val;
0428 
0429     curr->is_bound = true;
0430     curr->pg_start = pg_start;
0431     spin_lock(&agp_bridge->mapped_lock);
0432     list_add(&curr->mapped_list, &agp_bridge->mapped_list);
0433     spin_unlock(&agp_bridge->mapped_lock);
0434 
0435     return 0;
0436 }
0437 EXPORT_SYMBOL(agp_bind_memory);
0438 
0439 
0440 /**
0441  *  agp_unbind_memory  -  Removes an agp_memory structure from the GATT
0442  *
0443  * @curr:   agp_memory pointer to be removed from the GATT.
0444  *
0445  * It returns -EINVAL if this piece of agp_memory is not currently bound to
0446  * the graphics aperture translation table or if the agp_memory pointer == NULL
0447  */
0448 int agp_unbind_memory(struct agp_memory *curr)
0449 {
0450     int ret_val;
0451 
0452     if (curr == NULL)
0453         return -EINVAL;
0454 
0455     if (!curr->is_bound) {
0456         printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
0457         return -EINVAL;
0458     }
0459 
0460     ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
0461 
0462     if (ret_val != 0)
0463         return ret_val;
0464 
0465     curr->is_bound = false;
0466     curr->pg_start = 0;
0467     spin_lock(&curr->bridge->mapped_lock);
0468     list_del(&curr->mapped_list);
0469     spin_unlock(&curr->bridge->mapped_lock);
0470     return 0;
0471 }
0472 EXPORT_SYMBOL(agp_unbind_memory);
0473 
0474 
0475 /* End - Routines for handling swapping of agp_memory into the GATT */
0476 
0477 
0478 /* Generic Agp routines - Start */
0479 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
0480 {
0481     u32 tmp;
0482 
0483     if (*requested_mode & AGP2_RESERVED_MASK) {
0484         printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
0485             *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
0486         *requested_mode &= ~AGP2_RESERVED_MASK;
0487     }
0488 
0489     /*
0490      * Some dumb bridges are programmed to disobey the AGP2 spec.
0491      * This is likely a BIOS misprogramming rather than poweron default, or
0492      * it would be a lot more common.
0493      * https://bugs.freedesktop.org/show_bug.cgi?id=8816
0494      * AGPv2 spec 6.1.9 states:
0495      *   The RATE field indicates the data transfer rates supported by this
0496      *   device. A.G.P. devices must report all that apply.
0497      * Fix them up as best we can.
0498      */
0499     switch (*bridge_agpstat & 7) {
0500     case 4:
0501         *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
0502         printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate. "
0503             "Fixing up support for x2 & x1\n");
0504         break;
0505     case 2:
0506         *bridge_agpstat |= AGPSTAT2_1X;
0507         printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate. "
0508             "Fixing up support for x1\n");
0509         break;
0510     default:
0511         break;
0512     }
0513 
0514     /* Check the speed bits make sense. Only one should be set. */
0515     tmp = *requested_mode & 7;
0516     switch (tmp) {
0517         case 0:
0518             printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
0519             *requested_mode |= AGPSTAT2_1X;
0520             break;
0521         case 1:
0522         case 2:
0523             break;
0524         case 3:
0525             *requested_mode &= ~(AGPSTAT2_1X);  /* rate=2 */
0526             break;
0527         case 4:
0528             break;
0529         case 5:
0530         case 6:
0531         case 7:
0532             *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
0533             break;
0534     }
0535 
0536     /* disable SBA if it's not supported */
0537     if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
0538         *bridge_agpstat &= ~AGPSTAT_SBA;
0539 
0540     /* Set rate */
0541     if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
0542         *bridge_agpstat &= ~AGPSTAT2_4X;
0543 
0544     if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
0545         *bridge_agpstat &= ~AGPSTAT2_2X;
0546 
0547     if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
0548         *bridge_agpstat &= ~AGPSTAT2_1X;
0549 
0550     /* Now we know what mode it should be, clear out the unwanted bits. */
0551     if (*bridge_agpstat & AGPSTAT2_4X)
0552         *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X);    /* 4X */
0553 
0554     if (*bridge_agpstat & AGPSTAT2_2X)
0555         *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X);    /* 2X */
0556 
0557     if (*bridge_agpstat & AGPSTAT2_1X)
0558         *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);    /* 1X */
0559 
0560     /* Apply any errata. */
0561     if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
0562         *bridge_agpstat &= ~AGPSTAT_FW;
0563 
0564     if (agp_bridge->flags & AGP_ERRATA_SBA)
0565         *bridge_agpstat &= ~AGPSTAT_SBA;
0566 
0567     if (agp_bridge->flags & AGP_ERRATA_1X) {
0568         *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
0569         *bridge_agpstat |= AGPSTAT2_1X;
0570     }
0571 
0572     /* If we've dropped down to 1X, disable fast writes. */
0573     if (*bridge_agpstat & AGPSTAT2_1X)
0574         *bridge_agpstat &= ~AGPSTAT_FW;
0575 }
0576 
0577 /*
0578  * requested_mode = Mode requested by (typically) X.
0579  * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
0580  * vga_agpstat = PCI_AGP_STATUS from graphic card.
0581  */
0582 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
0583 {
0584     u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
0585     u32 tmp;
0586 
0587     if (*requested_mode & AGP3_RESERVED_MASK) {
0588         printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
0589             *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
0590         *requested_mode &= ~AGP3_RESERVED_MASK;
0591     }
0592 
0593     /* Check the speed bits make sense. */
0594     tmp = *requested_mode & 7;
0595     if (tmp == 0) {
0596         printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
0597         *requested_mode |= AGPSTAT3_4X;
0598     }
0599     if (tmp >= 3) {
0600         printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
0601         *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
0602     }
0603 
0604     /* ARQSZ - Set the value to the maximum one.
0605      * Don't allow the mode register to override values. */
0606     *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
0607         max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
0608 
0609     /* Calibration cycle.
0610      * Don't allow the mode register to override values. */
0611     *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
0612         min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
0613 
0614     /* SBA *must* be supported for AGP v3 */
0615     *bridge_agpstat |= AGPSTAT_SBA;
0616 
0617     /*
0618      * Set speed.
0619      * Check for invalid speeds. This can happen when applications
0620      * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
0621      */
0622     if (*requested_mode & AGPSTAT_MODE_3_0) {
0623         /*
0624          * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
0625          * have been passed a 3.0 mode, but with 2.x speed bits set.
0626          * AGP2.x 4x -> AGP3.0 4x.
0627          */
0628         if (*requested_mode & AGPSTAT2_4X) {
0629             printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
0630                         current->comm, *requested_mode);
0631             *requested_mode &= ~AGPSTAT2_4X;
0632             *requested_mode |= AGPSTAT3_4X;
0633         }
0634     } else {
0635         /*
0636          * The caller doesn't know what they are doing. We are in 3.0 mode,
0637          * but have been passed an AGP 2.x mode.
0638          * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
0639          */
0640         printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
0641                     current->comm, *requested_mode);
0642         *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
0643         *requested_mode |= AGPSTAT3_4X;
0644     }
0645 
0646     if (*requested_mode & AGPSTAT3_8X) {
0647         if (!(*bridge_agpstat & AGPSTAT3_8X)) {
0648             *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
0649             *bridge_agpstat |= AGPSTAT3_4X;
0650             printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
0651             return;
0652         }
0653         if (!(*vga_agpstat & AGPSTAT3_8X)) {
0654             *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
0655             *bridge_agpstat |= AGPSTAT3_4X;
0656             printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
0657             return;
0658         }
0659         /* All set, bridge & device can do AGP x8*/
0660         *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
0661         goto done;
0662 
0663     } else if (*requested_mode & AGPSTAT3_4X) {
0664         *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
0665         *bridge_agpstat |= AGPSTAT3_4X;
0666         goto done;
0667 
0668     } else {
0669 
0670         /*
0671          * If we didn't specify an AGP mode, we see if both
0672          * the graphics card, and the bridge can do x8, and use if so.
0673          * If not, we fall back to x4 mode.
0674          */
0675         if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
0676             printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
0677                 "supported by bridge & card (x8).\n");
0678             *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
0679             *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
0680         } else {
0681             printk(KERN_INFO PFX "Fell back to AGPx4 mode because ");
0682             if (!(*bridge_agpstat & AGPSTAT3_8X)) {
0683                 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
0684                     *bridge_agpstat, origbridge);
0685                 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
0686                 *bridge_agpstat |= AGPSTAT3_4X;
0687             }
0688             if (!(*vga_agpstat & AGPSTAT3_8X)) {
0689                 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
0690                     *vga_agpstat, origvga);
0691                 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
0692                 *vga_agpstat |= AGPSTAT3_4X;
0693             }
0694         }
0695     }
0696 
0697 done:
0698     /* Apply any errata. */
0699     if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
0700         *bridge_agpstat &= ~AGPSTAT_FW;
0701 
0702     if (agp_bridge->flags & AGP_ERRATA_SBA)
0703         *bridge_agpstat &= ~AGPSTAT_SBA;
0704 
0705     if (agp_bridge->flags & AGP_ERRATA_1X) {
0706         *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
0707         *bridge_agpstat |= AGPSTAT2_1X;
0708     }
0709 }
0710 
0711 
0712 /**
0713  * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
0714  * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
0715  * @requested_mode: requested agp_stat from userspace (Typically from X)
0716  * @bridge_agpstat: current agp_stat from AGP bridge.
0717  *
0718  * This function will hunt for an AGP graphics card, and try to match
0719  * the requested mode to the capabilities of both the bridge and the card.
0720  */
0721 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
0722 {
0723     struct pci_dev *device = NULL;
0724     u32 vga_agpstat;
0725     u8 cap_ptr;
0726 
0727     for (;;) {
0728         device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
0729         if (!device) {
0730             printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
0731             return 0;
0732         }
0733         cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
0734         if (cap_ptr)
0735             break;
0736     }
0737 
0738     /*
0739      * Ok, here we have a AGP device. Disable impossible
0740      * settings, and adjust the readqueue to the minimum.
0741      */
0742     pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
0743 
0744     /* adjust RQ depth */
0745     bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
0746          min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
0747          min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
0748 
0749     /* disable FW if it's not supported */
0750     if (!((bridge_agpstat & AGPSTAT_FW) &&
0751          (vga_agpstat & AGPSTAT_FW) &&
0752          (requested_mode & AGPSTAT_FW)))
0753         bridge_agpstat &= ~AGPSTAT_FW;
0754 
0755     /* Check to see if we are operating in 3.0 mode */
0756     if (agp_bridge->mode & AGPSTAT_MODE_3_0)
0757         agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
0758     else
0759         agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
0760 
0761     pci_dev_put(device);
0762     return bridge_agpstat;
0763 }
0764 EXPORT_SYMBOL(agp_collect_device_status);
0765 
0766 
0767 void agp_device_command(u32 bridge_agpstat, bool agp_v3)
0768 {
0769     struct pci_dev *device = NULL;
0770     int mode;
0771 
0772     mode = bridge_agpstat & 0x7;
0773     if (agp_v3)
0774         mode *= 4;
0775 
0776     for_each_pci_dev(device) {
0777         u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
0778         if (!agp)
0779             continue;
0780 
0781         dev_info(&device->dev, "putting AGP V%d device into %dx mode\n",
0782              agp_v3 ? 3 : 2, mode);
0783         pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
0784     }
0785 }
0786 EXPORT_SYMBOL(agp_device_command);
0787 
0788 
0789 void get_agp_version(struct agp_bridge_data *bridge)
0790 {
0791     u32 ncapid;
0792 
0793     /* Exit early if already set by errata workarounds. */
0794     if (bridge->major_version != 0)
0795         return;
0796 
0797     pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
0798     bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
0799     bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
0800 }
0801 EXPORT_SYMBOL(get_agp_version);
0802 
0803 
0804 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
0805 {
0806     u32 bridge_agpstat, temp;
0807 
0808     get_agp_version(agp_bridge);
0809 
0810     dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
0811          agp_bridge->major_version, agp_bridge->minor_version);
0812 
0813     pci_read_config_dword(agp_bridge->dev,
0814               agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
0815 
0816     bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
0817     if (bridge_agpstat == 0)
0818         /* Something bad happened. FIXME: Return error code? */
0819         return;
0820 
0821     bridge_agpstat |= AGPSTAT_AGP_ENABLE;
0822 
0823     /* Do AGP version specific frobbing. */
0824     if (bridge->major_version >= 3) {
0825         if (bridge->mode & AGPSTAT_MODE_3_0) {
0826             /* If we have 3.5, we can do the isoch stuff. */
0827             if (bridge->minor_version >= 5)
0828                 agp_3_5_enable(bridge);
0829             agp_device_command(bridge_agpstat, true);
0830             return;
0831         } else {
0832             /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
0833             bridge_agpstat &= ~(7<<10) ;
0834             pci_read_config_dword(bridge->dev,
0835                     bridge->capndx+AGPCTRL, &temp);
0836             temp |= (1<<9);
0837             pci_write_config_dword(bridge->dev,
0838                     bridge->capndx+AGPCTRL, temp);
0839 
0840             dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
0841         }
0842     }
0843 
0844     /* AGP v<3 */
0845     agp_device_command(bridge_agpstat, false);
0846 }
0847 EXPORT_SYMBOL(agp_generic_enable);
0848 
0849 
0850 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
0851 {
0852     char *table;
0853     char *table_end;
0854     int page_order;
0855     int num_entries;
0856     int i;
0857     void *temp;
0858     struct page *page;
0859 
0860     /* The generic routines can't handle 2 level gatt's */
0861     if (bridge->driver->size_type == LVL2_APER_SIZE)
0862         return -EINVAL;
0863 
0864     table = NULL;
0865     i = bridge->aperture_size_idx;
0866     temp = bridge->current_size;
0867     page_order = num_entries = 0;
0868 
0869     if (bridge->driver->size_type != FIXED_APER_SIZE) {
0870         do {
0871             switch (bridge->driver->size_type) {
0872             case U8_APER_SIZE:
0873                 page_order =
0874                     A_SIZE_8(temp)->page_order;
0875                 num_entries =
0876                     A_SIZE_8(temp)->num_entries;
0877                 break;
0878             case U16_APER_SIZE:
0879                 page_order = A_SIZE_16(temp)->page_order;
0880                 num_entries = A_SIZE_16(temp)->num_entries;
0881                 break;
0882             case U32_APER_SIZE:
0883                 page_order = A_SIZE_32(temp)->page_order;
0884                 num_entries = A_SIZE_32(temp)->num_entries;
0885                 break;
0886                 /* This case will never really happen. */
0887             case FIXED_APER_SIZE:
0888             case LVL2_APER_SIZE:
0889             default:
0890                 page_order = num_entries = 0;
0891                 break;
0892             }
0893 
0894             table = alloc_gatt_pages(page_order);
0895 
0896             if (table == NULL) {
0897                 i++;
0898                 switch (bridge->driver->size_type) {
0899                 case U8_APER_SIZE:
0900                     bridge->current_size = A_IDX8(bridge);
0901                     break;
0902                 case U16_APER_SIZE:
0903                     bridge->current_size = A_IDX16(bridge);
0904                     break;
0905                 case U32_APER_SIZE:
0906                     bridge->current_size = A_IDX32(bridge);
0907                     break;
0908                 /* These cases will never really happen. */
0909                 case FIXED_APER_SIZE:
0910                 case LVL2_APER_SIZE:
0911                 default:
0912                     break;
0913                 }
0914                 temp = bridge->current_size;
0915             } else {
0916                 bridge->aperture_size_idx = i;
0917             }
0918         } while (!table && (i < bridge->driver->num_aperture_sizes));
0919     } else {
0920         page_order = ((struct aper_size_info_fixed *) temp)->page_order;
0921         num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
0922         table = alloc_gatt_pages(page_order);
0923     }
0924 
0925     if (table == NULL)
0926         return -ENOMEM;
0927 
0928     table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
0929 
0930     for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
0931         SetPageReserved(page);
0932 
0933     bridge->gatt_table_real = (u32 *) table;
0934     agp_gatt_table = (void *)table;
0935 
0936     bridge->driver->cache_flush();
0937 #ifdef CONFIG_X86
0938     if (set_memory_uc((unsigned long)table, 1 << page_order))
0939         printk(KERN_WARNING "Could not set GATT table memory to UC!\n");
0940 
0941     bridge->gatt_table = (u32 __iomem *)table;
0942 #else
0943     bridge->gatt_table = ioremap(virt_to_phys(table),
0944                     (PAGE_SIZE * (1 << page_order)));
0945     bridge->driver->cache_flush();
0946 #endif
0947 
0948     if (bridge->gatt_table == NULL) {
0949         for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
0950             ClearPageReserved(page);
0951 
0952         free_gatt_pages(table, page_order);
0953 
0954         return -ENOMEM;
0955     }
0956     bridge->gatt_bus_addr = virt_to_phys(bridge->gatt_table_real);
0957 
0958     /* AK: bogus, should encode addresses > 4GB */
0959     for (i = 0; i < num_entries; i++) {
0960         writel(bridge->scratch_page, bridge->gatt_table+i);
0961         readl(bridge->gatt_table+i);    /* PCI Posting. */
0962     }
0963 
0964     return 0;
0965 }
0966 EXPORT_SYMBOL(agp_generic_create_gatt_table);
0967 
0968 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
0969 {
0970     int page_order;
0971     char *table, *table_end;
0972     void *temp;
0973     struct page *page;
0974 
0975     temp = bridge->current_size;
0976 
0977     switch (bridge->driver->size_type) {
0978     case U8_APER_SIZE:
0979         page_order = A_SIZE_8(temp)->page_order;
0980         break;
0981     case U16_APER_SIZE:
0982         page_order = A_SIZE_16(temp)->page_order;
0983         break;
0984     case U32_APER_SIZE:
0985         page_order = A_SIZE_32(temp)->page_order;
0986         break;
0987     case FIXED_APER_SIZE:
0988         page_order = A_SIZE_FIX(temp)->page_order;
0989         break;
0990     case LVL2_APER_SIZE:
0991         /* The generic routines can't deal with 2 level gatt's */
0992         return -EINVAL;
0993     default:
0994         page_order = 0;
0995         break;
0996     }
0997 
0998     /* Do not worry about freeing memory, because if this is
0999      * called, then all agp memory is deallocated and removed
1000      * from the table. */
1001 
1002 #ifdef CONFIG_X86
1003     set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1004 #else
1005     iounmap(bridge->gatt_table);
1006 #endif
1007     table = (char *) bridge->gatt_table_real;
1008     table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1009 
1010     for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1011         ClearPageReserved(page);
1012 
1013     free_gatt_pages(bridge->gatt_table_real, page_order);
1014 
1015     agp_gatt_table = NULL;
1016     bridge->gatt_table = NULL;
1017     bridge->gatt_table_real = NULL;
1018     bridge->gatt_bus_addr = 0;
1019 
1020     return 0;
1021 }
1022 EXPORT_SYMBOL(agp_generic_free_gatt_table);
1023 
1024 
1025 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1026 {
1027     int num_entries;
1028     size_t i;
1029     off_t j;
1030     void *temp;
1031     struct agp_bridge_data *bridge;
1032     int mask_type;
1033 
1034     bridge = mem->bridge;
1035     if (!bridge)
1036         return -EINVAL;
1037 
1038     if (mem->page_count == 0)
1039         return 0;
1040 
1041     temp = bridge->current_size;
1042 
1043     switch (bridge->driver->size_type) {
1044     case U8_APER_SIZE:
1045         num_entries = A_SIZE_8(temp)->num_entries;
1046         break;
1047     case U16_APER_SIZE:
1048         num_entries = A_SIZE_16(temp)->num_entries;
1049         break;
1050     case U32_APER_SIZE:
1051         num_entries = A_SIZE_32(temp)->num_entries;
1052         break;
1053     case FIXED_APER_SIZE:
1054         num_entries = A_SIZE_FIX(temp)->num_entries;
1055         break;
1056     case LVL2_APER_SIZE:
1057         /* The generic routines can't deal with 2 level gatt's */
1058         return -EINVAL;
1059     default:
1060         num_entries = 0;
1061         break;
1062     }
1063 
1064     num_entries -= agp_memory_reserved/PAGE_SIZE;
1065     if (num_entries < 0) num_entries = 0;
1066 
1067     if (type != mem->type)
1068         return -EINVAL;
1069 
1070     mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1071     if (mask_type != 0) {
1072         /* The generic routines know nothing of memory types */
1073         return -EINVAL;
1074     }
1075 
1076     if (((pg_start + mem->page_count) > num_entries) ||
1077         ((pg_start + mem->page_count) < pg_start))
1078         return -EINVAL;
1079 
1080     j = pg_start;
1081 
1082     while (j < (pg_start + mem->page_count)) {
1083         if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1084             return -EBUSY;
1085         j++;
1086     }
1087 
1088     if (!mem->is_flushed) {
1089         bridge->driver->cache_flush();
1090         mem->is_flushed = true;
1091     }
1092 
1093     for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1094         writel(bridge->driver->mask_memory(bridge,
1095                            page_to_phys(mem->pages[i]),
1096                            mask_type),
1097                bridge->gatt_table+j);
1098     }
1099     readl(bridge->gatt_table+j-1);  /* PCI Posting. */
1100 
1101     bridge->driver->tlb_flush(mem);
1102     return 0;
1103 }
1104 EXPORT_SYMBOL(agp_generic_insert_memory);
1105 
1106 
1107 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1108 {
1109     size_t i;
1110     struct agp_bridge_data *bridge;
1111     int mask_type, num_entries;
1112 
1113     bridge = mem->bridge;
1114     if (!bridge)
1115         return -EINVAL;
1116 
1117     if (mem->page_count == 0)
1118         return 0;
1119 
1120     if (type != mem->type)
1121         return -EINVAL;
1122 
1123     num_entries = agp_num_entries();
1124     if (((pg_start + mem->page_count) > num_entries) ||
1125         ((pg_start + mem->page_count) < pg_start))
1126         return -EINVAL;
1127 
1128     mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1129     if (mask_type != 0) {
1130         /* The generic routines know nothing of memory types */
1131         return -EINVAL;
1132     }
1133 
1134     /* AK: bogus, should encode addresses > 4GB */
1135     for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1136         writel(bridge->scratch_page, bridge->gatt_table+i);
1137     }
1138     readl(bridge->gatt_table+i-1);  /* PCI Posting. */
1139 
1140     bridge->driver->tlb_flush(mem);
1141     return 0;
1142 }
1143 EXPORT_SYMBOL(agp_generic_remove_memory);
1144 
1145 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1146 {
1147     return NULL;
1148 }
1149 EXPORT_SYMBOL(agp_generic_alloc_by_type);
1150 
1151 void agp_generic_free_by_type(struct agp_memory *curr)
1152 {
1153     agp_free_page_array(curr);
1154     agp_free_key(curr->key);
1155     kfree(curr);
1156 }
1157 EXPORT_SYMBOL(agp_generic_free_by_type);
1158 
1159 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1160 {
1161     struct agp_memory *new;
1162     int i;
1163     int pages;
1164 
1165     pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1166     new = agp_create_user_memory(page_count);
1167     if (new == NULL)
1168         return NULL;
1169 
1170     for (i = 0; i < page_count; i++)
1171         new->pages[i] = NULL;
1172     new->page_count = 0;
1173     new->type = type;
1174     new->num_scratch_pages = pages;
1175 
1176     return new;
1177 }
1178 EXPORT_SYMBOL(agp_generic_alloc_user);
1179 
1180 /*
1181  * Basic Page Allocation Routines -
1182  * These routines handle page allocation and by default they reserve the allocated
1183  * memory.  They also handle incrementing the current_memory_agp value, Which is checked
1184  * against a maximum value.
1185  */
1186 
1187 int agp_generic_alloc_pages(struct agp_bridge_data *bridge, struct agp_memory *mem, size_t num_pages)
1188 {
1189     struct page * page;
1190     int i, ret = -ENOMEM;
1191 
1192     for (i = 0; i < num_pages; i++) {
1193         page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
1194         /* agp_free_memory() needs gart address */
1195         if (page == NULL)
1196             goto out;
1197 
1198 #ifndef CONFIG_X86
1199         map_page_into_agp(page);
1200 #endif
1201         get_page(page);
1202         atomic_inc(&agp_bridge->current_memory_agp);
1203 
1204         mem->pages[i] = page;
1205         mem->page_count++;
1206     }
1207 
1208 #ifdef CONFIG_X86
1209     set_pages_array_uc(mem->pages, num_pages);
1210 #endif
1211     ret = 0;
1212 out:
1213     return ret;
1214 }
1215 EXPORT_SYMBOL(agp_generic_alloc_pages);
1216 
1217 struct page *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1218 {
1219     struct page * page;
1220 
1221     page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
1222     if (page == NULL)
1223         return NULL;
1224 
1225     map_page_into_agp(page);
1226 
1227     get_page(page);
1228     atomic_inc(&agp_bridge->current_memory_agp);
1229     return page;
1230 }
1231 EXPORT_SYMBOL(agp_generic_alloc_page);
1232 
1233 void agp_generic_destroy_pages(struct agp_memory *mem)
1234 {
1235     int i;
1236     struct page *page;
1237 
1238     if (!mem)
1239         return;
1240 
1241 #ifdef CONFIG_X86
1242     set_pages_array_wb(mem->pages, mem->page_count);
1243 #endif
1244 
1245     for (i = 0; i < mem->page_count; i++) {
1246         page = mem->pages[i];
1247 
1248 #ifndef CONFIG_X86
1249         unmap_page_from_agp(page);
1250 #endif
1251         put_page(page);
1252         __free_page(page);
1253         atomic_dec(&agp_bridge->current_memory_agp);
1254         mem->pages[i] = NULL;
1255     }
1256 }
1257 EXPORT_SYMBOL(agp_generic_destroy_pages);
1258 
1259 void agp_generic_destroy_page(struct page *page, int flags)
1260 {
1261     if (page == NULL)
1262         return;
1263 
1264     if (flags & AGP_PAGE_DESTROY_UNMAP)
1265         unmap_page_from_agp(page);
1266 
1267     if (flags & AGP_PAGE_DESTROY_FREE) {
1268         put_page(page);
1269         __free_page(page);
1270         atomic_dec(&agp_bridge->current_memory_agp);
1271     }
1272 }
1273 EXPORT_SYMBOL(agp_generic_destroy_page);
1274 
1275 /* End Basic Page Allocation Routines */
1276 
1277 
1278 /**
1279  * agp_enable  -  initialise the agp point-to-point connection.
1280  *
1281  * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
1282  * @mode:   agp mode register value to configure with.
1283  */
1284 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1285 {
1286     if (!bridge)
1287         return;
1288     bridge->driver->agp_enable(bridge, mode);
1289 }
1290 EXPORT_SYMBOL(agp_enable);
1291 
1292 /* When we remove the global variable agp_bridge from all drivers
1293  * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1294  */
1295 
1296 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1297 {
1298     if (list_empty(&agp_bridges))
1299         return NULL;
1300 
1301     return agp_bridge;
1302 }
1303 
1304 static void ipi_handler(void *null)
1305 {
1306     flush_agp_cache();
1307 }
1308 
1309 void global_cache_flush(void)
1310 {
1311     on_each_cpu(ipi_handler, NULL, 1);
1312 }
1313 EXPORT_SYMBOL(global_cache_flush);
1314 
1315 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1316                       dma_addr_t addr, int type)
1317 {
1318     /* memory type is ignored in the generic routine */
1319     if (bridge->driver->masks)
1320         return addr | bridge->driver->masks[0].mask;
1321     else
1322         return addr;
1323 }
1324 EXPORT_SYMBOL(agp_generic_mask_memory);
1325 
1326 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1327                   int type)
1328 {
1329     if (type >= AGP_USER_TYPES)
1330         return 0;
1331     return type;
1332 }
1333 EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1334 
1335 /*
1336  * These functions are implemented according to the AGPv3 spec,
1337  * which covers implementation details that had previously been
1338  * left open.
1339  */
1340 
1341 int agp3_generic_fetch_size(void)
1342 {
1343     u16 temp_size;
1344     int i;
1345     struct aper_size_info_16 *values;
1346 
1347     pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1348     values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1349 
1350     for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1351         if (temp_size == values[i].size_value) {
1352             agp_bridge->previous_size =
1353                 agp_bridge->current_size = (void *) (values + i);
1354 
1355             agp_bridge->aperture_size_idx = i;
1356             return values[i].size;
1357         }
1358     }
1359     return 0;
1360 }
1361 EXPORT_SYMBOL(agp3_generic_fetch_size);
1362 
1363 void agp3_generic_tlbflush(struct agp_memory *mem)
1364 {
1365     u32 ctrl;
1366     pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1367     pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1368     pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1369 }
1370 EXPORT_SYMBOL(agp3_generic_tlbflush);
1371 
1372 int agp3_generic_configure(void)
1373 {
1374     u32 temp;
1375     struct aper_size_info_16 *current_size;
1376 
1377     current_size = A_SIZE_16(agp_bridge->current_size);
1378 
1379     agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
1380                             AGP_APERTURE_BAR);
1381 
1382     /* set aperture size */
1383     pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1384     /* set gart pointer */
1385     pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1386     /* enable aperture and GTLB */
1387     pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1388     pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1389     return 0;
1390 }
1391 EXPORT_SYMBOL(agp3_generic_configure);
1392 
1393 void agp3_generic_cleanup(void)
1394 {
1395     u32 ctrl;
1396     pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1397     pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1398 }
1399 EXPORT_SYMBOL(agp3_generic_cleanup);
1400 
1401 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1402 {
1403     {4096, 1048576, 10,0x000},
1404     {2048,  524288, 9, 0x800},
1405     {1024,  262144, 8, 0xc00},
1406     { 512,  131072, 7, 0xe00},
1407     { 256,   65536, 6, 0xf00},
1408     { 128,   32768, 5, 0xf20},
1409     {  64,   16384, 4, 0xf30},
1410     {  32,    8192, 3, 0xf38},
1411     {  16,    4096, 2, 0xf3c},
1412     {   8,    2048, 1, 0xf3e},
1413     {   4,    1024, 0, 0xf3f}
1414 };
1415 EXPORT_SYMBOL(agp3_generic_sizes);
1416
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