drivers/bluetooth/btmrvl_sdio.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /**
0003  * Marvell BT-over-SDIO driver: SDIO interface related definitions
0004  *
0005  * Copyright (C) 2009, Marvell International Ltd.
0006  **/
0007
0008 #define SDIO_HEADER_LEN         4
0009
0010 /* SD block size can not bigger than 64 due to buf size limit in firmware */
0011 /* define SD block size for data Tx/Rx */
0012 #define SDIO_BLOCK_SIZE         64
0013
0014 /* Number of blocks for firmware transfer */
0015 #define FIRMWARE_TRANSFER_NBLOCK    2
0016
0017 /* This is for firmware specific length */
0018 #define FW_EXTRA_LEN            36
0019
0020 #define MRVDRV_SIZE_OF_CMD_BUFFER       (2 * 1024)
0021
0022 #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
0023     (HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
0024
0025 #define ALLOC_BUF_SIZE  (((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
0026             MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
0027             + SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
0028             * SDIO_BLOCK_SIZE)
0029
0030 /* The number of times to try when polling for status */
0031 #define MAX_POLL_TRIES          100
0032
0033 /* Max retry number of CMD53 write */
0034 #define MAX_WRITE_IOMEM_RETRY       2
0035
0036 /* register bitmasks */
0037 #define HOST_POWER_UP               BIT(1)
0038 #define HOST_CMD53_FIN              BIT(2)
0039
0040 #define HIM_DISABLE             0xff
0041 #define HIM_ENABLE              (BIT(0) | BIT(1))
0042
0043 #define UP_LD_HOST_INT_STATUS           BIT(0)
0044 #define DN_LD_HOST_INT_STATUS           BIT(1)
0045
0046 #define DN_LD_CARD_RDY              BIT(0)
0047 #define CARD_IO_READY               BIT(3)
0048
0049 #define FIRMWARE_READY              0xfedc
0050
0051 struct btmrvl_plt_wake_cfg {
0052     int irq_bt;
0053     bool wake_by_bt;
0054 };
0055
0056 struct btmrvl_sdio_card_reg {
0057     u8 cfg;
0058     u8 host_int_mask;
0059     u8 host_intstatus;
0060     u8 card_status;
0061     u8 sq_read_base_addr_a0;
0062     u8 sq_read_base_addr_a1;
0063     u8 card_revision;
0064     u8 card_fw_status0;
0065     u8 card_fw_status1;
0066     u8 card_rx_len;
0067     u8 card_rx_unit;
0068     u8 io_port_0;
0069     u8 io_port_1;
0070     u8 io_port_2;
0071     bool int_read_to_clear;
0072     u8 host_int_rsr;
0073     u8 card_misc_cfg;
0074     u8 fw_dump_ctrl;
0075     u8 fw_dump_start;
0076     u8 fw_dump_end;
0077 };
0078
0079 struct btmrvl_sdio_card {
0080     struct sdio_func *func;
0081     u32 ioport;
0082     const char *helper;
0083     const char *firmware;
0084     const struct btmrvl_sdio_card_reg *reg;
0085     bool support_pscan_win_report;
0086     bool supports_fw_dump;
0087     u16 sd_blksz_fw_dl;
0088     u8 rx_unit;
0089     struct btmrvl_private *priv;
0090     struct device_node *plt_of_node;
0091     struct btmrvl_plt_wake_cfg *plt_wake_cfg;
0092 };
0093
0094 struct btmrvl_sdio_device {
0095     const char *helper;
0096     const char *firmware;
0097     const struct btmrvl_sdio_card_reg *reg;
0098     const bool support_pscan_win_report;
0099     u16 sd_blksz_fw_dl;
0100     bool supports_fw_dump;
0101 };
0102
0103
0104 /* Platform specific DMA alignment */
0105 #define BTSDIO_DMA_ALIGN        8
0106
0107 /* Macros for Data Alignment : size */
0108 #define ALIGN_SZ(p, a)  \
0109     (((p) + ((a) - 1)) & ~((a) - 1))
0110
0111 /* Macros for Data Alignment : address */
0112 #define ALIGN_ADDR(p, a)    \
0113     ((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
0114                     ~(((unsigned long)(a)) - 1))