block/paride/epia.c

0001 /*
0002         epia.c    (c) 1997-8  Grant R. Guenther <grant@torque.net>
0003                               Under the terms of the GNU General Public License.
0004
0005         epia.c is a low-level protocol driver for Shuttle Technologies
0006     EPIA parallel to IDE adapter chip.  This device is now obsolete
0007     and has been replaced with the EPAT chip, which is supported
0008     by epat.c, however, some devices based on EPIA are still
0009     available.
0010
0011 */
0012
0013 /* Changes:
0014
0015         1.01    GRG 1998.05.06 init_proto, release_proto
0016     1.02    GRG 1998.06.17 support older versions of EPIA
0017
0018 */
0019
0020 #define EPIA_VERSION      "1.02"
0021
0022 #include <linux/module.h>
0023 #include <linux/init.h>
0024 #include <linux/delay.h>
0025 #include <linux/kernel.h>
0026 #include <linux/types.h>
0027 #include <linux/wait.h>
0028 #include <asm/io.h>
0029
0030 #include "paride.h"
0031
0032 /* mode codes:  0  nybble reads on port 1, 8-bit writes
0033                 1  5/3 reads on ports 1 & 2, 8-bit writes
0034                 2  8-bit reads and writes
0035                 3  8-bit EPP mode
0036         4  16-bit EPP
0037         5  32-bit EPP
0038 */
0039
0040 #define j44(a,b)                (((a>>4)&0x0f)+(b&0xf0))
0041 #define j53(a,b)                (((a>>3)&0x1f)+((b<<4)&0xe0))
0042
0043 /* cont =  0   IDE register file
0044    cont =  1   IDE control registers
0045 */
0046
0047 static int cont_map[2] = { 0, 0x80 };
0048
0049 static int epia_read_regr( PIA *pi, int cont, int regr )
0050
0051 {       int     a, b, r;
0052
0053     regr += cont_map[cont];
0054
0055         switch (pi->mode)  {
0056
0057         case 0: r = regr^0x39;
0058                 w0(r); w2(1); w2(3); w0(r);
0059                 a = r1(); w2(1); b = r1(); w2(4);
0060                 return j44(a,b);
0061
0062         case 1: r = regr^0x31;
0063                 w0(r); w2(1); w0(r&0x37);
0064                 w2(3); w2(5); w0(r|0xf0);
0065                 a = r1(); b = r2(); w2(4);
0066                 return j53(a,b);
0067
0068         case 2: r = regr^0x29;
0069                 w0(r); w2(1); w2(0X21); w2(0x23);
0070                 a = r0(); w2(4);
0071                 return a;
0072
0073     case 3:
0074     case 4:
0075         case 5: w3(regr); w2(0x24); a = r4(); w2(4);
0076                 return a;
0077
0078         }
0079         return -1;
0080 }
0081
0082 static void epia_write_regr( PIA *pi, int cont, int regr, int val)
0083
0084 {       int  r;
0085
0086     regr += cont_map[cont];
0087
0088         switch (pi->mode)  {
0089
0090         case 0:
0091         case 1:
0092         case 2: r = regr^0x19;
0093                 w0(r); w2(1); w0(val); w2(3); w2(4);
0094                 break;
0095
0096     case 3:
0097     case 4:
0098         case 5: r = regr^0x40;
0099                 w3(r); w4(val); w2(4);
0100                 break;
0101         }
0102 }
0103
0104 #define WR(r,v)         epia_write_regr(pi,0,r,v)
0105 #define RR(r)           (epia_read_regr(pi,0,r))
0106
0107 /* The use of register 0x84 is entirely unclear - it seems to control
0108    some EPP counters ...  currently we know about 3 different block
0109    sizes:  the standard 512 byte reads and writes, 12 byte writes and
0110    2048 byte reads (the last two being used in the CDrom drivers.
0111 */
0112
0113 static void epia_connect ( PIA *pi  )
0114
0115 {       pi->saved_r0 = r0();
0116         pi->saved_r2 = r2();
0117
0118         w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0);
0119         w2(1); w2(4);
0120         if (pi->mode >= 3) {
0121                 w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4);
0122                 w2(0x24); w2(0x26); w2(4);
0123         }
0124         WR(0x86,8);
0125 }
0126
0127 static void epia_disconnect ( PIA *pi )
0128
0129 {       /* WR(0x84,0x10); */
0130         w0(pi->saved_r0);
0131         w2(1); w2(4);
0132         w0(pi->saved_r0);
0133         w2(pi->saved_r2);
0134 }
0135
0136 static void epia_read_block( PIA *pi, char * buf, int count )
0137
0138 {       int     k, ph, a, b;
0139
0140         switch (pi->mode) {
0141
0142         case 0: w0(0x81); w2(1); w2(3); w0(0xc1);
0143                 ph = 1;
0144                 for (k=0;k<count;k++) {
0145                         w2(2+ph); a = r1();
0146                         w2(4+ph); b = r1();
0147                         buf[k] = j44(a,b);
0148                         ph = 1 - ph;
0149                 }
0150                 w0(0); w2(4);
0151                 break;
0152
0153         case 1: w0(0x91); w2(1); w0(0x10); w2(3);
0154                 w0(0x51); w2(5); w0(0xd1);
0155                 ph = 1;
0156                 for (k=0;k<count;k++) {
0157                         w2(4+ph);
0158                         a = r1(); b = r2();
0159                         buf[k] = j53(a,b);
0160                         ph = 1 - ph;
0161                 }
0162                 w0(0); w2(4);
0163                 break;
0164
0165         case 2: w0(0x89); w2(1); w2(0x23); w2(0x21);
0166                 ph = 1;
0167                 for (k=0;k<count;k++) {
0168                         w2(0x24+ph);
0169                         buf[k] = r0();
0170                         ph = 1 - ph;
0171                 }
0172                 w2(6); w2(4);
0173                 break;
0174
0175         case 3: if (count > 512) WR(0x84,3);
0176         w3(0); w2(0x24);
0177                 for (k=0;k<count;k++) buf[k] = r4();
0178                 w2(4); WR(0x84,0);
0179                 break;
0180
0181         case 4: if (count > 512) WR(0x84,3);
0182         w3(0); w2(0x24);
0183         for (k=0;k<count/2;k++) ((u16 *)buf)[k] = r4w();
0184                 w2(4); WR(0x84,0);
0185                 break;
0186
0187         case 5: if (count > 512) WR(0x84,3);
0188         w3(0); w2(0x24);
0189                 for (k=0;k<count/4;k++) ((u32 *)buf)[k] = r4l();
0190                 w2(4); WR(0x84,0);
0191                 break;
0192
0193         }
0194 }
0195
0196 static void epia_write_block( PIA *pi, char * buf, int count )
0197
0198 {       int     ph, k, last, d;
0199
0200         switch (pi->mode) {
0201
0202         case 0:
0203         case 1:
0204         case 2: w0(0xa1); w2(1); w2(3); w2(1); w2(5);
0205                 ph = 0;  last = 0x8000;
0206                 for (k=0;k<count;k++) {
0207                         d = buf[k];
0208                         if (d != last) { last = d; w0(d); }
0209                         w2(4+ph);
0210                         ph = 1 - ph;
0211                 }
0212                 w2(7); w2(4);
0213                 break;
0214
0215         case 3: if (count < 512) WR(0x84,1);
0216         w3(0x40);
0217                 for (k=0;k<count;k++) w4(buf[k]);
0218         if (count < 512) WR(0x84,0);
0219                 break;
0220
0221         case 4: if (count < 512) WR(0x84,1);
0222         w3(0x40);
0223                 for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]);
0224         if (count < 512) WR(0x84,0);
0225                 break;
0226
0227         case 5: if (count < 512) WR(0x84,1);
0228         w3(0x40);
0229                 for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]);
0230         if (count < 512) WR(0x84,0);
0231                 break;
0232
0233         }
0234
0235 }
0236
0237 static int epia_test_proto( PIA *pi, char * scratch, int verbose )
0238
0239 {       int     j, k, f;
0240     int e[2] = {0,0};
0241
0242         epia_connect(pi);
0243         for (j=0;j<2;j++) {
0244             WR(6,0xa0+j*0x10);
0245             for (k=0;k<256;k++) {
0246                 WR(2,k^0xaa);
0247                 WR(3,k^0x55);
0248                 if (RR(2) != (k^0xaa)) e[j]++;
0249                 }
0250         WR(2,1); WR(3,1);
0251             }
0252         epia_disconnect(pi);
0253
0254         f = 0;
0255         epia_connect(pi);
0256         WR(0x84,8);
0257         epia_read_block(pi,scratch,512);
0258         for (k=0;k<256;k++) {
0259             if ((scratch[2*k] & 0xff) != ((k+1) & 0xff)) f++;
0260             if ((scratch[2*k+1] & 0xff) != ((-2-k) & 0xff)) f++;
0261         }
0262         WR(0x84,0);
0263         epia_disconnect(pi);
0264
0265         if (verbose)  {
0266             printk("%s: epia: port 0x%x, mode %d, test=(%d,%d,%d)\n",
0267                    pi->device,pi->port,pi->mode,e[0],e[1],f);
0268         }
0269
0270         return (e[0] && e[1]) || f;
0271
0272 }
0273
0274
0275 static void epia_log_adapter( PIA *pi, char * scratch, int verbose )
0276
0277 {       char    *mode_string[6] = {"4-bit","5/3","8-bit",
0278                    "EPP-8","EPP-16","EPP-32"};
0279
0280         printk("%s: epia %s, Shuttle EPIA at 0x%x, ",
0281                 pi->device,EPIA_VERSION,pi->port);
0282         printk("mode %d (%s), delay %d\n",pi->mode,
0283         mode_string[pi->mode],pi->delay);
0284
0285 }
0286
0287 static struct pi_protocol epia = {
0288     .owner      = THIS_MODULE,
0289     .name       = "epia",
0290     .max_mode   = 6,
0291     .epp_first  = 3,
0292     .default_delay  = 1,
0293     .max_units  = 1,
0294     .write_regr = epia_write_regr,
0295     .read_regr  = epia_read_regr,
0296     .write_block    = epia_write_block,
0297     .read_block = epia_read_block,
0298     .connect    = epia_connect,
0299     .disconnect = epia_disconnect,
0300     .test_proto = epia_test_proto,
0301     .log_adapter    = epia_log_adapter,
0302 };
0303
0304 static int __init epia_init(void)
0305 {
0306     return paride_register(&epia);
0307 }
0308
0309 static void __exit epia_exit(void)
0310 {
0311     paride_unregister(&epia);
0312 }
0313
0314 MODULE_LICENSE("GPL");
0315 module_init(epia_init)
0316 module_exit(epia_exit)