block/mtip32xx/mtip32xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * mtip32xx.h - Header file for the P320 SSD Block Driver
0004  *   Copyright (C) 2011 Micron Technology, Inc.
0005  *
0006  * Portions of this code were derived from works subjected to the
0007  * following copyright:
0008  *    Copyright (C) 2009 Integrated Device Technology, Inc.
0009  */
0010
0011 #ifndef __MTIP32XX_H__
0012 #define __MTIP32XX_H__
0013
0014 #include <linux/spinlock.h>
0015 #include <linux/rwsem.h>
0016 #include <linux/ata.h>
0017 #include <linux/interrupt.h>
0018
0019 /* Offset of Subsystem Device ID in pci confoguration space */
0020 #define PCI_SUBSYSTEM_DEVICEID  0x2E
0021
0022 /* offset of Device Control register in PCIe extended capabilites space */
0023 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET   0x48
0024
0025 /* check for erase mode support during secure erase */
0026 #define MTIP_SEC_ERASE_MODE     0x2
0027
0028 /* # of times to retry timed out/failed IOs */
0029 #define MTIP_MAX_RETRIES    2
0030
0031 /* Various timeout values in ms */
0032 #define MTIP_NCQ_CMD_TIMEOUT_MS      15000
0033 #define MTIP_IOCTL_CMD_TIMEOUT_MS    5000
0034 #define MTIP_INT_CMD_TIMEOUT_MS      5000
0035 #define MTIP_QUIESCE_IO_TIMEOUT_MS   (MTIP_NCQ_CMD_TIMEOUT_MS * \
0036                      (MTIP_MAX_RETRIES + 1))
0037
0038 /* check for timeouts every 500ms */
0039 #define MTIP_TIMEOUT_CHECK_PERIOD   500
0040
0041 /* ftl rebuild */
0042 #define MTIP_FTL_REBUILD_OFFSET     142
0043 #define MTIP_FTL_REBUILD_MAGIC      0xED51
0044 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
0045
0046 /* unaligned IO handling */
0047 #define MTIP_MAX_UNALIGNED_SLOTS    2
0048
0049 /* Macro to extract the tag bit number from a tag value. */
0050 #define MTIP_TAG_BIT(tag)   (tag & 0x1F)
0051
0052 /*
0053  * Macro to extract the tag index from a tag value. The index
0054  * is used to access the correct s_active/Command Issue register based
0055  * on the tag value.
0056  */
0057 #define MTIP_TAG_INDEX(tag) (tag >> 5)
0058
0059 /*
0060  * Maximum number of scatter gather entries
0061  * a single command may have.
0062  */
0063 #define MTIP_MAX_SG     504
0064
0065 /*
0066  * Maximum number of slot groups (Command Issue & s_active registers)
0067  * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
0068  */
0069 #define MTIP_MAX_SLOT_GROUPS    8
0070
0071 /* Internal command tag. */
0072 #define MTIP_TAG_INTERNAL   0
0073
0074 /* Micron Vendor ID & P320x SSD Device ID */
0075 #define PCI_VENDOR_ID_MICRON    0x1344
0076 #define P320H_DEVICE_ID     0x5150
0077 #define P320M_DEVICE_ID     0x5151
0078 #define P320S_DEVICE_ID     0x5152
0079 #define P325M_DEVICE_ID     0x5153
0080 #define P420H_DEVICE_ID     0x5160
0081 #define P420M_DEVICE_ID     0x5161
0082 #define P425M_DEVICE_ID     0x5163
0083
0084 /* Driver name and version strings */
0085 #define MTIP_DRV_NAME       "mtip32xx"
0086 #define MTIP_DRV_VERSION    "1.3.1"
0087
0088 /* Maximum number of minor device numbers per device. */
0089 #define MTIP_MAX_MINORS     16
0090
0091 /* Maximum number of supported command slots. */
0092 #define MTIP_MAX_COMMAND_SLOTS  (MTIP_MAX_SLOT_GROUPS * 32)
0093
0094 /*
0095  * Per-tag bitfield size in longs.
0096  * Linux bit manipulation functions
0097  * (i.e. test_and_set_bit, find_next_zero_bit)
0098  * manipulate memory in longs, so we try to make the math work.
0099  * take the slot groups and find the number of longs, rounding up.
0100  * Careful! i386 and x86_64 use different size longs!
0101  */
0102 #define U32_PER_LONG    (sizeof(long) / sizeof(u32))
0103 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
0104                     (U32_PER_LONG-1))/U32_PER_LONG)
0105
0106 /* BAR number used to access the HBA registers. */
0107 #define MTIP_ABAR       5
0108
0109 #ifdef DEBUG
0110  #define dbg_printk(format, arg...) \
0111     printk(pr_fmt(format), ##arg);
0112 #else
0113  #define dbg_printk(format, arg...)
0114 #endif
0115
0116 #define MTIP_DFS_MAX_BUF_SIZE 1024
0117
0118 enum {
0119     /* below are bit numbers in 'flags' defined in mtip_port */
0120     MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
0121     MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
0122     MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
0123     MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
0124     MTIP_PF_TO_ACTIVE_BIT       = 9, /* timeout handling */
0125     MTIP_PF_PAUSE_IO      = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
0126                 (1 << MTIP_PF_EH_ACTIVE_BIT) |
0127                 (1 << MTIP_PF_SE_ACTIVE_BIT) |
0128                 (1 << MTIP_PF_DM_ACTIVE_BIT) |
0129                 (1 << MTIP_PF_TO_ACTIVE_BIT)),
0130     MTIP_PF_HOST_CAP_64         = 10, /* cache HOST_CAP_64 */
0131
0132     MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
0133     MTIP_PF_ISSUE_CMDS_BIT      = 5,
0134     MTIP_PF_REBUILD_BIT         = 6,
0135     MTIP_PF_SVC_THD_STOP_BIT    = 8,
0136
0137     MTIP_PF_SVC_THD_WORK    = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
0138                   (1 << MTIP_PF_ISSUE_CMDS_BIT) |
0139                   (1 << MTIP_PF_REBUILD_BIT) |
0140                   (1 << MTIP_PF_SVC_THD_STOP_BIT) |
0141                   (1 << MTIP_PF_TO_ACTIVE_BIT)),
0142
0143     /* below are bit numbers in 'dd_flag' defined in driver_data */
0144     MTIP_DDF_SEC_LOCK_BIT       = 0,
0145     MTIP_DDF_REMOVE_PENDING_BIT = 1,
0146     MTIP_DDF_OVER_TEMP_BIT      = 2,
0147     MTIP_DDF_WRITE_PROTECT_BIT  = 3,
0148     MTIP_DDF_CLEANUP_BIT        = 5,
0149     MTIP_DDF_RESUME_BIT         = 6,
0150     MTIP_DDF_INIT_DONE_BIT      = 7,
0151     MTIP_DDF_REBUILD_FAILED_BIT = 8,
0152
0153     MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
0154                 (1 << MTIP_DDF_SEC_LOCK_BIT) |
0155                 (1 << MTIP_DDF_OVER_TEMP_BIT) |
0156                 (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
0157                 (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
0158
0159 };
0160
0161 struct smart_attr {
0162     u8 attr_id;
0163     __le16 flags;
0164     u8 cur;
0165     u8 worst;
0166     __le32 data;
0167     u8 res[3];
0168 } __packed;
0169
0170 struct mtip_work {
0171     struct work_struct work;
0172     void *port;
0173     int cpu_binding;
0174     u32 completed;
0175 } ____cacheline_aligned_in_smp;
0176
0177 #define DEFINE_HANDLER(group)                                  \
0178     void mtip_workq_sdbf##group(struct work_struct *work)       \
0179     {                                                      \
0180         struct mtip_work *w = (struct mtip_work *) work;         \
0181         mtip_workq_sdbfx(w->port, group, w->completed);     \
0182     }
0183
0184 /* Register Frame Information Structure (FIS), host to device. */
0185 struct host_to_dev_fis {
0186     /*
0187      * FIS type.
0188      * - 27h Register FIS, host to device.
0189      * - 34h Register FIS, device to host.
0190      * - 39h DMA Activate FIS, device to host.
0191      * - 41h DMA Setup FIS, bi-directional.
0192      * - 46h Data FIS, bi-directional.
0193      * - 58h BIST Activate FIS, bi-directional.
0194      * - 5Fh PIO Setup FIS, device to host.
0195      * - A1h Set Device Bits FIS, device to host.
0196      */
0197     unsigned char type;
0198     unsigned char opts;
0199     unsigned char command;
0200     unsigned char features;
0201
0202     union {
0203         unsigned char lba_low;
0204         unsigned char sector;
0205     };
0206     union {
0207         unsigned char lba_mid;
0208         unsigned char cyl_low;
0209     };
0210     union {
0211         unsigned char lba_hi;
0212         unsigned char cyl_hi;
0213     };
0214     union {
0215         unsigned char device;
0216         unsigned char head;
0217     };
0218
0219     union {
0220         unsigned char lba_low_ex;
0221         unsigned char sector_ex;
0222     };
0223     union {
0224         unsigned char lba_mid_ex;
0225         unsigned char cyl_low_ex;
0226     };
0227     union {
0228         unsigned char lba_hi_ex;
0229         unsigned char cyl_hi_ex;
0230     };
0231     unsigned char features_ex;
0232
0233     unsigned char sect_count;
0234     unsigned char sect_cnt_ex;
0235     unsigned char res2;
0236     unsigned char control;
0237
0238     unsigned int res3;
0239 };
0240
0241 /* Command header structure. */
0242 struct mtip_cmd_hdr {
0243     /*
0244      * Command options.
0245      * - Bits 31:16 Number of PRD entries.
0246      * - Bits 15:8 Unused in this implementation.
0247      * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
0248      * - Bit 6 Write bit, should be set when writing data to the device.
0249      * - Bit 5 Unused in this implementation.
0250      * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
0251      */
0252     __le32 opts;
0253     /* This field is unsed when using NCQ. */
0254     union {
0255         __le32 byte_count;
0256         __le32 status;
0257     };
0258     /*
0259      * Lower 32 bits of the command table address associated with this
0260      * header. The command table addresses must be 128 byte aligned.
0261      */
0262     __le32 ctba;
0263     /*
0264      * If 64 bit addressing is used this field is the upper 32 bits
0265      * of the command table address associated with this command.
0266      */
0267     __le32 ctbau;
0268     /* Reserved and unused. */
0269     u32 res[4];
0270 };
0271
0272 /* Command scatter gather structure (PRD). */
0273 struct mtip_cmd_sg {
0274     /*
0275      * Low 32 bits of the data buffer address. For P320 this
0276      * address must be 8 byte aligned signified by bits 2:0 being
0277      * set to 0.
0278      */
0279     __le32 dba;
0280     /*
0281      * When 64 bit addressing is used this field is the upper
0282      * 32 bits of the data buffer address.
0283      */
0284     __le32 dba_upper;
0285     /* Unused. */
0286     __le32 reserved;
0287     /*
0288      * Bit 31: interrupt when this data block has been transferred.
0289      * Bits 30..22: reserved
0290      * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
0291      * 8 byte aligned signified by bits 2:0 being set to 1.
0292      */
0293     __le32 info;
0294 };
0295 struct mtip_port;
0296
0297 struct mtip_int_cmd;
0298
0299 /* Structure used to describe a command. */
0300 struct mtip_cmd {
0301     void *command; /* ptr to command table entry */
0302
0303     dma_addr_t command_dma; /* corresponding physical address */
0304
0305     int scatter_ents; /* Number of scatter list entries used */
0306
0307     int unaligned; /* command is unaligned on 4k boundary */
0308
0309     union {
0310         struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
0311         struct mtip_int_cmd *icmd;
0312     };
0313
0314     int retries; /* The number of retries left for this command. */
0315
0316     int direction; /* Data transfer direction */
0317     blk_status_t status;
0318 };
0319
0320 /* Structure used to describe a port. */
0321 struct mtip_port {
0322     /* Pointer back to the driver data for this port. */
0323     struct driver_data *dd;
0324     /*
0325      * Used to determine if the data pointed to by the
0326      * identify field is valid.
0327      */
0328     unsigned long identify_valid;
0329     /* Base address of the memory mapped IO for the port. */
0330     void __iomem *mmio;
0331     /* Array of pointers to the memory mapped s_active registers. */
0332     void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
0333     /* Array of pointers to the memory mapped completed registers. */
0334     void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
0335     /* Array of pointers to the memory mapped Command Issue registers. */
0336     void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
0337     /*
0338      * Pointer to the beginning of the command header memory as used
0339      * by the driver.
0340      */
0341     void *command_list;
0342     /*
0343      * Pointer to the beginning of the command header memory as used
0344      * by the DMA.
0345      */
0346     dma_addr_t command_list_dma;
0347     /*
0348      * Pointer to the beginning of the RX FIS memory as used
0349      * by the driver.
0350      */
0351     void *rxfis;
0352     /*
0353      * Pointer to the beginning of the RX FIS memory as used
0354      * by the DMA.
0355      */
0356     dma_addr_t rxfis_dma;
0357     /*
0358      * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
0359      */
0360     void *block1;
0361     /*
0362      * DMA address of region for RX Fis, Identify, RLE10, and SMART
0363      */
0364     dma_addr_t block1_dma;
0365     /*
0366      * Pointer to the beginning of the identify data memory as used
0367      * by the driver.
0368      */
0369     u16 *identify;
0370     /*
0371      * Pointer to the beginning of the identify data memory as used
0372      * by the DMA.
0373      */
0374     dma_addr_t identify_dma;
0375     /*
0376      * Pointer to the beginning of a sector buffer that is used
0377      * by the driver when issuing internal commands.
0378      */
0379     u16 *sector_buffer;
0380     /*
0381      * Pointer to the beginning of a sector buffer that is used
0382      * by the DMA when the driver issues internal commands.
0383      */
0384     dma_addr_t sector_buffer_dma;
0385
0386     u16 *log_buf;
0387     dma_addr_t log_buf_dma;
0388
0389     u8 *smart_buf;
0390     dma_addr_t smart_buf_dma;
0391
0392     /*
0393      * used to queue commands when an internal command is in progress
0394      * or error handling is active
0395      */
0396     unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
0397     /* Used by mtip_service_thread to wait for an event */
0398     wait_queue_head_t svc_wait;
0399     /*
0400      * indicates the state of the port. Also, helps the service thread
0401      * to determine its action on wake up.
0402      */
0403     unsigned long flags;
0404     /*
0405      * Timer used to complete commands that have been active for too long.
0406      */
0407     unsigned long ic_pause_timer;
0408
0409     /* Counter to control queue depth of unaligned IOs */
0410     atomic_t cmd_slot_unal;
0411
0412     /* Spinlock for working around command-issue bug. */
0413     spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
0414 };
0415
0416 /*
0417  * Driver private data structure.
0418  *
0419  * One structure is allocated per probed device.
0420  */
0421 struct driver_data {
0422     void __iomem *mmio; /* Base address of the HBA registers. */
0423
0424     int major; /* Major device number. */
0425
0426     int instance; /* Instance number. First device probed is 0, ... */
0427
0428     struct gendisk *disk; /* Pointer to our gendisk structure. */
0429
0430     struct pci_dev *pdev; /* Pointer to the PCI device structure. */
0431
0432     struct request_queue *queue; /* Our request queue. */
0433
0434     struct blk_mq_tag_set tags; /* blk_mq tags */
0435
0436     struct mtip_port *port; /* Pointer to the port data structure. */
0437
0438     unsigned product_type; /* magic value declaring the product type */
0439
0440     unsigned slot_groups; /* number of slot groups the product supports */
0441
0442     unsigned long index; /* Index to determine the disk name */
0443
0444     unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
0445
0446     struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
0447
0448     struct dentry *dfs_node;
0449
0450     bool sr;
0451
0452     int numa_node; /* NUMA support */
0453
0454     char workq_name[32];
0455
0456     struct workqueue_struct *isr_workq;
0457
0458     atomic_t irq_workers_active;
0459
0460     struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
0461
0462     int isr_binding;
0463
0464     int unal_qdepth; /* qdepth of unaligned IO queue */
0465 };
0466
0467 #endif