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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
0004  *  Traverse Technologies -- https://www.traverse.com.au/
0005  *  Xrio Limited          -- http://www.xrio.com/
0006  *
0007  * Copyright © 2008 Traverse Technologies
0008  * Copyright © 2008 Intel Corporation
0009  *
0010  * Authors: Nathan Williams <nathan@traverse.com.au>
0011  *          David Woodhouse <dwmw2@infradead.org>
0012  *          Treker Chen <treker@xrio.com>
0013  */
0014 
0015 #define DEBUG
0016 #define VERBOSE_DEBUG
0017 
0018 #include <linux/interrupt.h>
0019 #include <linux/module.h>
0020 #include <linux/kernel.h>
0021 #include <linux/errno.h>
0022 #include <linux/ioport.h>
0023 #include <linux/types.h>
0024 #include <linux/pci.h>
0025 #include <linux/atm.h>
0026 #include <linux/atmdev.h>
0027 #include <linux/skbuff.h>
0028 #include <linux/sysfs.h>
0029 #include <linux/device.h>
0030 #include <linux/kobject.h>
0031 #include <linux/firmware.h>
0032 #include <linux/ctype.h>
0033 #include <linux/swab.h>
0034 #include <linux/slab.h>
0035 
0036 #define VERSION "1.04"
0037 #define DRIVER_VERSION 0x01
0038 #define PTAG "solos-pci"
0039 
0040 #define CONFIG_RAM_SIZE 128
0041 #define FLAGS_ADDR  0x7C
0042 #define IRQ_EN_ADDR 0x78
0043 #define FPGA_VER    0x74
0044 #define IRQ_CLEAR   0x70
0045 #define WRITE_FLASH 0x6C
0046 #define PORTS       0x68
0047 #define FLASH_BLOCK 0x64
0048 #define FLASH_BUSY  0x60
0049 #define FPGA_MODE   0x5C
0050 #define FLASH_MODE  0x58
0051 #define GPIO_STATUS 0x54
0052 #define DRIVER_VER  0x50
0053 #define TX_DMA_ADDR(port)   (0x40 + (4 * (port)))
0054 #define RX_DMA_ADDR(port)   (0x30 + (4 * (port)))
0055 
0056 #define DATA_RAM_SIZE   32768
0057 #define BUF_SIZE    2048
0058 #define OLD_BUF_SIZE    4096 /* For FPGA versions <= 2*/
0059 /* Old boards use ATMEL AD45DB161D flash */
0060 #define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
0061 #define ATMEL_SOLOS_PAGE    512 /* Solos flash page size*/
0062 #define ATMEL_FPGA_BLOCK    (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
0063 #define ATMEL_SOLOS_BLOCK   (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
0064 /* Current boards use M25P/M25PE SPI flash */
0065 #define SPI_FLASH_BLOCK (256 * 64)
0066 
0067 #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
0068 #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
0069 #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
0070 
0071 #define RX_DMA_SIZE 2048
0072 
0073 #define FPGA_VERSION(a,b) (((a) << 8) + (b))
0074 #define LEGACY_BUFFERS  2
0075 #define DMA_SUPPORTED   4
0076 
0077 static int reset = 0;
0078 static int atmdebug = 0;
0079 static int firmware_upgrade = 0;
0080 static int fpga_upgrade = 0;
0081 static int db_firmware_upgrade = 0;
0082 static int db_fpga_upgrade = 0;
0083 
0084 struct pkt_hdr {
0085     __le16 size;
0086     __le16 vpi;
0087     __le16 vci;
0088     __le16 type;
0089 };
0090 
0091 struct solos_skb_cb {
0092     struct atm_vcc *vcc;
0093     uint32_t dma_addr;
0094 };
0095 
0096 
0097 #define SKB_CB(skb)     ((struct solos_skb_cb *)skb->cb)
0098 
0099 #define PKT_DATA    0
0100 #define PKT_COMMAND 1
0101 #define PKT_POPEN   3
0102 #define PKT_PCLOSE  4
0103 #define PKT_STATUS  5
0104 
0105 struct solos_card {
0106     void __iomem *config_regs;
0107     void __iomem *buffers;
0108     int nr_ports;
0109     int tx_mask;
0110     struct pci_dev *dev;
0111     struct atm_dev *atmdev[4];
0112     struct tasklet_struct tlet;
0113     spinlock_t tx_lock;
0114     spinlock_t tx_queue_lock;
0115     spinlock_t cli_queue_lock;
0116     spinlock_t param_queue_lock;
0117     struct list_head param_queue;
0118     struct sk_buff_head tx_queue[4];
0119     struct sk_buff_head cli_queue[4];
0120     struct sk_buff *tx_skb[4];
0121     struct sk_buff *rx_skb[4];
0122     unsigned char *dma_bounce;
0123     wait_queue_head_t param_wq;
0124     wait_queue_head_t fw_wq;
0125     int using_dma;
0126     int dma_alignment;
0127     int fpga_version;
0128     int buffer_size;
0129     int atmel_flash;
0130 };
0131 
0132 
0133 struct solos_param {
0134     struct list_head list;
0135     pid_t pid;
0136     int port;
0137     struct sk_buff *response;
0138 };
0139 
0140 #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
0141 
0142 MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
0143 MODULE_DESCRIPTION("Solos PCI driver");
0144 MODULE_VERSION(VERSION);
0145 MODULE_LICENSE("GPL");
0146 MODULE_FIRMWARE("solos-FPGA.bin");
0147 MODULE_FIRMWARE("solos-Firmware.bin");
0148 MODULE_FIRMWARE("solos-db-FPGA.bin");
0149 MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
0150 MODULE_PARM_DESC(atmdebug, "Print ATM data");
0151 MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
0152 MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
0153 MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
0154 MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
0155 module_param(reset, int, 0444);
0156 module_param(atmdebug, int, 0644);
0157 module_param(firmware_upgrade, int, 0444);
0158 module_param(fpga_upgrade, int, 0444);
0159 module_param(db_firmware_upgrade, int, 0444);
0160 module_param(db_fpga_upgrade, int, 0444);
0161 
0162 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
0163                struct atm_vcc *vcc);
0164 static uint32_t fpga_tx(struct solos_card *);
0165 static irqreturn_t solos_irq(int irq, void *dev_id);
0166 static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
0167 static int atm_init(struct solos_card *, struct device *);
0168 static void atm_remove(struct solos_card *);
0169 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
0170 static void solos_bh(unsigned long);
0171 static int print_buffer(struct sk_buff *buf);
0172 
0173 static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
0174 {
0175         if (vcc->pop)
0176                 vcc->pop(vcc, skb);
0177         else
0178                 dev_kfree_skb_any(skb);
0179 }
0180 
0181 static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
0182                 char *buf)
0183 {
0184     struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
0185     struct solos_card *card = atmdev->dev_data;
0186     struct solos_param prm;
0187     struct sk_buff *skb;
0188     struct pkt_hdr *header;
0189     int buflen;
0190 
0191     buflen = strlen(attr->attr.name) + 10;
0192 
0193     skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
0194     if (!skb) {
0195         dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
0196         return -ENOMEM;
0197     }
0198 
0199     header = skb_put(skb, sizeof(*header));
0200 
0201     buflen = snprintf((void *)&header[1], buflen - 1,
0202               "L%05d\n%s\n", current->pid, attr->attr.name);
0203     skb_put(skb, buflen);
0204 
0205     header->size = cpu_to_le16(buflen);
0206     header->vpi = cpu_to_le16(0);
0207     header->vci = cpu_to_le16(0);
0208     header->type = cpu_to_le16(PKT_COMMAND);
0209 
0210     prm.pid = current->pid;
0211     prm.response = NULL;
0212     prm.port = SOLOS_CHAN(atmdev);
0213 
0214     spin_lock_irq(&card->param_queue_lock);
0215     list_add(&prm.list, &card->param_queue);
0216     spin_unlock_irq(&card->param_queue_lock);
0217 
0218     fpga_queue(card, prm.port, skb, NULL);
0219 
0220     wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
0221 
0222     spin_lock_irq(&card->param_queue_lock);
0223     list_del(&prm.list);
0224     spin_unlock_irq(&card->param_queue_lock);
0225 
0226     if (!prm.response)
0227         return -EIO;
0228 
0229     buflen = prm.response->len;
0230     memcpy(buf, prm.response->data, buflen);
0231     kfree_skb(prm.response);
0232 
0233     return buflen;
0234 }
0235 
0236 static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
0237                  const char *buf, size_t count)
0238 {
0239     struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
0240     struct solos_card *card = atmdev->dev_data;
0241     struct solos_param prm;
0242     struct sk_buff *skb;
0243     struct pkt_hdr *header;
0244     int buflen;
0245     ssize_t ret;
0246 
0247     buflen = strlen(attr->attr.name) + 11 + count;
0248 
0249     skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
0250     if (!skb) {
0251         dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
0252         return -ENOMEM;
0253     }
0254 
0255     header = skb_put(skb, sizeof(*header));
0256 
0257     buflen = snprintf((void *)&header[1], buflen - 1,
0258               "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
0259 
0260     skb_put(skb, buflen);
0261     header->size = cpu_to_le16(buflen);
0262     header->vpi = cpu_to_le16(0);
0263     header->vci = cpu_to_le16(0);
0264     header->type = cpu_to_le16(PKT_COMMAND);
0265 
0266     prm.pid = current->pid;
0267     prm.response = NULL;
0268     prm.port = SOLOS_CHAN(atmdev);
0269 
0270     spin_lock_irq(&card->param_queue_lock);
0271     list_add(&prm.list, &card->param_queue);
0272     spin_unlock_irq(&card->param_queue_lock);
0273 
0274     fpga_queue(card, prm.port, skb, NULL);
0275 
0276     wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
0277 
0278     spin_lock_irq(&card->param_queue_lock);
0279     list_del(&prm.list);
0280     spin_unlock_irq(&card->param_queue_lock);
0281 
0282     skb = prm.response;
0283 
0284     if (!skb)
0285         return -EIO;
0286 
0287     buflen = skb->len;
0288 
0289     /* Sometimes it has a newline, sometimes it doesn't. */
0290     if (skb->data[buflen - 1] == '\n')
0291         buflen--;
0292 
0293     if (buflen == 2 && !strncmp(skb->data, "OK", 2))
0294         ret = count;
0295     else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
0296         ret = -EIO;
0297     else {
0298         /* We know we have enough space allocated for this; we allocated 
0299            it ourselves */
0300         skb->data[buflen] = 0;
0301     
0302         dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
0303              skb->data);
0304         ret = -EIO;
0305     }
0306     kfree_skb(skb);
0307 
0308     return ret;
0309 }
0310 
0311 static char *next_string(struct sk_buff *skb)
0312 {
0313     int i = 0;
0314     char *this = skb->data;
0315     
0316     for (i = 0; i < skb->len; i++) {
0317         if (this[i] == '\n') {
0318             this[i] = 0;
0319             skb_pull(skb, i + 1);
0320             return this;
0321         }
0322         if (!isprint(this[i]))
0323             return NULL;
0324     }
0325     return NULL;
0326 }
0327 
0328 /*
0329  * Status packet has fields separated by \n, starting with a version number
0330  * for the information therein. Fields are....
0331  *
0332  *     packet version
0333  *     RxBitRate    (version >= 1)
0334  *     TxBitRate    (version >= 1)
0335  *     State        (version >= 1)
0336  *     LocalSNRMargin   (version >= 1)
0337  *     LocalLineAttn    (version >= 1)
0338  */       
0339 static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
0340 {
0341     char *str, *state_str, *snr, *attn;
0342     int ver, rate_up, rate_down, err;
0343 
0344     if (!card->atmdev[port])
0345         return -ENODEV;
0346 
0347     str = next_string(skb);
0348     if (!str)
0349         return -EIO;
0350 
0351     err = kstrtoint(str, 10, &ver);
0352     if (err) {
0353         dev_warn(&card->dev->dev, "Unexpected status interrupt version\n");
0354         return err;
0355     }
0356     if (ver < 1) {
0357         dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
0358              ver);
0359         return -EIO;
0360     }
0361 
0362     str = next_string(skb);
0363     if (!str)
0364         return -EIO;
0365     if (!strcmp(str, "ERROR")) {
0366         dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
0367              port);
0368         return 0;
0369     }
0370 
0371     err = kstrtoint(str, 10, &rate_down);
0372     if (err)
0373         return err;
0374 
0375     str = next_string(skb);
0376     if (!str)
0377         return -EIO;
0378     err = kstrtoint(str, 10, &rate_up);
0379     if (err)
0380         return err;
0381 
0382     state_str = next_string(skb);
0383     if (!state_str)
0384         return -EIO;
0385 
0386     /* Anything but 'Showtime' is down */
0387     if (strcmp(state_str, "Showtime")) {
0388         atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
0389         dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
0390         return 0;
0391     }
0392 
0393     snr = next_string(skb);
0394     if (!snr)
0395         return -EIO;
0396     attn = next_string(skb);
0397     if (!attn)
0398         return -EIO;
0399 
0400     dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
0401          port, state_str, rate_down/1000, rate_up/1000,
0402          snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
0403     
0404     card->atmdev[port]->link_rate = rate_down / 424;
0405     atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
0406 
0407     return 0;
0408 }
0409 
0410 static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
0411 {
0412     struct solos_param *prm;
0413     unsigned long flags;
0414     int cmdpid;
0415     int found = 0, err;
0416 
0417     if (skb->len < 7)
0418         return 0;
0419 
0420     if (skb->data[0] != 'L'    || !isdigit(skb->data[1]) ||
0421         !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
0422         !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
0423         skb->data[6] != '\n')
0424         return 0;
0425 
0426     err = kstrtoint(&skb->data[1], 10, &cmdpid);
0427     if (err)
0428         return err;
0429 
0430     spin_lock_irqsave(&card->param_queue_lock, flags);
0431     list_for_each_entry(prm, &card->param_queue, list) {
0432         if (prm->port == port && prm->pid == cmdpid) {
0433             prm->response = skb;
0434             skb_pull(skb, 7);
0435             wake_up(&card->param_wq);
0436             found = 1;
0437             break;
0438         }
0439     }
0440     spin_unlock_irqrestore(&card->param_queue_lock, flags);
0441     return found;
0442 }
0443 
0444 static ssize_t console_show(struct device *dev, struct device_attribute *attr,
0445                 char *buf)
0446 {
0447     struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
0448     struct solos_card *card = atmdev->dev_data;
0449     struct sk_buff *skb;
0450     unsigned int len;
0451 
0452     spin_lock(&card->cli_queue_lock);
0453     skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
0454     spin_unlock(&card->cli_queue_lock);
0455     if(skb == NULL)
0456         return sprintf(buf, "No data.\n");
0457 
0458     len = skb->len;
0459     memcpy(buf, skb->data, len);
0460 
0461     kfree_skb(skb);
0462     return len;
0463 }
0464 
0465 static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
0466 {
0467     struct sk_buff *skb;
0468     struct pkt_hdr *header;
0469 
0470     if (size > (BUF_SIZE - sizeof(*header))) {
0471         dev_dbg(&card->dev->dev, "Command is too big.  Dropping request\n");
0472         return 0;
0473     }
0474     skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
0475     if (!skb) {
0476         dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
0477         return 0;
0478     }
0479 
0480     header = skb_put(skb, sizeof(*header));
0481 
0482     header->size = cpu_to_le16(size);
0483     header->vpi = cpu_to_le16(0);
0484     header->vci = cpu_to_le16(0);
0485     header->type = cpu_to_le16(PKT_COMMAND);
0486 
0487     skb_put_data(skb, buf, size);
0488 
0489     fpga_queue(card, dev, skb, NULL);
0490 
0491     return 0;
0492 }
0493 
0494 static ssize_t console_store(struct device *dev, struct device_attribute *attr,
0495                  const char *buf, size_t count)
0496 {
0497     struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
0498     struct solos_card *card = atmdev->dev_data;
0499     int err;
0500 
0501     err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
0502 
0503     return err?:count;
0504 }
0505 
0506 struct geos_gpio_attr {
0507     struct device_attribute attr;
0508     int offset;
0509 };
0510 
0511 #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset)   \
0512     struct geos_gpio_attr gpio_attr_##_name = {     \
0513         .attr = __ATTR(_name, _mode, _show, _store),    \
0514         .offset = _offset }
0515 
0516 static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
0517                    const char *buf, size_t count)
0518 {
0519     struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
0520     struct solos_card *card = dev_get_drvdata(dev);
0521     uint32_t data32;
0522 
0523     if (count != 1 && (count != 2 || buf[1] != '\n'))
0524         return -EINVAL;
0525 
0526     spin_lock_irq(&card->param_queue_lock);
0527     data32 = ioread32(card->config_regs + GPIO_STATUS);
0528     if (buf[0] == '1') {
0529         data32 |= 1 << gattr->offset;
0530         iowrite32(data32, card->config_regs + GPIO_STATUS);
0531     } else if (buf[0] == '0') {
0532         data32 &= ~(1 << gattr->offset);
0533         iowrite32(data32, card->config_regs + GPIO_STATUS);
0534     } else {
0535         count = -EINVAL;
0536     }
0537     spin_unlock_irq(&card->param_queue_lock);
0538     return count;
0539 }
0540 
0541 static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
0542                   char *buf)
0543 {
0544     struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
0545     struct solos_card *card = dev_get_drvdata(dev);
0546     uint32_t data32;
0547 
0548     data32 = ioread32(card->config_regs + GPIO_STATUS);
0549     data32 = (data32 >> gattr->offset) & 1;
0550 
0551     return sprintf(buf, "%d\n", data32);
0552 }
0553 
0554 static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
0555                  char *buf)
0556 {
0557     struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
0558     struct solos_card *card = dev_get_drvdata(dev);
0559     uint32_t data32;
0560 
0561     data32 = ioread32(card->config_regs + GPIO_STATUS);
0562     switch (gattr->offset) {
0563     case 0:
0564         /* HardwareVersion */
0565         data32 = data32 & 0x1F;
0566         break;
0567     case 1:
0568         /* HardwareVariant */
0569         data32 = (data32 >> 5) & 0x0F;
0570         break;
0571     }
0572     return sprintf(buf, "%d\n", data32);
0573 }
0574 
0575 static DEVICE_ATTR_RW(console);
0576 
0577 
0578 #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
0579 #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
0580 
0581 #include "solos-attrlist.c"
0582 
0583 static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
0584 static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
0585 static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
0586 static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
0587 static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
0588 static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
0589 static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
0590 static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
0591 #undef SOLOS_ATTR_RO
0592 #undef SOLOS_ATTR_RW
0593 
0594 #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
0595 #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
0596 
0597 static struct attribute *solos_attrs[] = {
0598 #include "solos-attrlist.c"
0599     NULL
0600 };
0601 
0602 static const struct attribute_group solos_attr_group = {
0603     .attrs = solos_attrs,
0604     .name = "parameters",
0605 };
0606 
0607 static struct attribute *gpio_attrs[] = {
0608     &gpio_attr_GPIO1.attr.attr,
0609     &gpio_attr_GPIO2.attr.attr,
0610     &gpio_attr_GPIO3.attr.attr,
0611     &gpio_attr_GPIO4.attr.attr,
0612     &gpio_attr_GPIO5.attr.attr,
0613     &gpio_attr_PushButton.attr.attr,
0614     &gpio_attr_HardwareVersion.attr.attr,
0615     &gpio_attr_HardwareVariant.attr.attr,
0616     NULL
0617 };
0618 
0619 static const struct attribute_group gpio_attr_group = {
0620     .attrs = gpio_attrs,
0621     .name = "gpio",
0622 };
0623 
0624 static int flash_upgrade(struct solos_card *card, int chip)
0625 {
0626     const struct firmware *fw;
0627     const char *fw_name;
0628     int blocksize = 0;
0629     int numblocks = 0;
0630     int offset;
0631 
0632     switch (chip) {
0633     case 0:
0634         fw_name = "solos-FPGA.bin";
0635         if (card->atmel_flash)
0636             blocksize = ATMEL_FPGA_BLOCK;
0637         else
0638             blocksize = SPI_FLASH_BLOCK;
0639         break;
0640     case 1:
0641         fw_name = "solos-Firmware.bin";
0642         if (card->atmel_flash)
0643             blocksize = ATMEL_SOLOS_BLOCK;
0644         else
0645             blocksize = SPI_FLASH_BLOCK;
0646         break;
0647     case 2:
0648         if (card->fpga_version > LEGACY_BUFFERS){
0649             fw_name = "solos-db-FPGA.bin";
0650             if (card->atmel_flash)
0651                 blocksize = ATMEL_FPGA_BLOCK;
0652             else
0653                 blocksize = SPI_FLASH_BLOCK;
0654         } else {
0655             dev_info(&card->dev->dev, "FPGA version doesn't support"
0656                     " daughter board upgrades\n");
0657             return -EPERM;
0658         }
0659         break;
0660     case 3:
0661         if (card->fpga_version > LEGACY_BUFFERS){
0662             fw_name = "solos-Firmware.bin";
0663             if (card->atmel_flash)
0664                 blocksize = ATMEL_SOLOS_BLOCK;
0665             else
0666                 blocksize = SPI_FLASH_BLOCK;
0667         } else {
0668             dev_info(&card->dev->dev, "FPGA version doesn't support"
0669                     " daughter board upgrades\n");
0670             return -EPERM;
0671         }
0672         break;
0673     default:
0674         return -ENODEV;
0675     }
0676 
0677     if (request_firmware(&fw, fw_name, &card->dev->dev))
0678         return -ENOENT;
0679 
0680     dev_info(&card->dev->dev, "Flash upgrade starting\n");
0681 
0682     /* New FPGAs require driver version before permitting flash upgrades */
0683     iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
0684 
0685     numblocks = fw->size / blocksize;
0686     dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
0687     dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
0688     
0689     dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
0690     iowrite32(1, card->config_regs + FPGA_MODE);
0691     (void) ioread32(card->config_regs + FPGA_MODE); 
0692 
0693     /* Set mode to Chip Erase */
0694     if(chip == 0 || chip == 2)
0695         dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
0696     if(chip == 1 || chip == 3)
0697         dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
0698     iowrite32((chip * 2), card->config_regs + FLASH_MODE);
0699 
0700 
0701     iowrite32(1, card->config_regs + WRITE_FLASH);
0702     wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
0703 
0704     for (offset = 0; offset < fw->size; offset += blocksize) {
0705         int i;
0706 
0707         /* Clear write flag */
0708         iowrite32(0, card->config_regs + WRITE_FLASH);
0709 
0710         /* Set mode to Block Write */
0711         /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
0712         iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
0713 
0714         /* Copy block to buffer, swapping each 16 bits for Atmel flash */
0715         for(i = 0; i < blocksize; i += 4) {
0716             uint32_t word;
0717             if (card->atmel_flash)
0718                 word = swahb32p((uint32_t *)(fw->data + offset + i));
0719             else
0720                 word = *(uint32_t *)(fw->data + offset + i);
0721             if(card->fpga_version > LEGACY_BUFFERS)
0722                 iowrite32(word, FLASH_BUF + i);
0723             else
0724                 iowrite32(word, RX_BUF(card, 3) + i);
0725         }
0726 
0727         /* Specify block number and then trigger flash write */
0728         iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
0729         iowrite32(1, card->config_regs + WRITE_FLASH);
0730         wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
0731     }
0732 
0733     release_firmware(fw);
0734     iowrite32(0, card->config_regs + WRITE_FLASH);
0735     iowrite32(0, card->config_regs + FPGA_MODE);
0736     iowrite32(0, card->config_regs + FLASH_MODE);
0737     dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
0738     return 0;
0739 }
0740 
0741 static irqreturn_t solos_irq(int irq, void *dev_id)
0742 {
0743     struct solos_card *card = dev_id;
0744     int handled = 1;
0745 
0746     iowrite32(0, card->config_regs + IRQ_CLEAR);
0747 
0748     /* If we're up and running, just kick the tasklet to process TX/RX */
0749     if (card->atmdev[0])
0750         tasklet_schedule(&card->tlet);
0751     else
0752         wake_up(&card->fw_wq);
0753 
0754     return IRQ_RETVAL(handled);
0755 }
0756 
0757 static void solos_bh(unsigned long card_arg)
0758 {
0759     struct solos_card *card = (void *)card_arg;
0760     uint32_t card_flags;
0761     uint32_t rx_done = 0;
0762     int port;
0763 
0764     /*
0765      * Since fpga_tx() is going to need to read the flags under its lock,
0766      * it can return them to us so that we don't have to hit PCI MMIO
0767      * again for the same information
0768      */
0769     card_flags = fpga_tx(card);
0770 
0771     for (port = 0; port < card->nr_ports; port++) {
0772         if (card_flags & (0x10 << port)) {
0773             struct pkt_hdr _hdr, *header;
0774             struct sk_buff *skb;
0775             struct atm_vcc *vcc;
0776             int size;
0777 
0778             if (card->using_dma) {
0779                 skb = card->rx_skb[port];
0780                 card->rx_skb[port] = NULL;
0781 
0782                 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
0783                          RX_DMA_SIZE, DMA_FROM_DEVICE);
0784 
0785                 header = (void *)skb->data;
0786                 size = le16_to_cpu(header->size);
0787                 skb_put(skb, size + sizeof(*header));
0788                 skb_pull(skb, sizeof(*header));
0789             } else {
0790                 header = &_hdr;
0791 
0792                 rx_done |= 0x10 << port;
0793 
0794                 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
0795 
0796                 size = le16_to_cpu(header->size);
0797                 if (size > (card->buffer_size - sizeof(*header))){
0798                     dev_warn(&card->dev->dev, "Invalid buffer size\n");
0799                     continue;
0800                 }
0801 
0802                 /* Use netdev_alloc_skb() because it adds NET_SKB_PAD of
0803                  * headroom, and ensures we can route packets back out an
0804                  * Ethernet interface (for example) without having to
0805                  * reallocate. Adding NET_IP_ALIGN also ensures that both
0806                  * PPPoATM and PPPoEoBR2684 packets end up aligned. */
0807                 skb = netdev_alloc_skb_ip_align(NULL, size + 1);
0808                 if (!skb) {
0809                     if (net_ratelimit())
0810                         dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
0811                     continue;
0812                 }
0813 
0814                 memcpy_fromio(skb_put(skb, size),
0815                           RX_BUF(card, port) + sizeof(*header),
0816                           size);
0817             }
0818             if (atmdebug) {
0819                 dev_info(&card->dev->dev, "Received: port %d\n", port);
0820                 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
0821                      size, le16_to_cpu(header->vpi),
0822                      le16_to_cpu(header->vci));
0823                 print_buffer(skb);
0824             }
0825 
0826             switch (le16_to_cpu(header->type)) {
0827             case PKT_DATA:
0828                 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
0829                            le16_to_cpu(header->vci));
0830                 if (!vcc) {
0831                     if (net_ratelimit())
0832                         dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
0833                              le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
0834                              port);
0835                     dev_kfree_skb_any(skb);
0836                     break;
0837                 }
0838                 atm_charge(vcc, skb->truesize);
0839                 vcc->push(vcc, skb);
0840                 atomic_inc(&vcc->stats->rx);
0841                 break;
0842 
0843             case PKT_STATUS:
0844                 if (process_status(card, port, skb) &&
0845                     net_ratelimit()) {
0846                     dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
0847                     print_buffer(skb);
0848                 }
0849                 dev_kfree_skb_any(skb);
0850                 break;
0851 
0852             case PKT_COMMAND:
0853             default: /* FIXME: Not really, surely? */
0854                 if (process_command(card, port, skb))
0855                     break;
0856                 spin_lock(&card->cli_queue_lock);
0857                 if (skb_queue_len(&card->cli_queue[port]) > 10) {
0858                     if (net_ratelimit())
0859                         dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
0860                              port);
0861                     dev_kfree_skb_any(skb);
0862                 } else
0863                     skb_queue_tail(&card->cli_queue[port], skb);
0864                 spin_unlock(&card->cli_queue_lock);
0865                 break;
0866             }
0867         }
0868         /* Allocate RX skbs for any ports which need them */
0869         if (card->using_dma && card->atmdev[port] &&
0870             !card->rx_skb[port]) {
0871             /* Unlike the MMIO case (qv) we can't add NET_IP_ALIGN
0872              * here; the FPGA can only DMA to addresses which are
0873              * aligned to 4 bytes. */
0874             struct sk_buff *skb = dev_alloc_skb(RX_DMA_SIZE);
0875             if (skb) {
0876                 SKB_CB(skb)->dma_addr =
0877                     dma_map_single(&card->dev->dev, skb->data,
0878                                RX_DMA_SIZE, DMA_FROM_DEVICE);
0879                 iowrite32(SKB_CB(skb)->dma_addr,
0880                       card->config_regs + RX_DMA_ADDR(port));
0881                 card->rx_skb[port] = skb;
0882             } else {
0883                 if (net_ratelimit())
0884                     dev_warn(&card->dev->dev, "Failed to allocate RX skb");
0885 
0886                 /* We'll have to try again later */
0887                 tasklet_schedule(&card->tlet);
0888             }
0889         }
0890     }
0891     if (rx_done)
0892         iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
0893 
0894     return;
0895 }
0896 
0897 static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
0898 {
0899     struct hlist_head *head;
0900     struct atm_vcc *vcc = NULL;
0901     struct sock *s;
0902 
0903     read_lock(&vcc_sklist_lock);
0904     head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
0905     sk_for_each(s, head) {
0906         vcc = atm_sk(s);
0907         if (vcc->dev == dev && vcc->vci == vci &&
0908             vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
0909             test_bit(ATM_VF_READY, &vcc->flags))
0910             goto out;
0911     }
0912     vcc = NULL;
0913  out:
0914     read_unlock(&vcc_sklist_lock);
0915     return vcc;
0916 }
0917 
0918 static int popen(struct atm_vcc *vcc)
0919 {
0920     struct solos_card *card = vcc->dev->dev_data;
0921     struct sk_buff *skb;
0922     struct pkt_hdr *header;
0923 
0924     if (vcc->qos.aal != ATM_AAL5) {
0925         dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
0926              vcc->qos.aal);
0927         return -EINVAL;
0928     }
0929 
0930     skb = alloc_skb(sizeof(*header), GFP_KERNEL);
0931     if (!skb) {
0932         if (net_ratelimit())
0933             dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
0934         return -ENOMEM;
0935     }
0936     header = skb_put(skb, sizeof(*header));
0937 
0938     header->size = cpu_to_le16(0);
0939     header->vpi = cpu_to_le16(vcc->vpi);
0940     header->vci = cpu_to_le16(vcc->vci);
0941     header->type = cpu_to_le16(PKT_POPEN);
0942 
0943     fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
0944 
0945     set_bit(ATM_VF_ADDR, &vcc->flags);
0946     set_bit(ATM_VF_READY, &vcc->flags);
0947 
0948     return 0;
0949 }
0950 
0951 static void pclose(struct atm_vcc *vcc)
0952 {
0953     struct solos_card *card = vcc->dev->dev_data;
0954     unsigned char port = SOLOS_CHAN(vcc->dev);
0955     struct sk_buff *skb, *tmpskb;
0956     struct pkt_hdr *header;
0957 
0958     /* Remove any yet-to-be-transmitted packets from the pending queue */
0959     spin_lock(&card->tx_queue_lock);
0960     skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
0961         if (SKB_CB(skb)->vcc == vcc) {
0962             skb_unlink(skb, &card->tx_queue[port]);
0963             solos_pop(vcc, skb);
0964         }
0965     }
0966     spin_unlock(&card->tx_queue_lock);
0967 
0968     skb = alloc_skb(sizeof(*header), GFP_KERNEL);
0969     if (!skb) {
0970         dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
0971         return;
0972     }
0973     header = skb_put(skb, sizeof(*header));
0974 
0975     header->size = cpu_to_le16(0);
0976     header->vpi = cpu_to_le16(vcc->vpi);
0977     header->vci = cpu_to_le16(vcc->vci);
0978     header->type = cpu_to_le16(PKT_PCLOSE);
0979 
0980     skb_get(skb);
0981     fpga_queue(card, port, skb, NULL);
0982 
0983     if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
0984         dev_warn(&card->dev->dev,
0985              "Timeout waiting for VCC close on port %d\n", port);
0986 
0987     dev_kfree_skb(skb);
0988 
0989     /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
0990        tasklet has finished processing any incoming packets (and, more to
0991        the point, using the vcc pointer). */
0992     tasklet_unlock_wait(&card->tlet);
0993 
0994     clear_bit(ATM_VF_ADDR, &vcc->flags);
0995 
0996     return;
0997 }
0998 
0999 static int print_buffer(struct sk_buff *buf)
1000 {
1001     int len,i;
1002     char msg[500];
1003     char item[10];
1004 
1005     len = buf->len;
1006     for (i = 0; i < len; i++){
1007         if(i % 8 == 0)
1008             sprintf(msg, "%02X: ", i);
1009 
1010         sprintf(item,"%02X ",*(buf->data + i));
1011         strcat(msg, item);
1012         if(i % 8 == 7) {
1013             sprintf(item, "\n");
1014             strcat(msg, item);
1015             printk(KERN_DEBUG "%s", msg);
1016         }
1017     }
1018     if (i % 8 != 0) {
1019         sprintf(item, "\n");
1020         strcat(msg, item);
1021         printk(KERN_DEBUG "%s", msg);
1022     }
1023     printk(KERN_DEBUG "\n");
1024 
1025     return 0;
1026 }
1027 
1028 static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
1029                struct atm_vcc *vcc)
1030 {
1031     int old_len;
1032     unsigned long flags;
1033 
1034     SKB_CB(skb)->vcc = vcc;
1035 
1036     spin_lock_irqsave(&card->tx_queue_lock, flags);
1037     old_len = skb_queue_len(&card->tx_queue[port]);
1038     skb_queue_tail(&card->tx_queue[port], skb);
1039     if (!old_len)
1040         card->tx_mask |= (1 << port);
1041     spin_unlock_irqrestore(&card->tx_queue_lock, flags);
1042 
1043     /* Theoretically we could just schedule the tasklet here, but
1044        that introduces latency we don't want -- it's noticeable */
1045     if (!old_len)
1046         fpga_tx(card);
1047 }
1048 
1049 static uint32_t fpga_tx(struct solos_card *card)
1050 {
1051     uint32_t tx_pending, card_flags;
1052     uint32_t tx_started = 0;
1053     struct sk_buff *skb;
1054     struct atm_vcc *vcc;
1055     unsigned char port;
1056     unsigned long flags;
1057 
1058     spin_lock_irqsave(&card->tx_lock, flags);
1059     
1060     card_flags = ioread32(card->config_regs + FLAGS_ADDR);
1061     /*
1062      * The queue lock is required for _writing_ to tx_mask, but we're
1063      * OK to read it here without locking. The only potential update
1064      * that we could race with is in fpga_queue() where it sets a bit
1065      * for a new port... but it's going to call this function again if
1066      * it's doing that, anyway.
1067      */
1068     tx_pending = card->tx_mask & ~card_flags;
1069 
1070     for (port = 0; tx_pending; tx_pending >>= 1, port++) {
1071         if (tx_pending & 1) {
1072             struct sk_buff *oldskb = card->tx_skb[port];
1073             if (oldskb) {
1074                 dma_unmap_single(&card->dev->dev, SKB_CB(oldskb)->dma_addr,
1075                          oldskb->len, DMA_TO_DEVICE);
1076                 card->tx_skb[port] = NULL;
1077             }
1078             spin_lock(&card->tx_queue_lock);
1079             skb = skb_dequeue(&card->tx_queue[port]);
1080             if (!skb)
1081                 card->tx_mask &= ~(1 << port);
1082             spin_unlock(&card->tx_queue_lock);
1083 
1084             if (skb && !card->using_dma) {
1085                 memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
1086                 tx_started |= 1 << port;
1087                 oldskb = skb; /* We're done with this skb already */
1088             } else if (skb && card->using_dma) {
1089                 unsigned char *data = skb->data;
1090                 if ((unsigned long)data & card->dma_alignment) {
1091                     data = card->dma_bounce + (BUF_SIZE * port);
1092                     memcpy(data, skb->data, skb->len);
1093                 }
1094                 SKB_CB(skb)->dma_addr = dma_map_single(&card->dev->dev, data,
1095                                        skb->len, DMA_TO_DEVICE);
1096                 card->tx_skb[port] = skb;
1097                 iowrite32(SKB_CB(skb)->dma_addr,
1098                       card->config_regs + TX_DMA_ADDR(port));
1099             }
1100 
1101             if (!oldskb)
1102                 continue;
1103 
1104             /* Clean up and free oldskb now it's gone */
1105             if (atmdebug) {
1106                 struct pkt_hdr *header = (void *)oldskb->data;
1107                 int size = le16_to_cpu(header->size);
1108 
1109                 skb_pull(oldskb, sizeof(*header));
1110                 dev_info(&card->dev->dev, "Transmitted: port %d\n",
1111                      port);
1112                 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
1113                      size, le16_to_cpu(header->vpi),
1114                      le16_to_cpu(header->vci));
1115                 print_buffer(oldskb);
1116             }
1117 
1118             vcc = SKB_CB(oldskb)->vcc;
1119 
1120             if (vcc) {
1121                 atomic_inc(&vcc->stats->tx);
1122                 solos_pop(vcc, oldskb);
1123             } else {
1124                 dev_kfree_skb_irq(oldskb);
1125                 wake_up(&card->param_wq);
1126             }
1127         }
1128     }
1129     /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
1130     if (tx_started)
1131         iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1132 
1133     spin_unlock_irqrestore(&card->tx_lock, flags);
1134     return card_flags;
1135 }
1136 
1137 static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1138 {
1139     struct solos_card *card = vcc->dev->dev_data;
1140     struct pkt_hdr *header;
1141     int pktlen;
1142 
1143     pktlen = skb->len;
1144     if (pktlen > (BUF_SIZE - sizeof(*header))) {
1145         dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1146         solos_pop(vcc, skb);
1147         return 0;
1148     }
1149 
1150     if (!skb_clone_writable(skb, sizeof(*header))) {
1151         int expand_by = 0;
1152         int ret;
1153 
1154         if (skb_headroom(skb) < sizeof(*header))
1155             expand_by = sizeof(*header) - skb_headroom(skb);
1156 
1157         ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1158         if (ret) {
1159             dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
1160             solos_pop(vcc, skb);
1161             return ret;
1162         }
1163     }
1164 
1165     header = skb_push(skb, sizeof(*header));
1166 
1167     /* This does _not_ include the size of the header */
1168     header->size = cpu_to_le16(pktlen);
1169     header->vpi = cpu_to_le16(vcc->vpi);
1170     header->vci = cpu_to_le16(vcc->vci);
1171     header->type = cpu_to_le16(PKT_DATA);
1172 
1173     fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1174 
1175     return 0;
1176 }
1177 
1178 static const struct atmdev_ops fpga_ops = {
1179     .open =     popen,
1180     .close =    pclose,
1181     .ioctl =    NULL,
1182     .send =     psend,
1183     .send_oam = NULL,
1184     .phy_put =  NULL,
1185     .phy_get =  NULL,
1186     .change_qos =   NULL,
1187     .proc_read =    NULL,
1188     .owner =    THIS_MODULE
1189 };
1190 
1191 static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1192 {
1193     int err;
1194     uint16_t fpga_ver;
1195     uint8_t major_ver, minor_ver;
1196     uint32_t data32;
1197     struct solos_card *card;
1198 
1199     card = kzalloc(sizeof(*card), GFP_KERNEL);
1200     if (!card)
1201         return -ENOMEM;
1202 
1203     card->dev = dev;
1204     init_waitqueue_head(&card->fw_wq);
1205     init_waitqueue_head(&card->param_wq);
1206 
1207     err = pci_enable_device(dev);
1208     if (err) {
1209         dev_warn(&dev->dev,  "Failed to enable PCI device\n");
1210         goto out;
1211     }
1212 
1213     err = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
1214     if (err) {
1215         dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1216         goto out;
1217     }
1218 
1219     err = pci_request_regions(dev, "solos");
1220     if (err) {
1221         dev_warn(&dev->dev, "Failed to request regions\n");
1222         goto out;
1223     }
1224 
1225     card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1226     if (!card->config_regs) {
1227         dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1228         err = -ENOMEM;
1229         goto out_release_regions;
1230     }
1231     card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1232     if (!card->buffers) {
1233         dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1234         err = -ENOMEM;
1235         goto out_unmap_config;
1236     }
1237 
1238     if (reset) {
1239         iowrite32(1, card->config_regs + FPGA_MODE);
1240         ioread32(card->config_regs + FPGA_MODE);
1241 
1242         iowrite32(0, card->config_regs + FPGA_MODE);
1243         ioread32(card->config_regs + FPGA_MODE);
1244     }
1245 
1246     data32 = ioread32(card->config_regs + FPGA_VER);
1247     fpga_ver = (data32 & 0x0000FFFF);
1248     major_ver = ((data32 & 0xFF000000) >> 24);
1249     minor_ver = ((data32 & 0x00FF0000) >> 16);
1250     card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1251     if (card->fpga_version > LEGACY_BUFFERS)
1252         card->buffer_size = BUF_SIZE;
1253     else
1254         card->buffer_size = OLD_BUF_SIZE;
1255     dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1256          major_ver, minor_ver, fpga_ver);
1257 
1258     if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
1259                   db_fpga_upgrade || db_firmware_upgrade)) {
1260         dev_warn(&dev->dev,
1261              "FPGA too old; cannot upgrade flash. Use JTAG.\n");
1262         fpga_upgrade = firmware_upgrade = 0;
1263         db_fpga_upgrade = db_firmware_upgrade = 0;
1264     }
1265 
1266     /* Stopped using Atmel flash after 0.03-38 */
1267     if (fpga_ver < 39)
1268         card->atmel_flash = 1;
1269     else
1270         card->atmel_flash = 0;
1271 
1272     data32 = ioread32(card->config_regs + PORTS);
1273     card->nr_ports = (data32 & 0x000000FF);
1274 
1275     if (card->fpga_version >= DMA_SUPPORTED) {
1276         pci_set_master(dev);
1277         card->using_dma = 1;
1278         if (1) { /* All known FPGA versions so far */
1279             card->dma_alignment = 3;
1280             card->dma_bounce = kmalloc_array(card->nr_ports,
1281                              BUF_SIZE, GFP_KERNEL);
1282             if (!card->dma_bounce) {
1283                 dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
1284                 err = -ENOMEM;
1285                 /* Fallback to MMIO doesn't work */
1286                 goto out_unmap_both;
1287             }
1288         }
1289     } else {
1290         card->using_dma = 0;
1291         /* Set RX empty flag for all ports */
1292         iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1293     }
1294 
1295     pci_set_drvdata(dev, card);
1296 
1297     tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1298     spin_lock_init(&card->tx_lock);
1299     spin_lock_init(&card->tx_queue_lock);
1300     spin_lock_init(&card->cli_queue_lock);
1301     spin_lock_init(&card->param_queue_lock);
1302     INIT_LIST_HEAD(&card->param_queue);
1303 
1304     err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
1305               "solos-pci", card);
1306     if (err) {
1307         dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
1308         goto out_unmap_both;
1309     }
1310 
1311     iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1312 
1313     if (fpga_upgrade)
1314         flash_upgrade(card, 0);
1315 
1316     if (firmware_upgrade)
1317         flash_upgrade(card, 1);
1318 
1319     if (db_fpga_upgrade)
1320         flash_upgrade(card, 2);
1321 
1322     if (db_firmware_upgrade)
1323         flash_upgrade(card, 3);
1324 
1325     err = atm_init(card, &dev->dev);
1326     if (err)
1327         goto out_free_irq;
1328 
1329     if (card->fpga_version >= DMA_SUPPORTED &&
1330         sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
1331         dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
1332 
1333     return 0;
1334 
1335  out_free_irq:
1336     iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1337     free_irq(dev->irq, card);
1338     tasklet_kill(&card->tlet);
1339     
1340  out_unmap_both:
1341     kfree(card->dma_bounce);
1342     pci_iounmap(dev, card->buffers);
1343  out_unmap_config:
1344     pci_iounmap(dev, card->config_regs);
1345  out_release_regions:
1346     pci_release_regions(dev);
1347  out:
1348     kfree(card);
1349     return err;
1350 }
1351 
1352 static int atm_init(struct solos_card *card, struct device *parent)
1353 {
1354     int i;
1355 
1356     for (i = 0; i < card->nr_ports; i++) {
1357         struct sk_buff *skb;
1358         struct pkt_hdr *header;
1359 
1360         skb_queue_head_init(&card->tx_queue[i]);
1361         skb_queue_head_init(&card->cli_queue[i]);
1362 
1363         card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
1364         if (!card->atmdev[i]) {
1365             dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1366             atm_remove(card);
1367             return -ENODEV;
1368         }
1369         if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1370             dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
1371         if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1372             dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
1373 
1374         dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1375 
1376         card->atmdev[i]->ci_range.vpi_bits = 8;
1377         card->atmdev[i]->ci_range.vci_bits = 16;
1378         card->atmdev[i]->dev_data = card;
1379         card->atmdev[i]->phy_data = (void *)(unsigned long)i;
1380         atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
1381 
1382         skb = alloc_skb(sizeof(*header), GFP_KERNEL);
1383         if (!skb) {
1384             dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1385             continue;
1386         }
1387 
1388         header = skb_put(skb, sizeof(*header));
1389 
1390         header->size = cpu_to_le16(0);
1391         header->vpi = cpu_to_le16(0);
1392         header->vci = cpu_to_le16(0);
1393         header->type = cpu_to_le16(PKT_STATUS);
1394 
1395         fpga_queue(card, i, skb, NULL);
1396     }
1397     return 0;
1398 }
1399 
1400 static void atm_remove(struct solos_card *card)
1401 {
1402     int i;
1403 
1404     for (i = 0; i < card->nr_ports; i++) {
1405         if (card->atmdev[i]) {
1406             struct sk_buff *skb;
1407 
1408             dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
1409 
1410             sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
1411             atm_dev_deregister(card->atmdev[i]);
1412 
1413             skb = card->rx_skb[i];
1414             if (skb) {
1415                 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1416                          RX_DMA_SIZE, DMA_FROM_DEVICE);
1417                 dev_kfree_skb(skb);
1418             }
1419             skb = card->tx_skb[i];
1420             if (skb) {
1421                 dma_unmap_single(&card->dev->dev, SKB_CB(skb)->dma_addr,
1422                          skb->len, DMA_TO_DEVICE);
1423                 dev_kfree_skb(skb);
1424             }
1425             while ((skb = skb_dequeue(&card->tx_queue[i])))
1426                 dev_kfree_skb(skb);
1427  
1428         }
1429     }
1430 }
1431 
1432 static void fpga_remove(struct pci_dev *dev)
1433 {
1434     struct solos_card *card = pci_get_drvdata(dev);
1435     
1436     /* Disable IRQs */
1437     iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1438 
1439     /* Reset FPGA */
1440     iowrite32(1, card->config_regs + FPGA_MODE);
1441     (void)ioread32(card->config_regs + FPGA_MODE); 
1442 
1443     if (card->fpga_version >= DMA_SUPPORTED)
1444         sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
1445 
1446     atm_remove(card);
1447 
1448     free_irq(dev->irq, card);
1449     tasklet_kill(&card->tlet);
1450 
1451     kfree(card->dma_bounce);
1452 
1453     /* Release device from reset */
1454     iowrite32(0, card->config_regs + FPGA_MODE);
1455     (void)ioread32(card->config_regs + FPGA_MODE); 
1456 
1457     pci_iounmap(dev, card->buffers);
1458     pci_iounmap(dev, card->config_regs);
1459 
1460     pci_release_regions(dev);
1461     pci_disable_device(dev);
1462 
1463     kfree(card);
1464 }
1465 
1466 static const struct pci_device_id fpga_pci_tbl[] = {
1467     { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1468     { 0, }
1469 };
1470 
1471 MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1472 
1473 static struct pci_driver fpga_driver = {
1474     .name =     "solos",
1475     .id_table = fpga_pci_tbl,
1476     .probe =    fpga_probe,
1477     .remove =   fpga_remove,
1478 };
1479 
1480 
1481 static int __init solos_pci_init(void)
1482 {
1483     BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
1484 
1485     printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1486     return pci_register_driver(&fpga_driver);
1487 }
1488 
1489 static void __exit solos_pci_exit(void)
1490 {
1491     pci_unregister_driver(&fpga_driver);
1492     printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1493 }
1494 
1495 module_init(solos_pci_init);
1496 module_exit(solos_pci_exit);
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