drivers/atm/nicstar.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * nicstar.c
0004  *
0005  * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
0006  *
0007  * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
0008  *            It was taken from the frle-0.22 device driver.
0009  *            As the file doesn't have a copyright notice, in the file
0010  *            nicstarmac.copyright I put the copyright notice from the
0011  *            frle-0.22 device driver.
0012  *            Some code is based on the nicstar driver by M. Welsh.
0013  *
0014  * Author: Rui Prior (rprior@inescn.pt)
0015  * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
0016  *
0017  *
0018  * (C) INESC 1999
0019  */
0020
0021 /*
0022  * IMPORTANT INFORMATION
0023  *
0024  * There are currently three types of spinlocks:
0025  *
0026  * 1 - Per card interrupt spinlock (to protect structures and such)
0027  * 2 - Per SCQ scq spinlock
0028  * 3 - Per card resource spinlock (to access registers, etc.)
0029  *
0030  * These must NEVER be grabbed in reverse order.
0031  *
0032  */
0033
0034 /* Header files */
0035
0036 #include <linux/module.h>
0037 #include <linux/kernel.h>
0038 #include <linux/skbuff.h>
0039 #include <linux/atmdev.h>
0040 #include <linux/atm.h>
0041 #include <linux/pci.h>
0042 #include <linux/dma-mapping.h>
0043 #include <linux/types.h>
0044 #include <linux/string.h>
0045 #include <linux/delay.h>
0046 #include <linux/init.h>
0047 #include <linux/sched.h>
0048 #include <linux/timer.h>
0049 #include <linux/interrupt.h>
0050 #include <linux/bitops.h>
0051 #include <linux/slab.h>
0052 #include <linux/idr.h>
0053 #include <asm/io.h>
0054 #include <linux/uaccess.h>
0055 #include <linux/atomic.h>
0056 #include <linux/etherdevice.h>
0057 #include "nicstar.h"
0058 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
0059 #include "suni.h"
0060 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
0061 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
0062 #include "idt77105.h"
0063 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
0064
0065 /* Additional code */
0066
0067 #include "nicstarmac.c"
0068
0069 /* Configurable parameters */
0070
0071 #undef PHY_LOOPBACK
0072 #undef TX_DEBUG
0073 #undef RX_DEBUG
0074 #undef GENERAL_DEBUG
0075 #undef EXTRA_DEBUG
0076
0077 /* Do not touch these */
0078
0079 #ifdef TX_DEBUG
0080 #define TXPRINTK(args...) printk(args)
0081 #else
0082 #define TXPRINTK(args...)
0083 #endif /* TX_DEBUG */
0084
0085 #ifdef RX_DEBUG
0086 #define RXPRINTK(args...) printk(args)
0087 #else
0088 #define RXPRINTK(args...)
0089 #endif /* RX_DEBUG */
0090
0091 #ifdef GENERAL_DEBUG
0092 #define PRINTK(args...) printk(args)
0093 #else
0094 #define PRINTK(args...) do {} while (0)
0095 #endif /* GENERAL_DEBUG */
0096
0097 #ifdef EXTRA_DEBUG
0098 #define XPRINTK(args...) printk(args)
0099 #else
0100 #define XPRINTK(args...)
0101 #endif /* EXTRA_DEBUG */
0102
0103 /* Macros */
0104
0105 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
0106
0107 #define NS_DELAY mdelay(1)
0108
0109 #define PTR_DIFF(a, b)  ((u32)((unsigned long)(a) - (unsigned long)(b)))
0110
0111 #ifndef ATM_SKB
0112 #define ATM_SKB(s) (&(s)->atm)
0113 #endif
0114
0115 #define scq_virt_to_bus(scq, p) \
0116         (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
0117
0118 /* Function declarations */
0119
0120 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
0121 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
0122               int count);
0123 static int ns_init_card(int i, struct pci_dev *pcidev);
0124 static void ns_init_card_error(ns_dev * card, int error);
0125 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
0126 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
0127 static void push_rxbufs(ns_dev *, struct sk_buff *);
0128 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
0129 static int ns_open(struct atm_vcc *vcc);
0130 static void ns_close(struct atm_vcc *vcc);
0131 static void fill_tst(ns_dev * card, int n, vc_map * vc);
0132 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
0133 static int ns_send_bh(struct atm_vcc *vcc, struct sk_buff *skb);
0134 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
0135              struct sk_buff *skb, bool may_sleep);
0136 static void process_tsq(ns_dev * card);
0137 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
0138 static void process_rsq(ns_dev * card);
0139 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
0140 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
0141 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
0142 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
0143 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
0144 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
0145 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
0146 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
0147 #ifdef EXTRA_DEBUG
0148 static void which_list(ns_dev * card, struct sk_buff *skb);
0149 #endif
0150 static void ns_poll(struct timer_list *unused);
0151 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
0152                unsigned long addr);
0153 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
0154
0155 /* Global variables */
0156
0157 static struct ns_dev *cards[NS_MAX_CARDS];
0158 static unsigned num_cards;
0159 static const struct atmdev_ops atm_ops = {
0160     .open = ns_open,
0161     .close = ns_close,
0162     .ioctl = ns_ioctl,
0163     .send = ns_send,
0164     .send_bh = ns_send_bh,
0165     .phy_put = ns_phy_put,
0166     .phy_get = ns_phy_get,
0167     .proc_read = ns_proc_read,
0168     .owner = THIS_MODULE,
0169 };
0170
0171 static struct timer_list ns_timer;
0172 static char *mac[NS_MAX_CARDS];
0173 module_param_array(mac, charp, NULL, 0);
0174 MODULE_LICENSE("GPL");
0175
0176 /* Functions */
0177
0178 static int nicstar_init_one(struct pci_dev *pcidev,
0179                 const struct pci_device_id *ent)
0180 {
0181     static int index = -1;
0182     unsigned int error;
0183
0184     index++;
0185     cards[index] = NULL;
0186
0187     error = ns_init_card(index, pcidev);
0188     if (error) {
0189         cards[index--] = NULL;  /* don't increment index */
0190         goto err_out;
0191     }
0192
0193     return 0;
0194 err_out:
0195     return -ENODEV;
0196 }
0197
0198 static void nicstar_remove_one(struct pci_dev *pcidev)
0199 {
0200     int i, j;
0201     ns_dev *card = pci_get_drvdata(pcidev);
0202     struct sk_buff *hb;
0203     struct sk_buff *iovb;
0204     struct sk_buff *lb;
0205     struct sk_buff *sb;
0206
0207     i = card->index;
0208
0209     if (cards[i] == NULL)
0210         return;
0211
0212     if (card->atmdev->phy && card->atmdev->phy->stop)
0213         card->atmdev->phy->stop(card->atmdev);
0214
0215     /* Stop everything */
0216     writel(0x00000000, card->membase + CFG);
0217
0218     /* De-register device */
0219     atm_dev_deregister(card->atmdev);
0220
0221     /* Disable PCI device */
0222     pci_disable_device(pcidev);
0223
0224     /* Free up resources */
0225     j = 0;
0226     PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
0227     while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
0228         dev_kfree_skb_any(hb);
0229         j++;
0230     }
0231     PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
0232     j = 0;
0233     PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
0234            card->iovpool.count);
0235     while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
0236         dev_kfree_skb_any(iovb);
0237         j++;
0238     }
0239     PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
0240     while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
0241         dev_kfree_skb_any(lb);
0242     while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
0243         dev_kfree_skb_any(sb);
0244     free_scq(card, card->scq0, NULL);
0245     for (j = 0; j < NS_FRSCD_NUM; j++) {
0246         if (card->scd2vc[j] != NULL)
0247             free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
0248     }
0249     idr_destroy(&card->idr);
0250     dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
0251               card->rsq.org, card->rsq.dma);
0252     dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
0253               card->tsq.org, card->tsq.dma);
0254     free_irq(card->pcidev->irq, card);
0255     iounmap(card->membase);
0256     kfree(card);
0257 }
0258
0259 static const struct pci_device_id nicstar_pci_tbl[] = {
0260     { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
0261     {0,}            /* terminate list */
0262 };
0263
0264 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
0265
0266 static struct pci_driver nicstar_driver = {
0267     .name = "nicstar",
0268     .id_table = nicstar_pci_tbl,
0269     .probe = nicstar_init_one,
0270     .remove = nicstar_remove_one,
0271 };
0272
0273 static int __init nicstar_init(void)
0274 {
0275     unsigned error = 0; /* Initialized to remove compile warning */
0276
0277     XPRINTK("nicstar: nicstar_init() called.\n");
0278
0279     error = pci_register_driver(&nicstar_driver);
0280
0281     TXPRINTK("nicstar: TX debug enabled.\n");
0282     RXPRINTK("nicstar: RX debug enabled.\n");
0283     PRINTK("nicstar: General debug enabled.\n");
0284 #ifdef PHY_LOOPBACK
0285     printk("nicstar: using PHY loopback.\n");
0286 #endif /* PHY_LOOPBACK */
0287     XPRINTK("nicstar: nicstar_init() returned.\n");
0288
0289     if (!error) {
0290         timer_setup(&ns_timer, ns_poll, 0);
0291         ns_timer.expires = jiffies + NS_POLL_PERIOD;
0292         add_timer(&ns_timer);
0293     }
0294
0295     return error;
0296 }
0297
0298 static void __exit nicstar_cleanup(void)
0299 {
0300     XPRINTK("nicstar: nicstar_cleanup() called.\n");
0301
0302     del_timer_sync(&ns_timer);
0303
0304     pci_unregister_driver(&nicstar_driver);
0305
0306     XPRINTK("nicstar: nicstar_cleanup() returned.\n");
0307 }
0308
0309 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
0310 {
0311     unsigned long flags;
0312     u32 data;
0313     sram_address <<= 2;
0314     sram_address &= 0x0007FFFC; /* address must be dword aligned */
0315     sram_address |= 0x50000000; /* SRAM read command */
0316     spin_lock_irqsave(&card->res_lock, flags);
0317     while (CMD_BUSY(card)) ;
0318     writel(sram_address, card->membase + CMD);
0319     while (CMD_BUSY(card)) ;
0320     data = readl(card->membase + DR0);
0321     spin_unlock_irqrestore(&card->res_lock, flags);
0322     return data;
0323 }
0324
0325 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
0326               int count)
0327 {
0328     unsigned long flags;
0329     int i, c;
0330     count--;        /* count range now is 0..3 instead of 1..4 */
0331     c = count;
0332     c <<= 2;        /* to use increments of 4 */
0333     spin_lock_irqsave(&card->res_lock, flags);
0334     while (CMD_BUSY(card)) ;
0335     for (i = 0; i <= c; i += 4)
0336         writel(*(value++), card->membase + i);
0337     /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
0338        so card->membase + DR0 == card->membase */
0339     sram_address <<= 2;
0340     sram_address &= 0x0007FFFC;
0341     sram_address |= (0x40000000 | count);
0342     writel(sram_address, card->membase + CMD);
0343     spin_unlock_irqrestore(&card->res_lock, flags);
0344 }
0345
0346 static int ns_init_card(int i, struct pci_dev *pcidev)
0347 {
0348     int j;
0349     struct ns_dev *card = NULL;
0350     unsigned char pci_latency;
0351     unsigned error;
0352     u32 data;
0353     u32 u32d[4];
0354     u32 ns_cfg_rctsize;
0355     int bcount;
0356     unsigned long membase;
0357
0358     error = 0;
0359
0360     if (pci_enable_device(pcidev)) {
0361         printk("nicstar%d: can't enable PCI device\n", i);
0362         error = 2;
0363         ns_init_card_error(card, error);
0364         return error;
0365     }
0366         if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
0367                 printk(KERN_WARNING
0368                "nicstar%d: No suitable DMA available.\n", i);
0369         error = 2;
0370         ns_init_card_error(card, error);
0371         return error;
0372         }
0373
0374     card = kmalloc(sizeof(*card), GFP_KERNEL);
0375     if (!card) {
0376         printk
0377             ("nicstar%d: can't allocate memory for device structure.\n",
0378              i);
0379         error = 2;
0380         ns_init_card_error(card, error);
0381         return error;
0382     }
0383     cards[i] = card;
0384     spin_lock_init(&card->int_lock);
0385     spin_lock_init(&card->res_lock);
0386
0387     pci_set_drvdata(pcidev, card);
0388
0389     card->index = i;
0390     card->atmdev = NULL;
0391     card->pcidev = pcidev;
0392     membase = pci_resource_start(pcidev, 1);
0393     card->membase = ioremap(membase, NS_IOREMAP_SIZE);
0394     if (!card->membase) {
0395         printk("nicstar%d: can't ioremap() membase.\n", i);
0396         error = 3;
0397         ns_init_card_error(card, error);
0398         return error;
0399     }
0400     PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
0401
0402     pci_set_master(pcidev);
0403
0404     if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
0405         printk("nicstar%d: can't read PCI latency timer.\n", i);
0406         error = 6;
0407         ns_init_card_error(card, error);
0408         return error;
0409     }
0410 #ifdef NS_PCI_LATENCY
0411     if (pci_latency < NS_PCI_LATENCY) {
0412         PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
0413                NS_PCI_LATENCY);
0414         for (j = 1; j < 4; j++) {
0415             if (pci_write_config_byte
0416                 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
0417                 break;
0418         }
0419         if (j == 4) {
0420             printk
0421                 ("nicstar%d: can't set PCI latency timer to %d.\n",
0422                  i, NS_PCI_LATENCY);
0423             error = 7;
0424             ns_init_card_error(card, error);
0425             return error;
0426         }
0427     }
0428 #endif /* NS_PCI_LATENCY */
0429
0430     /* Clear timer overflow */
0431     data = readl(card->membase + STAT);
0432     if (data & NS_STAT_TMROF)
0433         writel(NS_STAT_TMROF, card->membase + STAT);
0434
0435     /* Software reset */
0436     writel(NS_CFG_SWRST, card->membase + CFG);
0437     NS_DELAY;
0438     writel(0x00000000, card->membase + CFG);
0439
0440     /* PHY reset */
0441     writel(0x00000008, card->membase + GP);
0442     NS_DELAY;
0443     writel(0x00000001, card->membase + GP);
0444     NS_DELAY;
0445     while (CMD_BUSY(card)) ;
0446     writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
0447     NS_DELAY;
0448
0449     /* Detect PHY type */
0450     while (CMD_BUSY(card)) ;
0451     writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
0452     while (CMD_BUSY(card)) ;
0453     data = readl(card->membase + DR0);
0454     switch (data) {
0455     case 0x00000009:
0456         printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
0457         card->max_pcr = ATM_25_PCR;
0458         while (CMD_BUSY(card)) ;
0459         writel(0x00000008, card->membase + DR0);
0460         writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
0461         /* Clear an eventual pending interrupt */
0462         writel(NS_STAT_SFBQF, card->membase + STAT);
0463 #ifdef PHY_LOOPBACK
0464         while (CMD_BUSY(card)) ;
0465         writel(0x00000022, card->membase + DR0);
0466         writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
0467 #endif /* PHY_LOOPBACK */
0468         break;
0469     case 0x00000030:
0470     case 0x00000031:
0471         printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
0472         card->max_pcr = ATM_OC3_PCR;
0473 #ifdef PHY_LOOPBACK
0474         while (CMD_BUSY(card)) ;
0475         writel(0x00000002, card->membase + DR0);
0476         writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
0477 #endif /* PHY_LOOPBACK */
0478         break;
0479     default:
0480         printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
0481         error = 8;
0482         ns_init_card_error(card, error);
0483         return error;
0484     }
0485     writel(0x00000000, card->membase + GP);
0486
0487     /* Determine SRAM size */
0488     data = 0x76543210;
0489     ns_write_sram(card, 0x1C003, &data, 1);
0490     data = 0x89ABCDEF;
0491     ns_write_sram(card, 0x14003, &data, 1);
0492     if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
0493         ns_read_sram(card, 0x1C003) == 0x76543210)
0494         card->sram_size = 128;
0495     else
0496         card->sram_size = 32;
0497     PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
0498
0499     card->rct_size = NS_MAX_RCTSIZE;
0500
0501 #if (NS_MAX_RCTSIZE == 4096)
0502     if (card->sram_size == 128)
0503         printk
0504             ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
0505              i);
0506 #elif (NS_MAX_RCTSIZE == 16384)
0507     if (card->sram_size == 32) {
0508         printk
0509             ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
0510              i);
0511         card->rct_size = 4096;
0512     }
0513 #else
0514 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
0515 #endif
0516
0517     card->vpibits = NS_VPIBITS;
0518     if (card->rct_size == 4096)
0519         card->vcibits = 12 - NS_VPIBITS;
0520     else            /* card->rct_size == 16384 */
0521         card->vcibits = 14 - NS_VPIBITS;
0522
0523     /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
0524     if (mac[i] == NULL)
0525         nicstar_init_eprom(card->membase);
0526
0527     /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
0528     writel(0x00000000, card->membase + VPM);
0529
0530     card->intcnt = 0;
0531     if (request_irq
0532         (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
0533         pr_err("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
0534         error = 9;
0535         ns_init_card_error(card, error);
0536         return error;
0537     }
0538
0539     /* Initialize TSQ */
0540     card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
0541                        NS_TSQSIZE + NS_TSQ_ALIGNMENT,
0542                        &card->tsq.dma, GFP_KERNEL);
0543     if (card->tsq.org == NULL) {
0544         printk("nicstar%d: can't allocate TSQ.\n", i);
0545         error = 10;
0546         ns_init_card_error(card, error);
0547         return error;
0548     }
0549     card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
0550     card->tsq.next = card->tsq.base;
0551     card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
0552     for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
0553         ns_tsi_init(card->tsq.base + j);
0554     writel(0x00000000, card->membase + TSQH);
0555     writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
0556     PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
0557
0558     /* Initialize RSQ */
0559     card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
0560                        NS_RSQSIZE + NS_RSQ_ALIGNMENT,
0561                        &card->rsq.dma, GFP_KERNEL);
0562     if (card->rsq.org == NULL) {
0563         printk("nicstar%d: can't allocate RSQ.\n", i);
0564         error = 11;
0565         ns_init_card_error(card, error);
0566         return error;
0567     }
0568     card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
0569     card->rsq.next = card->rsq.base;
0570     card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
0571     for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
0572         ns_rsqe_init(card->rsq.base + j);
0573     writel(0x00000000, card->membase + RSQH);
0574     writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
0575     PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
0576
0577     /* Initialize SCQ0, the only VBR SCQ used */
0578     card->scq1 = NULL;
0579     card->scq2 = NULL;
0580     card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
0581     if (card->scq0 == NULL) {
0582         printk("nicstar%d: can't get SCQ0.\n", i);
0583         error = 12;
0584         ns_init_card_error(card, error);
0585         return error;
0586     }
0587     u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
0588     u32d[1] = (u32) 0x00000000;
0589     u32d[2] = (u32) 0xffffffff;
0590     u32d[3] = (u32) 0x00000000;
0591     ns_write_sram(card, NS_VRSCD0, u32d, 4);
0592     ns_write_sram(card, NS_VRSCD1, u32d, 4);    /* These last two won't be used */
0593     ns_write_sram(card, NS_VRSCD2, u32d, 4);    /* but are initialized, just in case... */
0594     card->scq0->scd = NS_VRSCD0;
0595     PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
0596
0597     /* Initialize TSTs */
0598     card->tst_addr = NS_TST0;
0599     card->tst_free_entries = NS_TST_NUM_ENTRIES;
0600     data = NS_TST_OPCODE_VARIABLE;
0601     for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
0602         ns_write_sram(card, NS_TST0 + j, &data, 1);
0603     data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
0604     ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
0605     for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
0606         ns_write_sram(card, NS_TST1 + j, &data, 1);
0607     data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
0608     ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
0609     for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
0610         card->tste2vc[j] = NULL;
0611     writel(NS_TST0 << 2, card->membase + TSTB);
0612
0613     /* Initialize RCT. AAL type is set on opening the VC. */
0614 #ifdef RCQ_SUPPORT
0615     u32d[0] = NS_RCTE_RAWCELLINTEN;
0616 #else
0617     u32d[0] = 0x00000000;
0618 #endif /* RCQ_SUPPORT */
0619     u32d[1] = 0x00000000;
0620     u32d[2] = 0x00000000;
0621     u32d[3] = 0xFFFFFFFF;
0622     for (j = 0; j < card->rct_size; j++)
0623         ns_write_sram(card, j * 4, u32d, 4);
0624
0625     memset(card->vcmap, 0, sizeof(card->vcmap));
0626
0627     for (j = 0; j < NS_FRSCD_NUM; j++)
0628         card->scd2vc[j] = NULL;
0629
0630     /* Initialize buffer levels */
0631     card->sbnr.min = MIN_SB;
0632     card->sbnr.init = NUM_SB;
0633     card->sbnr.max = MAX_SB;
0634     card->lbnr.min = MIN_LB;
0635     card->lbnr.init = NUM_LB;
0636     card->lbnr.max = MAX_LB;
0637     card->iovnr.min = MIN_IOVB;
0638     card->iovnr.init = NUM_IOVB;
0639     card->iovnr.max = MAX_IOVB;
0640     card->hbnr.min = MIN_HB;
0641     card->hbnr.init = NUM_HB;
0642     card->hbnr.max = MAX_HB;
0643
0644     card->sm_handle = NULL;
0645     card->sm_addr = 0x00000000;
0646     card->lg_handle = NULL;
0647     card->lg_addr = 0x00000000;
0648
0649     card->efbie = 1;    /* To prevent push_rxbufs from enabling the interrupt */
0650
0651     idr_init(&card->idr);
0652
0653     /* Pre-allocate some huge buffers */
0654     skb_queue_head_init(&card->hbpool.queue);
0655     card->hbpool.count = 0;
0656     for (j = 0; j < NUM_HB; j++) {
0657         struct sk_buff *hb;
0658         hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
0659         if (hb == NULL) {
0660             printk
0661                 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
0662                  i, j, NUM_HB);
0663             error = 13;
0664             ns_init_card_error(card, error);
0665             return error;
0666         }
0667         NS_PRV_BUFTYPE(hb) = BUF_NONE;
0668         skb_queue_tail(&card->hbpool.queue, hb);
0669         card->hbpool.count++;
0670     }
0671
0672     /* Allocate large buffers */
0673     skb_queue_head_init(&card->lbpool.queue);
0674     card->lbpool.count = 0; /* Not used */
0675     for (j = 0; j < NUM_LB; j++) {
0676         struct sk_buff *lb;
0677         lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
0678         if (lb == NULL) {
0679             printk
0680                 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
0681                  i, j, NUM_LB);
0682             error = 14;
0683             ns_init_card_error(card, error);
0684             return error;
0685         }
0686         NS_PRV_BUFTYPE(lb) = BUF_LG;
0687         skb_queue_tail(&card->lbpool.queue, lb);
0688         skb_reserve(lb, NS_SMBUFSIZE);
0689         push_rxbufs(card, lb);
0690         /* Due to the implementation of push_rxbufs() this is 1, not 0 */
0691         if (j == 1) {
0692             card->rcbuf = lb;
0693             card->rawcell = (struct ns_rcqe *) lb->data;
0694             card->rawch = NS_PRV_DMA(lb);
0695         }
0696     }
0697     /* Test for strange behaviour which leads to crashes */
0698     if ((bcount =
0699          ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
0700         printk
0701             ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
0702              i, j, bcount);
0703         error = 14;
0704         ns_init_card_error(card, error);
0705         return error;
0706     }
0707
0708     /* Allocate small buffers */
0709     skb_queue_head_init(&card->sbpool.queue);
0710     card->sbpool.count = 0; /* Not used */
0711     for (j = 0; j < NUM_SB; j++) {
0712         struct sk_buff *sb;
0713         sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
0714         if (sb == NULL) {
0715             printk
0716                 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
0717                  i, j, NUM_SB);
0718             error = 15;
0719             ns_init_card_error(card, error);
0720             return error;
0721         }
0722         NS_PRV_BUFTYPE(sb) = BUF_SM;
0723         skb_queue_tail(&card->sbpool.queue, sb);
0724         skb_reserve(sb, NS_AAL0_HEADER);
0725         push_rxbufs(card, sb);
0726     }
0727     /* Test for strange behaviour which leads to crashes */
0728     if ((bcount =
0729          ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
0730         printk
0731             ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
0732              i, j, bcount);
0733         error = 15;
0734         ns_init_card_error(card, error);
0735         return error;
0736     }
0737
0738     /* Allocate iovec buffers */
0739     skb_queue_head_init(&card->iovpool.queue);
0740     card->iovpool.count = 0;
0741     for (j = 0; j < NUM_IOVB; j++) {
0742         struct sk_buff *iovb;
0743         iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
0744         if (iovb == NULL) {
0745             printk
0746                 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
0747                  i, j, NUM_IOVB);
0748             error = 16;
0749             ns_init_card_error(card, error);
0750             return error;
0751         }
0752         NS_PRV_BUFTYPE(iovb) = BUF_NONE;
0753         skb_queue_tail(&card->iovpool.queue, iovb);
0754         card->iovpool.count++;
0755     }
0756
0757     /* Configure NICStAR */
0758     if (card->rct_size == 4096)
0759         ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
0760     else            /* (card->rct_size == 16384) */
0761         ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
0762
0763     card->efbie = 1;
0764
0765     /* Register device */
0766     card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
0767                     -1, NULL);
0768     if (card->atmdev == NULL) {
0769         printk("nicstar%d: can't register device.\n", i);
0770         error = 17;
0771         ns_init_card_error(card, error);
0772         return error;
0773     }
0774
0775     if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
0776         nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
0777                    card->atmdev->esi, 6);
0778         if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
0779             nicstar_read_eprom(card->membase,
0780                        NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
0781                        card->atmdev->esi, 6);
0782         }
0783     }
0784
0785     printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
0786
0787     card->atmdev->dev_data = card;
0788     card->atmdev->ci_range.vpi_bits = card->vpibits;
0789     card->atmdev->ci_range.vci_bits = card->vcibits;
0790     card->atmdev->link_rate = card->max_pcr;
0791     card->atmdev->phy = NULL;
0792
0793 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
0794     if (card->max_pcr == ATM_OC3_PCR)
0795         suni_init(card->atmdev);
0796 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
0797
0798 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
0799     if (card->max_pcr == ATM_25_PCR)
0800         idt77105_init(card->atmdev);
0801 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
0802
0803     if (card->atmdev->phy && card->atmdev->phy->start)
0804         card->atmdev->phy->start(card->atmdev);
0805
0806     writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE |    /* Only enabled if RCQ_SUPPORT */
0807            NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
0808            NS_CFG_PHYIE, card->membase + CFG);
0809
0810     num_cards++;
0811
0812     return error;
0813 }
0814
0815 static void ns_init_card_error(ns_dev *card, int error)
0816 {
0817     if (error >= 17) {
0818         writel(0x00000000, card->membase + CFG);
0819     }
0820     if (error >= 16) {
0821         struct sk_buff *iovb;
0822         while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
0823             dev_kfree_skb_any(iovb);
0824     }
0825     if (error >= 15) {
0826         struct sk_buff *sb;
0827         while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
0828             dev_kfree_skb_any(sb);
0829         free_scq(card, card->scq0, NULL);
0830     }
0831     if (error >= 14) {
0832         struct sk_buff *lb;
0833         while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
0834             dev_kfree_skb_any(lb);
0835     }
0836     if (error >= 13) {
0837         struct sk_buff *hb;
0838         while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
0839             dev_kfree_skb_any(hb);
0840     }
0841     if (error >= 12) {
0842         dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
0843                 card->rsq.org, card->rsq.dma);
0844     }
0845     if (error >= 11) {
0846         dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
0847                 card->tsq.org, card->tsq.dma);
0848     }
0849     if (error >= 10) {
0850         free_irq(card->pcidev->irq, card);
0851     }
0852     if (error >= 4) {
0853         iounmap(card->membase);
0854     }
0855     if (error >= 3) {
0856         pci_disable_device(card->pcidev);
0857         kfree(card);
0858     }
0859 }
0860
0861 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
0862 {
0863     scq_info *scq;
0864
0865     if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
0866         return NULL;
0867
0868     scq = kmalloc(sizeof(*scq), GFP_KERNEL);
0869     if (!scq)
0870         return NULL;
0871         scq->org = dma_alloc_coherent(&card->pcidev->dev,
0872                       2 * size,  &scq->dma, GFP_KERNEL);
0873     if (!scq->org) {
0874         kfree(scq);
0875         return NULL;
0876     }
0877     scq->skb = kcalloc(size / NS_SCQE_SIZE, sizeof(*scq->skb),
0878                GFP_KERNEL);
0879     if (!scq->skb) {
0880         dma_free_coherent(&card->pcidev->dev,
0881                   2 * size, scq->org, scq->dma);
0882         kfree(scq);
0883         return NULL;
0884     }
0885     scq->num_entries = size / NS_SCQE_SIZE;
0886     scq->base = PTR_ALIGN(scq->org, size);
0887     scq->next = scq->base;
0888     scq->last = scq->base + (scq->num_entries - 1);
0889     scq->tail = scq->last;
0890     scq->scd = scd;
0891     scq->tbd_count = 0;
0892     init_waitqueue_head(&scq->scqfull_waitq);
0893     scq->full = 0;
0894     spin_lock_init(&scq->lock);
0895
0896     return scq;
0897 }
0898
0899 /* For variable rate SCQ vcc must be NULL */
0900 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
0901 {
0902     int i;
0903
0904     if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
0905         for (i = 0; i < scq->num_entries; i++) {
0906             if (scq->skb[i] != NULL) {
0907                 vcc = ATM_SKB(scq->skb[i])->vcc;
0908                 if (vcc->pop != NULL)
0909                     vcc->pop(vcc, scq->skb[i]);
0910                 else
0911                     dev_kfree_skb_any(scq->skb[i]);
0912             }
0913     } else {        /* vcc must be != NULL */
0914
0915         if (vcc == NULL) {
0916             printk
0917                 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
0918             for (i = 0; i < scq->num_entries; i++)
0919                 dev_kfree_skb_any(scq->skb[i]);
0920         } else
0921             for (i = 0; i < scq->num_entries; i++) {
0922                 if (scq->skb[i] != NULL) {
0923                     if (vcc->pop != NULL)
0924                         vcc->pop(vcc, scq->skb[i]);
0925                     else
0926                         dev_kfree_skb_any(scq->skb[i]);
0927                 }
0928             }
0929     }
0930     kfree(scq->skb);
0931     dma_free_coherent(&card->pcidev->dev,
0932               2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
0933                    VBR_SCQSIZE : CBR_SCQSIZE),
0934               scq->org, scq->dma);
0935     kfree(scq);
0936 }
0937
0938 /* The handles passed must be pointers to the sk_buff containing the small
0939    or large buffer(s) cast to u32. */
0940 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
0941 {
0942     struct sk_buff *handle1, *handle2;
0943     int id1, id2;
0944     u32 addr1, addr2;
0945     u32 stat;
0946     unsigned long flags;
0947
0948     /* *BARF* */
0949     handle2 = NULL;
0950     addr2 = 0;
0951     handle1 = skb;
0952     addr1 = dma_map_single(&card->pcidev->dev,
0953                    skb->data,
0954                    (NS_PRV_BUFTYPE(skb) == BUF_SM
0955                 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
0956                    DMA_TO_DEVICE);
0957     NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
0958
0959 #ifdef GENERAL_DEBUG
0960     if (!addr1)
0961         printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
0962                card->index);
0963 #endif /* GENERAL_DEBUG */
0964
0965     stat = readl(card->membase + STAT);
0966     card->sbfqc = ns_stat_sfbqc_get(stat);
0967     card->lbfqc = ns_stat_lfbqc_get(stat);
0968     if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
0969         if (!addr2) {
0970             if (card->sm_addr) {
0971                 addr2 = card->sm_addr;
0972                 handle2 = card->sm_handle;
0973                 card->sm_addr = 0x00000000;
0974                 card->sm_handle = NULL;
0975             } else {    /* (!sm_addr) */
0976
0977                 card->sm_addr = addr1;
0978                 card->sm_handle = handle1;
0979             }
0980         }
0981     } else {        /* buf_type == BUF_LG */
0982
0983         if (!addr2) {
0984             if (card->lg_addr) {
0985                 addr2 = card->lg_addr;
0986                 handle2 = card->lg_handle;
0987                 card->lg_addr = 0x00000000;
0988                 card->lg_handle = NULL;
0989             } else {    /* (!lg_addr) */
0990
0991                 card->lg_addr = addr1;
0992                 card->lg_handle = handle1;
0993             }
0994         }
0995     }
0996
0997     if (addr2) {
0998         if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
0999             if (card->sbfqc >= card->sbnr.max) {
1000                 skb_unlink(handle1, &card->sbpool.queue);
1001                 dev_kfree_skb_any(handle1);
1002                 skb_unlink(handle2, &card->sbpool.queue);
1003                 dev_kfree_skb_any(handle2);
1004                 return;
1005             } else
1006                 card->sbfqc += 2;
1007         } else {    /* (buf_type == BUF_LG) */
1008
1009             if (card->lbfqc >= card->lbnr.max) {
1010                 skb_unlink(handle1, &card->lbpool.queue);
1011                 dev_kfree_skb_any(handle1);
1012                 skb_unlink(handle2, &card->lbpool.queue);
1013                 dev_kfree_skb_any(handle2);
1014                 return;
1015             } else
1016                 card->lbfqc += 2;
1017         }
1018
1019         id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1020         if (id1 < 0)
1021             goto out;
1022
1023         id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1024         if (id2 < 0)
1025             goto out;
1026
1027         spin_lock_irqsave(&card->res_lock, flags);
1028         while (CMD_BUSY(card)) ;
1029         writel(addr2, card->membase + DR3);
1030         writel(id2, card->membase + DR2);
1031         writel(addr1, card->membase + DR1);
1032         writel(id1, card->membase + DR0);
1033         writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1034                card->membase + CMD);
1035         spin_unlock_irqrestore(&card->res_lock, flags);
1036
1037         XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1038             card->index,
1039             (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1040             addr1, addr2);
1041     }
1042
1043     if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1044         card->lbfqc >= card->lbnr.min) {
1045         card->efbie = 1;
1046         writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1047                card->membase + CFG);
1048     }
1049
1050 out:
1051     return;
1052 }
1053
1054 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1055 {
1056     u32 stat_r;
1057     ns_dev *card;
1058     struct atm_dev *dev;
1059     unsigned long flags;
1060
1061     card = (ns_dev *) dev_id;
1062     dev = card->atmdev;
1063     card->intcnt++;
1064
1065     PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1066
1067     spin_lock_irqsave(&card->int_lock, flags);
1068
1069     stat_r = readl(card->membase + STAT);
1070
1071     /* Transmit Status Indicator has been written to T. S. Queue */
1072     if (stat_r & NS_STAT_TSIF) {
1073         TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1074         process_tsq(card);
1075         writel(NS_STAT_TSIF, card->membase + STAT);
1076     }
1077
1078     /* Incomplete CS-PDU has been transmitted */
1079     if (stat_r & NS_STAT_TXICP) {
1080         writel(NS_STAT_TXICP, card->membase + STAT);
1081         TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1082              card->index);
1083     }
1084
1085     /* Transmit Status Queue 7/8 full */
1086     if (stat_r & NS_STAT_TSQF) {
1087         writel(NS_STAT_TSQF, card->membase + STAT);
1088         PRINTK("nicstar%d: TSQ full.\n", card->index);
1089         process_tsq(card);
1090     }
1091
1092     /* Timer overflow */
1093     if (stat_r & NS_STAT_TMROF) {
1094         writel(NS_STAT_TMROF, card->membase + STAT);
1095         PRINTK("nicstar%d: Timer overflow.\n", card->index);
1096     }
1097
1098     /* PHY device interrupt signal active */
1099     if (stat_r & NS_STAT_PHYI) {
1100         writel(NS_STAT_PHYI, card->membase + STAT);
1101         PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1102         if (dev->phy && dev->phy->interrupt) {
1103             dev->phy->interrupt(dev);
1104         }
1105     }
1106
1107     /* Small Buffer Queue is full */
1108     if (stat_r & NS_STAT_SFBQF) {
1109         writel(NS_STAT_SFBQF, card->membase + STAT);
1110         printk("nicstar%d: Small free buffer queue is full.\n",
1111                card->index);
1112     }
1113
1114     /* Large Buffer Queue is full */
1115     if (stat_r & NS_STAT_LFBQF) {
1116         writel(NS_STAT_LFBQF, card->membase + STAT);
1117         printk("nicstar%d: Large free buffer queue is full.\n",
1118                card->index);
1119     }
1120
1121     /* Receive Status Queue is full */
1122     if (stat_r & NS_STAT_RSQF) {
1123         writel(NS_STAT_RSQF, card->membase + STAT);
1124         printk("nicstar%d: RSQ full.\n", card->index);
1125         process_rsq(card);
1126     }
1127
1128     /* Complete CS-PDU received */
1129     if (stat_r & NS_STAT_EOPDU) {
1130         RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1131         process_rsq(card);
1132         writel(NS_STAT_EOPDU, card->membase + STAT);
1133     }
1134
1135     /* Raw cell received */
1136     if (stat_r & NS_STAT_RAWCF) {
1137         writel(NS_STAT_RAWCF, card->membase + STAT);
1138 #ifndef RCQ_SUPPORT
1139         printk("nicstar%d: Raw cell received and no support yet...\n",
1140                card->index);
1141 #endif /* RCQ_SUPPORT */
1142         /* NOTE: the following procedure may keep a raw cell pending until the
1143            next interrupt. As this preliminary support is only meant to
1144            avoid buffer leakage, this is not an issue. */
1145         while (readl(card->membase + RAWCT) != card->rawch) {
1146
1147             if (ns_rcqe_islast(card->rawcell)) {
1148                 struct sk_buff *oldbuf;
1149
1150                 oldbuf = card->rcbuf;
1151                 card->rcbuf = idr_find(&card->idr,
1152                                ns_rcqe_nextbufhandle(card->rawcell));
1153                 card->rawch = NS_PRV_DMA(card->rcbuf);
1154                 card->rawcell = (struct ns_rcqe *)
1155                         card->rcbuf->data;
1156                 recycle_rx_buf(card, oldbuf);
1157             } else {
1158                 card->rawch += NS_RCQE_SIZE;
1159                 card->rawcell++;
1160             }
1161         }
1162     }
1163
1164     /* Small buffer queue is empty */
1165     if (stat_r & NS_STAT_SFBQE) {
1166         int i;
1167         struct sk_buff *sb;
1168
1169         writel(NS_STAT_SFBQE, card->membase + STAT);
1170         printk("nicstar%d: Small free buffer queue empty.\n",
1171                card->index);
1172         for (i = 0; i < card->sbnr.min; i++) {
1173             sb = dev_alloc_skb(NS_SMSKBSIZE);
1174             if (sb == NULL) {
1175                 writel(readl(card->membase + CFG) &
1176                        ~NS_CFG_EFBIE, card->membase + CFG);
1177                 card->efbie = 0;
1178                 break;
1179             }
1180             NS_PRV_BUFTYPE(sb) = BUF_SM;
1181             skb_queue_tail(&card->sbpool.queue, sb);
1182             skb_reserve(sb, NS_AAL0_HEADER);
1183             push_rxbufs(card, sb);
1184         }
1185         card->sbfqc = i;
1186         process_rsq(card);
1187     }
1188
1189     /* Large buffer queue empty */
1190     if (stat_r & NS_STAT_LFBQE) {
1191         int i;
1192         struct sk_buff *lb;
1193
1194         writel(NS_STAT_LFBQE, card->membase + STAT);
1195         printk("nicstar%d: Large free buffer queue empty.\n",
1196                card->index);
1197         for (i = 0; i < card->lbnr.min; i++) {
1198             lb = dev_alloc_skb(NS_LGSKBSIZE);
1199             if (lb == NULL) {
1200                 writel(readl(card->membase + CFG) &
1201                        ~NS_CFG_EFBIE, card->membase + CFG);
1202                 card->efbie = 0;
1203                 break;
1204             }
1205             NS_PRV_BUFTYPE(lb) = BUF_LG;
1206             skb_queue_tail(&card->lbpool.queue, lb);
1207             skb_reserve(lb, NS_SMBUFSIZE);
1208             push_rxbufs(card, lb);
1209         }
1210         card->lbfqc = i;
1211         process_rsq(card);
1212     }
1213
1214     /* Receive Status Queue is 7/8 full */
1215     if (stat_r & NS_STAT_RSQAF) {
1216         writel(NS_STAT_RSQAF, card->membase + STAT);
1217         RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1218         process_rsq(card);
1219     }
1220
1221     spin_unlock_irqrestore(&card->int_lock, flags);
1222     PRINTK("nicstar%d: end of interrupt service\n", card->index);
1223     return IRQ_HANDLED;
1224 }
1225
1226 static int ns_open(struct atm_vcc *vcc)
1227 {
1228     ns_dev *card;
1229     vc_map *vc;
1230     unsigned long tmpl, modl;
1231     int tcr, tcra;      /* target cell rate, and absolute value */
1232     int n = 0;      /* Number of entries in the TST. Initialized to remove
1233                    the compiler warning. */
1234     u32 u32d[4];
1235     int frscdi = 0;     /* Index of the SCD. Initialized to remove the compiler
1236                    warning. How I wish compilers were clever enough to
1237                    tell which variables can truly be used
1238                    uninitialized... */
1239     int inuse;      /* tx or rx vc already in use by another vcc */
1240     short vpi = vcc->vpi;
1241     int vci = vcc->vci;
1242
1243     card = (ns_dev *) vcc->dev->dev_data;
1244     PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1245            vci);
1246     if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1247         PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1248         return -EINVAL;
1249     }
1250
1251     vc = &(card->vcmap[vpi << card->vcibits | vci]);
1252     vcc->dev_data = vc;
1253
1254     inuse = 0;
1255     if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1256         inuse = 1;
1257     if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1258         inuse += 2;
1259     if (inuse) {
1260         printk("nicstar%d: %s vci already in use.\n", card->index,
1261                inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1262         return -EINVAL;
1263     }
1264
1265     set_bit(ATM_VF_ADDR, &vcc->flags);
1266
1267     /* NOTE: You are not allowed to modify an open connection's QOS. To change
1268        that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1269        needed to do that. */
1270     if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1271         scq_info *scq;
1272
1273         set_bit(ATM_VF_PARTIAL, &vcc->flags);
1274         if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1275             /* Check requested cell rate and availability of SCD */
1276             if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1277                 && vcc->qos.txtp.min_pcr == 0) {
1278                 PRINTK
1279                     ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1280                      card->index);
1281                 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1282                 clear_bit(ATM_VF_ADDR, &vcc->flags);
1283                 return -EINVAL;
1284             }
1285
1286             tcr = atm_pcr_goal(&(vcc->qos.txtp));
1287             tcra = tcr >= 0 ? tcr : -tcr;
1288
1289             PRINTK("nicstar%d: target cell rate = %d.\n",
1290                    card->index, vcc->qos.txtp.max_pcr);
1291
1292             tmpl =
1293                 (unsigned long)tcra *(unsigned long)
1294                 NS_TST_NUM_ENTRIES;
1295             modl = tmpl % card->max_pcr;
1296
1297             n = (int)(tmpl / card->max_pcr);
1298             if (tcr > 0) {
1299                 if (modl > 0)
1300                     n++;
1301             } else if (tcr == 0) {
1302                 if ((n =
1303                      (card->tst_free_entries -
1304                       NS_TST_RESERVED)) <= 0) {
1305                     PRINTK
1306                         ("nicstar%d: no CBR bandwidth free.\n",
1307                          card->index);
1308                     clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1309                     clear_bit(ATM_VF_ADDR, &vcc->flags);
1310                     return -EINVAL;
1311                 }
1312             }
1313
1314             if (n == 0) {
1315                 printk
1316                     ("nicstar%d: selected bandwidth < granularity.\n",
1317                      card->index);
1318                 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1319                 clear_bit(ATM_VF_ADDR, &vcc->flags);
1320                 return -EINVAL;
1321             }
1322
1323             if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1324                 PRINTK
1325                     ("nicstar%d: not enough free CBR bandwidth.\n",
1326                      card->index);
1327                 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1328                 clear_bit(ATM_VF_ADDR, &vcc->flags);
1329                 return -EINVAL;
1330             } else
1331                 card->tst_free_entries -= n;
1332
1333             XPRINTK("nicstar%d: writing %d tst entries.\n",
1334                 card->index, n);
1335             for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1336                 if (card->scd2vc[frscdi] == NULL) {
1337                     card->scd2vc[frscdi] = vc;
1338                     break;
1339                 }
1340             }
1341             if (frscdi == NS_FRSCD_NUM) {
1342                 PRINTK
1343                     ("nicstar%d: no SCD available for CBR channel.\n",
1344                      card->index);
1345                 card->tst_free_entries += n;
1346                 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1347                 clear_bit(ATM_VF_ADDR, &vcc->flags);
1348                 return -EBUSY;
1349             }
1350
1351             vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1352
1353             scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1354             if (scq == NULL) {
1355                 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1356                        card->index);
1357                 card->scd2vc[frscdi] = NULL;
1358                 card->tst_free_entries += n;
1359                 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1360                 clear_bit(ATM_VF_ADDR, &vcc->flags);
1361                 return -ENOMEM;
1362             }
1363             vc->scq = scq;
1364             u32d[0] = scq_virt_to_bus(scq, scq->base);
1365             u32d[1] = (u32) 0x00000000;
1366             u32d[2] = (u32) 0xffffffff;
1367             u32d[3] = (u32) 0x00000000;
1368             ns_write_sram(card, vc->cbr_scd, u32d, 4);
1369
1370             fill_tst(card, n, vc);
1371         } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1372             vc->cbr_scd = 0x00000000;
1373             vc->scq = card->scq0;
1374         }
1375
1376         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1377             vc->tx = 1;
1378             vc->tx_vcc = vcc;
1379             vc->tbd_count = 0;
1380         }
1381         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1382             u32 status;
1383
1384             vc->rx = 1;
1385             vc->rx_vcc = vcc;
1386             vc->rx_iov = NULL;
1387
1388             /* Open the connection in hardware */
1389             if (vcc->qos.aal == ATM_AAL5)
1390                 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1391             else    /* vcc->qos.aal == ATM_AAL0 */
1392                 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1393 #ifdef RCQ_SUPPORT
1394             status |= NS_RCTE_RAWCELLINTEN;
1395 #endif /* RCQ_SUPPORT */
1396             ns_write_sram(card,
1397                       NS_RCT +
1398                       (vpi << card->vcibits | vci) *
1399                       NS_RCT_ENTRY_SIZE, &status, 1);
1400         }
1401
1402     }
1403
1404     set_bit(ATM_VF_READY, &vcc->flags);
1405     return 0;
1406 }
1407
1408 static void ns_close(struct atm_vcc *vcc)
1409 {
1410     vc_map *vc;
1411     ns_dev *card;
1412     u32 data;
1413     int i;
1414
1415     vc = vcc->dev_data;
1416     card = vcc->dev->dev_data;
1417     PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1418            (int)vcc->vpi, vcc->vci);
1419
1420     clear_bit(ATM_VF_READY, &vcc->flags);
1421
1422     if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1423         u32 addr;
1424         unsigned long flags;
1425
1426         addr =
1427             NS_RCT +
1428             (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1429         spin_lock_irqsave(&card->res_lock, flags);
1430         while (CMD_BUSY(card)) ;
1431         writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1432                card->membase + CMD);
1433         spin_unlock_irqrestore(&card->res_lock, flags);
1434
1435         vc->rx = 0;
1436         if (vc->rx_iov != NULL) {
1437             struct sk_buff *iovb;
1438             u32 stat;
1439
1440             stat = readl(card->membase + STAT);
1441             card->sbfqc = ns_stat_sfbqc_get(stat);
1442             card->lbfqc = ns_stat_lfbqc_get(stat);
1443
1444             PRINTK
1445                 ("nicstar%d: closing a VC with pending rx buffers.\n",
1446                  card->index);
1447             iovb = vc->rx_iov;
1448             recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1449                           NS_PRV_IOVCNT(iovb));
1450             NS_PRV_IOVCNT(iovb) = 0;
1451             spin_lock_irqsave(&card->int_lock, flags);
1452             recycle_iov_buf(card, iovb);
1453             spin_unlock_irqrestore(&card->int_lock, flags);
1454             vc->rx_iov = NULL;
1455         }
1456     }
1457
1458     if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1459         vc->tx = 0;
1460     }
1461
1462     if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1463         unsigned long flags;
1464         ns_scqe *scqep;
1465         scq_info *scq;
1466
1467         scq = vc->scq;
1468
1469         for (;;) {
1470             spin_lock_irqsave(&scq->lock, flags);
1471             scqep = scq->next;
1472             if (scqep == scq->base)
1473                 scqep = scq->last;
1474             else
1475                 scqep--;
1476             if (scqep == scq->tail) {
1477                 spin_unlock_irqrestore(&scq->lock, flags);
1478                 break;
1479             }
1480             /* If the last entry is not a TSR, place one in the SCQ in order to
1481                be able to completely drain it and then close. */
1482             if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1483                 ns_scqe tsr;
1484                 u32 scdi, scqi;
1485                 u32 data;
1486                 int index;
1487
1488                 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1489                 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1490                 scqi = scq->next - scq->base;
1491                 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1492                 tsr.word_3 = 0x00000000;
1493                 tsr.word_4 = 0x00000000;
1494                 *scq->next = tsr;
1495                 index = (int)scqi;
1496                 scq->skb[index] = NULL;
1497                 if (scq->next == scq->last)
1498                     scq->next = scq->base;
1499                 else
1500                     scq->next++;
1501                 data = scq_virt_to_bus(scq, scq->next);
1502                 ns_write_sram(card, scq->scd, &data, 1);
1503             }
1504             spin_unlock_irqrestore(&scq->lock, flags);
1505             schedule();
1506         }
1507
1508         /* Free all TST entries */
1509         data = NS_TST_OPCODE_VARIABLE;
1510         for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1511             if (card->tste2vc[i] == vc) {
1512                 ns_write_sram(card, card->tst_addr + i, &data,
1513                           1);
1514                 card->tste2vc[i] = NULL;
1515                 card->tst_free_entries++;
1516             }
1517         }
1518
1519         card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1520         free_scq(card, vc->scq, vcc);
1521     }
1522
1523     /* remove all references to vcc before deleting it */
1524     if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1525         unsigned long flags;
1526         scq_info *scq = card->scq0;
1527
1528         spin_lock_irqsave(&scq->lock, flags);
1529
1530         for (i = 0; i < scq->num_entries; i++) {
1531             if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1532                 ATM_SKB(scq->skb[i])->vcc = NULL;
1533                 atm_return(vcc, scq->skb[i]->truesize);
1534                 PRINTK
1535                     ("nicstar: deleted pending vcc mapping\n");
1536             }
1537         }
1538
1539         spin_unlock_irqrestore(&scq->lock, flags);
1540     }
1541
1542     vcc->dev_data = NULL;
1543     clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1544     clear_bit(ATM_VF_ADDR, &vcc->flags);
1545
1546 #ifdef RX_DEBUG
1547     {
1548         u32 stat, cfg;
1549         stat = readl(card->membase + STAT);
1550         cfg = readl(card->membase + CFG);
1551         printk("STAT = 0x%08X  CFG = 0x%08X  \n", stat, cfg);
1552         printk
1553             ("TSQ: base = 0x%p  next = 0x%p  last = 0x%p  TSQT = 0x%08X \n",
1554              card->tsq.base, card->tsq.next,
1555              card->tsq.last, readl(card->membase + TSQT));
1556         printk
1557             ("RSQ: base = 0x%p  next = 0x%p  last = 0x%p  RSQT = 0x%08X \n",
1558              card->rsq.base, card->rsq.next,
1559              card->rsq.last, readl(card->membase + RSQT));
1560         printk("Empty free buffer queue interrupt %s \n",
1561                card->efbie ? "enabled" : "disabled");
1562         printk("SBCNT = %d  count = %d   LBCNT = %d count = %d \n",
1563                ns_stat_sfbqc_get(stat), card->sbpool.count,
1564                ns_stat_lfbqc_get(stat), card->lbpool.count);
1565         printk("hbpool.count = %d  iovpool.count = %d \n",
1566                card->hbpool.count, card->iovpool.count);
1567     }
1568 #endif /* RX_DEBUG */
1569 }
1570
1571 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1572 {
1573     u32 new_tst;
1574     unsigned long cl;
1575     int e, r;
1576     u32 data;
1577
1578     /* It would be very complicated to keep the two TSTs synchronized while
1579        assuring that writes are only made to the inactive TST. So, for now I
1580        will use only one TST. If problems occur, I will change this again */
1581
1582     new_tst = card->tst_addr;
1583
1584     /* Fill procedure */
1585
1586     for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1587         if (card->tste2vc[e] == NULL)
1588             break;
1589     }
1590     if (e == NS_TST_NUM_ENTRIES) {
1591         printk("nicstar%d: No free TST entries found. \n", card->index);
1592         return;
1593     }
1594
1595     r = n;
1596     cl = NS_TST_NUM_ENTRIES;
1597     data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1598
1599     while (r > 0) {
1600         if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1601             card->tste2vc[e] = vc;
1602             ns_write_sram(card, new_tst + e, &data, 1);
1603             cl -= NS_TST_NUM_ENTRIES;
1604             r--;
1605         }
1606
1607         if (++e == NS_TST_NUM_ENTRIES) {
1608             e = 0;
1609         }
1610         cl += n;
1611     }
1612
1613     /* End of fill procedure */
1614
1615     data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1616     ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1617     ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1618     card->tst_addr = new_tst;
1619 }
1620
1621 static int _ns_send(struct atm_vcc *vcc, struct sk_buff *skb, bool may_sleep)
1622 {
1623     ns_dev *card;
1624     vc_map *vc;
1625     scq_info *scq;
1626     unsigned long buflen;
1627     ns_scqe scqe;
1628     u32 flags;      /* TBD flags, not CPU flags */
1629
1630     card = vcc->dev->dev_data;
1631     TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1632     if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1633         printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1634                card->index);
1635         atomic_inc(&vcc->stats->tx_err);
1636         dev_kfree_skb_any(skb);
1637         return -EINVAL;
1638     }
1639
1640     if (!vc->tx) {
1641         printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1642                card->index);
1643         atomic_inc(&vcc->stats->tx_err);
1644         dev_kfree_skb_any(skb);
1645         return -EINVAL;
1646     }
1647
1648     if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1649         printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1650                card->index);
1651         atomic_inc(&vcc->stats->tx_err);
1652         dev_kfree_skb_any(skb);
1653         return -EINVAL;
1654     }
1655
1656     if (skb_shinfo(skb)->nr_frags != 0) {
1657         printk("nicstar%d: No scatter-gather yet.\n", card->index);
1658         atomic_inc(&vcc->stats->tx_err);
1659         dev_kfree_skb_any(skb);
1660         return -EINVAL;
1661     }
1662
1663     ATM_SKB(skb)->vcc = vcc;
1664
1665     NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1666                      skb->len, DMA_TO_DEVICE);
1667
1668     if (vcc->qos.aal == ATM_AAL5) {
1669         buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1670         flags = NS_TBD_AAL5;
1671         scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1672         scqe.word_3 = cpu_to_le32(skb->len);
1673         scqe.word_4 =
1674             ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1675                     ATM_SKB(skb)->
1676                     atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1677         flags |= NS_TBD_EOPDU;
1678     } else {        /* (vcc->qos.aal == ATM_AAL0) */
1679
1680         buflen = ATM_CELL_PAYLOAD;  /* i.e., 48 bytes */
1681         flags = NS_TBD_AAL0;
1682         scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1683         scqe.word_3 = cpu_to_le32(0x00000000);
1684         if (*skb->data & 0x02)  /* Payload type 1 - end of pdu */
1685             flags |= NS_TBD_EOPDU;
1686         scqe.word_4 =
1687             cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1688         /* Force the VPI/VCI to be the same as in VCC struct */
1689         scqe.word_4 |=
1690             cpu_to_le32((((u32) vcc->
1691                   vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1692                                   vci) <<
1693                  NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1694     }
1695
1696     if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1697         scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1698         scq = ((vc_map *) vcc->dev_data)->scq;
1699     } else {
1700         scqe.word_1 =
1701             ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1702         scq = card->scq0;
1703     }
1704
1705     if (push_scqe(card, vc, scq, &scqe, skb, may_sleep) != 0) {
1706         atomic_inc(&vcc->stats->tx_err);
1707         dma_unmap_single(&card->pcidev->dev, NS_PRV_DMA(skb), skb->len,
1708                  DMA_TO_DEVICE);
1709         dev_kfree_skb_any(skb);
1710         return -EIO;
1711     }
1712     atomic_inc(&vcc->stats->tx);
1713
1714     return 0;
1715 }
1716
1717 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1718 {
1719     return _ns_send(vcc, skb, true);
1720 }
1721
1722 static int ns_send_bh(struct atm_vcc *vcc, struct sk_buff *skb)
1723 {
1724     return _ns_send(vcc, skb, false);
1725 }
1726
1727 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1728              struct sk_buff *skb, bool may_sleep)
1729 {
1730     unsigned long flags;
1731     ns_scqe tsr;
1732     u32 scdi, scqi;
1733     int scq_is_vbr;
1734     u32 data;
1735     int index;
1736
1737     spin_lock_irqsave(&scq->lock, flags);
1738     while (scq->tail == scq->next) {
1739         if (!may_sleep) {
1740             spin_unlock_irqrestore(&scq->lock, flags);
1741             printk("nicstar%d: Error pushing TBD.\n", card->index);
1742             return 1;
1743         }
1744
1745         scq->full = 1;
1746         wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1747                               scq->tail != scq->next,
1748                               scq->lock,
1749                               SCQFULL_TIMEOUT);
1750
1751         if (scq->full) {
1752             spin_unlock_irqrestore(&scq->lock, flags);
1753             printk("nicstar%d: Timeout pushing TBD.\n",
1754                    card->index);
1755             return 1;
1756         }
1757     }
1758     *scq->next = *tbd;
1759     index = (int)(scq->next - scq->base);
1760     scq->skb[index] = skb;
1761     XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1762         card->index, skb, index);
1763     XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1764         card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1765         le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1766         scq->next);
1767     if (scq->next == scq->last)
1768         scq->next = scq->base;
1769     else
1770         scq->next++;
1771
1772     vc->tbd_count++;
1773     if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1774         scq->tbd_count++;
1775         scq_is_vbr = 1;
1776     } else
1777         scq_is_vbr = 0;
1778
1779     if (vc->tbd_count >= MAX_TBD_PER_VC
1780         || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1781         int has_run = 0;
1782
1783         while (scq->tail == scq->next) {
1784             if (!may_sleep) {
1785                 data = scq_virt_to_bus(scq, scq->next);
1786                 ns_write_sram(card, scq->scd, &data, 1);
1787                 spin_unlock_irqrestore(&scq->lock, flags);
1788                 printk("nicstar%d: Error pushing TSR.\n",
1789                        card->index);
1790                 return 0;
1791             }
1792
1793             scq->full = 1;
1794             if (has_run++)
1795                 break;
1796             wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1797                                   scq->tail != scq->next,
1798                                   scq->lock,
1799                                   SCQFULL_TIMEOUT);
1800         }
1801
1802         if (!scq->full) {
1803             tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1804             if (scq_is_vbr)
1805                 scdi = NS_TSR_SCDISVBR;
1806             else
1807                 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1808             scqi = scq->next - scq->base;
1809             tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1810             tsr.word_3 = 0x00000000;
1811             tsr.word_4 = 0x00000000;
1812
1813             *scq->next = tsr;
1814             index = (int)scqi;
1815             scq->skb[index] = NULL;
1816             XPRINTK
1817                 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1818                  card->index, le32_to_cpu(tsr.word_1),
1819                  le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1820                  le32_to_cpu(tsr.word_4), scq->next);
1821             if (scq->next == scq->last)
1822                 scq->next = scq->base;
1823             else
1824                 scq->next++;
1825             vc->tbd_count = 0;
1826             scq->tbd_count = 0;
1827         } else
1828             PRINTK("nicstar%d: Timeout pushing TSR.\n",
1829                    card->index);
1830     }
1831     data = scq_virt_to_bus(scq, scq->next);
1832     ns_write_sram(card, scq->scd, &data, 1);
1833
1834     spin_unlock_irqrestore(&scq->lock, flags);
1835
1836     return 0;
1837 }
1838
1839 static void process_tsq(ns_dev * card)
1840 {
1841     u32 scdi;
1842     scq_info *scq;
1843     ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1844     int serviced_entries;   /* flag indicating at least on entry was serviced */
1845
1846     serviced_entries = 0;
1847
1848     if (card->tsq.next == card->tsq.last)
1849         one_ahead = card->tsq.base;
1850     else
1851         one_ahead = card->tsq.next + 1;
1852
1853     if (one_ahead == card->tsq.last)
1854         two_ahead = card->tsq.base;
1855     else
1856         two_ahead = one_ahead + 1;
1857
1858     while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1859            !ns_tsi_isempty(two_ahead))
1860         /* At most two empty, as stated in the 77201 errata */
1861     {
1862         serviced_entries = 1;
1863
1864         /* Skip the one or two possible empty entries */
1865         while (ns_tsi_isempty(card->tsq.next)) {
1866             if (card->tsq.next == card->tsq.last)
1867                 card->tsq.next = card->tsq.base;
1868             else
1869                 card->tsq.next++;
1870         }
1871
1872         if (!ns_tsi_tmrof(card->tsq.next)) {
1873             scdi = ns_tsi_getscdindex(card->tsq.next);
1874             if (scdi == NS_TSI_SCDISVBR)
1875                 scq = card->scq0;
1876             else {
1877                 if (card->scd2vc[scdi] == NULL) {
1878                     printk
1879                         ("nicstar%d: could not find VC from SCD index.\n",
1880                          card->index);
1881                     ns_tsi_init(card->tsq.next);
1882                     return;
1883                 }
1884                 scq = card->scd2vc[scdi]->scq;
1885             }
1886             drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1887             scq->full = 0;
1888             wake_up_interruptible(&(scq->scqfull_waitq));
1889         }
1890
1891         ns_tsi_init(card->tsq.next);
1892         previous = card->tsq.next;
1893         if (card->tsq.next == card->tsq.last)
1894             card->tsq.next = card->tsq.base;
1895         else
1896             card->tsq.next++;
1897
1898         if (card->tsq.next == card->tsq.last)
1899             one_ahead = card->tsq.base;
1900         else
1901             one_ahead = card->tsq.next + 1;
1902
1903         if (one_ahead == card->tsq.last)
1904             two_ahead = card->tsq.base;
1905         else
1906             two_ahead = one_ahead + 1;
1907     }
1908
1909     if (serviced_entries)
1910         writel(PTR_DIFF(previous, card->tsq.base),
1911                card->membase + TSQH);
1912 }
1913
1914 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1915 {
1916     struct atm_vcc *vcc;
1917     struct sk_buff *skb;
1918     int i;
1919     unsigned long flags;
1920
1921     XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1922         card->index, scq, pos);
1923     if (pos >= scq->num_entries) {
1924         printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1925         return;
1926     }
1927
1928     spin_lock_irqsave(&scq->lock, flags);
1929     i = (int)(scq->tail - scq->base);
1930     if (++i == scq->num_entries)
1931         i = 0;
1932     while (i != pos) {
1933         skb = scq->skb[i];
1934         XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1935             card->index, skb, i);
1936         if (skb != NULL) {
1937             dma_unmap_single(&card->pcidev->dev,
1938                      NS_PRV_DMA(skb),
1939                      skb->len,
1940                      DMA_TO_DEVICE);
1941             vcc = ATM_SKB(skb)->vcc;
1942             if (vcc && vcc->pop != NULL) {
1943                 vcc->pop(vcc, skb);
1944             } else {
1945                 dev_kfree_skb_irq(skb);
1946             }
1947             scq->skb[i] = NULL;
1948         }
1949         if (++i == scq->num_entries)
1950             i = 0;
1951     }
1952     scq->tail = scq->base + pos;
1953     spin_unlock_irqrestore(&scq->lock, flags);
1954 }
1955
1956 static void process_rsq(ns_dev * card)
1957 {
1958     ns_rsqe *previous;
1959
1960     if (!ns_rsqe_valid(card->rsq.next))
1961         return;
1962     do {
1963         dequeue_rx(card, card->rsq.next);
1964         ns_rsqe_init(card->rsq.next);
1965         previous = card->rsq.next;
1966         if (card->rsq.next == card->rsq.last)
1967             card->rsq.next = card->rsq.base;
1968         else
1969             card->rsq.next++;
1970     } while (ns_rsqe_valid(card->rsq.next));
1971     writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1972 }
1973
1974 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1975 {
1976     u32 vpi, vci;
1977     vc_map *vc;
1978     struct sk_buff *iovb;
1979     struct iovec *iov;
1980     struct atm_vcc *vcc;
1981     struct sk_buff *skb;
1982     unsigned short aal5_len;
1983     int len;
1984     u32 stat;
1985     u32 id;
1986
1987     stat = readl(card->membase + STAT);
1988     card->sbfqc = ns_stat_sfbqc_get(stat);
1989     card->lbfqc = ns_stat_lfbqc_get(stat);
1990
1991     id = le32_to_cpu(rsqe->buffer_handle);
1992     skb = idr_remove(&card->idr, id);
1993     if (!skb) {
1994         RXPRINTK(KERN_ERR
1995              "nicstar%d: skb not found!\n", card->index);
1996         return;
1997     }
1998     dma_sync_single_for_cpu(&card->pcidev->dev,
1999                 NS_PRV_DMA(skb),
2000                 (NS_PRV_BUFTYPE(skb) == BUF_SM
2001                  ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2002                 DMA_FROM_DEVICE);
2003     dma_unmap_single(&card->pcidev->dev,
2004              NS_PRV_DMA(skb),
2005              (NS_PRV_BUFTYPE(skb) == BUF_SM
2006               ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2007              DMA_FROM_DEVICE);
2008     vpi = ns_rsqe_vpi(rsqe);
2009     vci = ns_rsqe_vci(rsqe);
2010     if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2011         printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2012                card->index, vpi, vci);
2013         recycle_rx_buf(card, skb);
2014         return;
2015     }
2016
2017     vc = &(card->vcmap[vpi << card->vcibits | vci]);
2018     if (!vc->rx) {
2019         RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2020              card->index, vpi, vci);
2021         recycle_rx_buf(card, skb);
2022         return;
2023     }
2024
2025     vcc = vc->rx_vcc;
2026
2027     if (vcc->qos.aal == ATM_AAL0) {
2028         struct sk_buff *sb;
2029         unsigned char *cell;
2030         int i;
2031
2032         cell = skb->data;
2033         for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2034             sb = dev_alloc_skb(NS_SMSKBSIZE);
2035             if (!sb) {
2036                 printk
2037                     ("nicstar%d: Can't allocate buffers for aal0.\n",
2038                      card->index);
2039                 atomic_add(i, &vcc->stats->rx_drop);
2040                 break;
2041             }
2042             if (!atm_charge(vcc, sb->truesize)) {
2043                 RXPRINTK
2044                     ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2045                      card->index);
2046                 atomic_add(i - 1, &vcc->stats->rx_drop);    /* already increased by 1 */
2047                 dev_kfree_skb_any(sb);
2048                 break;
2049             }
2050             /* Rebuild the header */
2051             *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2052                 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2053             if (i == 1 && ns_rsqe_eopdu(rsqe))
2054                 *((u32 *) sb->data) |= 0x00000002;
2055             skb_put(sb, NS_AAL0_HEADER);
2056             memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2057             skb_put(sb, ATM_CELL_PAYLOAD);
2058             ATM_SKB(sb)->vcc = vcc;
2059             __net_timestamp(sb);
2060             vcc->push(vcc, sb);
2061             atomic_inc(&vcc->stats->rx);
2062             cell += ATM_CELL_PAYLOAD;
2063         }
2064
2065         recycle_rx_buf(card, skb);
2066         return;
2067     }
2068
2069     /* To reach this point, the AAL layer can only be AAL5 */
2070
2071     if ((iovb = vc->rx_iov) == NULL) {
2072         iovb = skb_dequeue(&(card->iovpool.queue));
2073         if (iovb == NULL) { /* No buffers in the queue */
2074             iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2075             if (iovb == NULL) {
2076                 printk("nicstar%d: Out of iovec buffers.\n",
2077                        card->index);
2078                 atomic_inc(&vcc->stats->rx_drop);
2079                 recycle_rx_buf(card, skb);
2080                 return;
2081             }
2082             NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2083         } else if (--card->iovpool.count < card->iovnr.min) {
2084             struct sk_buff *new_iovb;
2085             if ((new_iovb =
2086                  alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2087                 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2088                 skb_queue_tail(&card->iovpool.queue, new_iovb);
2089                 card->iovpool.count++;
2090             }
2091         }
2092         vc->rx_iov = iovb;
2093         NS_PRV_IOVCNT(iovb) = 0;
2094         iovb->len = 0;
2095         iovb->data = iovb->head;
2096         skb_reset_tail_pointer(iovb);
2097         /* IMPORTANT: a pointer to the sk_buff containing the small or large
2098            buffer is stored as iovec base, NOT a pointer to the
2099            small or large buffer itself. */
2100     } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2101         printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2102         atomic_inc(&vcc->stats->rx_err);
2103         recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2104                       NS_MAX_IOVECS);
2105         NS_PRV_IOVCNT(iovb) = 0;
2106         iovb->len = 0;
2107         iovb->data = iovb->head;
2108         skb_reset_tail_pointer(iovb);
2109     }
2110     iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2111     iov->iov_base = (void *)skb;
2112     iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2113     iovb->len += iov->iov_len;
2114
2115 #ifdef EXTRA_DEBUG
2116     if (NS_PRV_IOVCNT(iovb) == 1) {
2117         if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2118             printk
2119                 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2120                  card->index);
2121             which_list(card, skb);
2122             atomic_inc(&vcc->stats->rx_err);
2123             recycle_rx_buf(card, skb);
2124             vc->rx_iov = NULL;
2125             recycle_iov_buf(card, iovb);
2126             return;
2127         }
2128     } else {        /* NS_PRV_IOVCNT(iovb) >= 2 */
2129
2130         if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2131             printk
2132                 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2133                  card->index);
2134             which_list(card, skb);
2135             atomic_inc(&vcc->stats->rx_err);
2136             recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2137                           NS_PRV_IOVCNT(iovb));
2138             vc->rx_iov = NULL;
2139             recycle_iov_buf(card, iovb);
2140             return;
2141         }
2142     }
2143 #endif /* EXTRA_DEBUG */
2144
2145     if (ns_rsqe_eopdu(rsqe)) {
2146         /* This works correctly regardless of the endianness of the host */
2147         unsigned char *L1L2 = (unsigned char *)
2148                         (skb->data + iov->iov_len - 6);
2149         aal5_len = L1L2[0] << 8 | L1L2[1];
2150         len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2151         if (ns_rsqe_crcerr(rsqe) ||
2152             len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2153             printk("nicstar%d: AAL5 CRC error", card->index);
2154             if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2155                 printk(" - PDU size mismatch.\n");
2156             else
2157                 printk(".\n");
2158             atomic_inc(&vcc->stats->rx_err);
2159             recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2160                           NS_PRV_IOVCNT(iovb));
2161             vc->rx_iov = NULL;
2162             recycle_iov_buf(card, iovb);
2163             return;
2164         }
2165
2166         /* By this point we (hopefully) have a complete SDU without errors. */
2167
2168         if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2169             /* skb points to a small buffer */
2170             if (!atm_charge(vcc, skb->truesize)) {
2171                 push_rxbufs(card, skb);
2172                 atomic_inc(&vcc->stats->rx_drop);
2173             } else {
2174                 skb_put(skb, len);
2175                 dequeue_sm_buf(card, skb);
2176                 ATM_SKB(skb)->vcc = vcc;
2177                 __net_timestamp(skb);
2178                 vcc->push(vcc, skb);
2179                 atomic_inc(&vcc->stats->rx);
2180             }
2181         } else if (NS_PRV_IOVCNT(iovb) == 2) {  /* One small plus one large buffer */
2182             struct sk_buff *sb;
2183
2184             sb = (struct sk_buff *)(iov - 1)->iov_base;
2185             /* skb points to a large buffer */
2186
2187             if (len <= NS_SMBUFSIZE) {
2188                 if (!atm_charge(vcc, sb->truesize)) {
2189                     push_rxbufs(card, sb);
2190                     atomic_inc(&vcc->stats->rx_drop);
2191                 } else {
2192                     skb_put(sb, len);
2193                     dequeue_sm_buf(card, sb);
2194                     ATM_SKB(sb)->vcc = vcc;
2195                     __net_timestamp(sb);
2196                     vcc->push(vcc, sb);
2197                     atomic_inc(&vcc->stats->rx);
2198                 }
2199
2200                 push_rxbufs(card, skb);
2201
2202             } else {    /* len > NS_SMBUFSIZE, the usual case */
2203
2204                 if (!atm_charge(vcc, skb->truesize)) {
2205                     push_rxbufs(card, skb);
2206                     atomic_inc(&vcc->stats->rx_drop);
2207                 } else {
2208                     dequeue_lg_buf(card, skb);
2209                     skb_push(skb, NS_SMBUFSIZE);
2210                     skb_copy_from_linear_data(sb, skb->data,
2211                                   NS_SMBUFSIZE);
2212                     skb_put(skb, len - NS_SMBUFSIZE);
2213                     ATM_SKB(skb)->vcc = vcc;
2214                     __net_timestamp(skb);
2215                     vcc->push(vcc, skb);
2216                     atomic_inc(&vcc->stats->rx);
2217                 }
2218
2219                 push_rxbufs(card, sb);
2220
2221             }
2222
2223         } else {    /* Must push a huge buffer */
2224
2225             struct sk_buff *hb, *sb, *lb;
2226             int remaining, tocopy;
2227             int j;
2228
2229             hb = skb_dequeue(&(card->hbpool.queue));
2230             if (hb == NULL) {   /* No buffers in the queue */
2231
2232                 hb = dev_alloc_skb(NS_HBUFSIZE);
2233                 if (hb == NULL) {
2234                     printk
2235                         ("nicstar%d: Out of huge buffers.\n",
2236                          card->index);
2237                     atomic_inc(&vcc->stats->rx_drop);
2238                     recycle_iovec_rx_bufs(card,
2239                                   (struct iovec *)
2240                                   iovb->data,
2241                                   NS_PRV_IOVCNT(iovb));
2242                     vc->rx_iov = NULL;
2243                     recycle_iov_buf(card, iovb);
2244                     return;
2245                 } else if (card->hbpool.count < card->hbnr.min) {
2246                     struct sk_buff *new_hb;
2247                     if ((new_hb =
2248                          dev_alloc_skb(NS_HBUFSIZE)) !=
2249                         NULL) {
2250                         skb_queue_tail(&card->hbpool.
2251                                    queue, new_hb);
2252                         card->hbpool.count++;
2253                     }
2254                 }
2255                 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2256             } else if (--card->hbpool.count < card->hbnr.min) {
2257                 struct sk_buff *new_hb;
2258                 if ((new_hb =
2259                      dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2260                     NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2261                     skb_queue_tail(&card->hbpool.queue,
2262                                new_hb);
2263                     card->hbpool.count++;
2264                 }
2265                 if (card->hbpool.count < card->hbnr.min) {
2266                     if ((new_hb =
2267                          dev_alloc_skb(NS_HBUFSIZE)) !=
2268                         NULL) {
2269                         NS_PRV_BUFTYPE(new_hb) =
2270                             BUF_NONE;
2271                         skb_queue_tail(&card->hbpool.
2272                                    queue, new_hb);
2273                         card->hbpool.count++;
2274                     }
2275                 }
2276             }
2277
2278             iov = (struct iovec *)iovb->data;
2279
2280             if (!atm_charge(vcc, hb->truesize)) {
2281                 recycle_iovec_rx_bufs(card, iov,
2282                               NS_PRV_IOVCNT(iovb));
2283                 if (card->hbpool.count < card->hbnr.max) {
2284                     skb_queue_tail(&card->hbpool.queue, hb);
2285                     card->hbpool.count++;
2286                 } else
2287                     dev_kfree_skb_any(hb);
2288                 atomic_inc(&vcc->stats->rx_drop);
2289             } else {
2290                 /* Copy the small buffer to the huge buffer */
2291                 sb = (struct sk_buff *)iov->iov_base;
2292                 skb_copy_from_linear_data(sb, hb->data,
2293                               iov->iov_len);
2294                 skb_put(hb, iov->iov_len);
2295                 remaining = len - iov->iov_len;
2296                 iov++;
2297                 /* Free the small buffer */
2298                 push_rxbufs(card, sb);
2299
2300                 /* Copy all large buffers to the huge buffer and free them */
2301                 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2302                     lb = (struct sk_buff *)iov->iov_base;
2303                     tocopy =
2304                         min_t(int, remaining, iov->iov_len);
2305                     skb_copy_from_linear_data(lb,
2306                                   skb_tail_pointer
2307                                   (hb), tocopy);
2308                     skb_put(hb, tocopy);
2309                     iov++;
2310                     remaining -= tocopy;
2311                     push_rxbufs(card, lb);
2312                 }
2313 #ifdef EXTRA_DEBUG
2314                 if (remaining != 0 || hb->len != len)
2315                     printk
2316                         ("nicstar%d: Huge buffer len mismatch.\n",
2317                          card->index);
2318 #endif /* EXTRA_DEBUG */
2319                 ATM_SKB(hb)->vcc = vcc;
2320                 __net_timestamp(hb);
2321                 vcc->push(vcc, hb);
2322                 atomic_inc(&vcc->stats->rx);
2323             }
2324         }
2325
2326         vc->rx_iov = NULL;
2327         recycle_iov_buf(card, iovb);
2328     }
2329
2330 }
2331
2332 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2333 {
2334     if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2335         printk("nicstar%d: What kind of rx buffer is this?\n",
2336                card->index);
2337         dev_kfree_skb_any(skb);
2338     } else
2339         push_rxbufs(card, skb);
2340 }
2341
2342 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2343 {
2344     while (count-- > 0)
2345         recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2346 }
2347
2348 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2349 {
2350     if (card->iovpool.count < card->iovnr.max) {
2351         skb_queue_tail(&card->iovpool.queue, iovb);
2352         card->iovpool.count++;
2353     } else
2354         dev_kfree_skb_any(iovb);
2355 }
2356
2357 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2358 {
2359     skb_unlink(sb, &card->sbpool.queue);
2360     if (card->sbfqc < card->sbnr.init) {
2361         struct sk_buff *new_sb;
2362         if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2363             NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2364             skb_queue_tail(&card->sbpool.queue, new_sb);
2365             skb_reserve(new_sb, NS_AAL0_HEADER);
2366             push_rxbufs(card, new_sb);
2367         }
2368     }
2369     if (card->sbfqc < card->sbnr.init)
2370     {
2371         struct sk_buff *new_sb;
2372         if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2373             NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2374             skb_queue_tail(&card->sbpool.queue, new_sb);
2375             skb_reserve(new_sb, NS_AAL0_HEADER);
2376             push_rxbufs(card, new_sb);
2377         }
2378     }
2379 }
2380
2381 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2382 {
2383     skb_unlink(lb, &card->lbpool.queue);
2384     if (card->lbfqc < card->lbnr.init) {
2385         struct sk_buff *new_lb;
2386         if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2387             NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2388             skb_queue_tail(&card->lbpool.queue, new_lb);
2389             skb_reserve(new_lb, NS_SMBUFSIZE);
2390             push_rxbufs(card, new_lb);
2391         }
2392     }
2393     if (card->lbfqc < card->lbnr.init)
2394     {
2395         struct sk_buff *new_lb;
2396         if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2397             NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2398             skb_queue_tail(&card->lbpool.queue, new_lb);
2399             skb_reserve(new_lb, NS_SMBUFSIZE);
2400             push_rxbufs(card, new_lb);
2401         }
2402     }
2403 }
2404
2405 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2406 {
2407     u32 stat;
2408     ns_dev *card;
2409     int left;
2410
2411     left = (int)*pos;
2412     card = (ns_dev *) dev->dev_data;
2413     stat = readl(card->membase + STAT);
2414     if (!left--)
2415         return sprintf(page, "Pool   count    min   init    max \n");
2416     if (!left--)
2417         return sprintf(page, "Small  %5d  %5d  %5d  %5d \n",
2418                    ns_stat_sfbqc_get(stat), card->sbnr.min,
2419                    card->sbnr.init, card->sbnr.max);
2420     if (!left--)
2421         return sprintf(page, "Large  %5d  %5d  %5d  %5d \n",
2422                    ns_stat_lfbqc_get(stat), card->lbnr.min,
2423                    card->lbnr.init, card->lbnr.max);
2424     if (!left--)
2425         return sprintf(page, "Huge   %5d  %5d  %5d  %5d \n",
2426                    card->hbpool.count, card->hbnr.min,
2427                    card->hbnr.init, card->hbnr.max);
2428     if (!left--)
2429         return sprintf(page, "Iovec  %5d  %5d  %5d  %5d \n",
2430                    card->iovpool.count, card->iovnr.min,
2431                    card->iovnr.init, card->iovnr.max);
2432     if (!left--) {
2433         int retval;
2434         retval =
2435             sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2436         card->intcnt = 0;
2437         return retval;
2438     }
2439 #if 0
2440     /* Dump 25.6 Mbps PHY registers */
2441     /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2442        here just in case it's needed for debugging. */
2443     if (card->max_pcr == ATM_25_PCR && !left--) {
2444         u32 phy_regs[4];
2445         u32 i;
2446
2447         for (i = 0; i < 4; i++) {
2448             while (CMD_BUSY(card)) ;
2449             writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2450                    card->membase + CMD);
2451             while (CMD_BUSY(card)) ;
2452             phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2453         }
2454
2455         return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2456                    phy_regs[0], phy_regs[1], phy_regs[2],
2457                    phy_regs[3]);
2458     }
2459 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2460 #if 0
2461     /* Dump TST */
2462     if (left-- < NS_TST_NUM_ENTRIES) {
2463         if (card->tste2vc[left + 1] == NULL)
2464             return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2465         else
2466             return sprintf(page, "%5d - %d %d \n", left + 1,
2467                        card->tste2vc[left + 1]->tx_vcc->vpi,
2468                        card->tste2vc[left + 1]->tx_vcc->vci);
2469     }
2470 #endif /* 0 */
2471     return 0;
2472 }
2473
2474 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2475 {
2476     ns_dev *card;
2477     pool_levels pl;
2478     long btype;
2479     unsigned long flags;
2480
2481     card = dev->dev_data;
2482     switch (cmd) {
2483     case NS_GETPSTAT:
2484         if (get_user
2485             (pl.buftype, &((pool_levels __user *) arg)->buftype))
2486             return -EFAULT;
2487         switch (pl.buftype) {
2488         case NS_BUFTYPE_SMALL:
2489             pl.count =
2490                 ns_stat_sfbqc_get(readl(card->membase + STAT));
2491             pl.level.min = card->sbnr.min;
2492             pl.level.init = card->sbnr.init;
2493             pl.level.max = card->sbnr.max;
2494             break;
2495
2496         case NS_BUFTYPE_LARGE:
2497             pl.count =
2498                 ns_stat_lfbqc_get(readl(card->membase + STAT));
2499             pl.level.min = card->lbnr.min;
2500             pl.level.init = card->lbnr.init;
2501             pl.level.max = card->lbnr.max;
2502             break;
2503
2504         case NS_BUFTYPE_HUGE:
2505             pl.count = card->hbpool.count;
2506             pl.level.min = card->hbnr.min;
2507             pl.level.init = card->hbnr.init;
2508             pl.level.max = card->hbnr.max;
2509             break;
2510
2511         case NS_BUFTYPE_IOVEC:
2512             pl.count = card->iovpool.count;
2513             pl.level.min = card->iovnr.min;
2514             pl.level.init = card->iovnr.init;
2515             pl.level.max = card->iovnr.max;
2516             break;
2517
2518         default:
2519             return -ENOIOCTLCMD;
2520
2521         }
2522         if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2523             return (sizeof(pl));
2524         else
2525             return -EFAULT;
2526
2527     case NS_SETBUFLEV:
2528         if (!capable(CAP_NET_ADMIN))
2529             return -EPERM;
2530         if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2531             return -EFAULT;
2532         if (pl.level.min >= pl.level.init
2533             || pl.level.init >= pl.level.max)
2534             return -EINVAL;
2535         if (pl.level.min == 0)
2536             return -EINVAL;
2537         switch (pl.buftype) {
2538         case NS_BUFTYPE_SMALL:
2539             if (pl.level.max > TOP_SB)
2540                 return -EINVAL;
2541             card->sbnr.min = pl.level.min;
2542             card->sbnr.init = pl.level.init;
2543             card->sbnr.max = pl.level.max;
2544             break;
2545
2546         case NS_BUFTYPE_LARGE:
2547             if (pl.level.max > TOP_LB)
2548                 return -EINVAL;
2549             card->lbnr.min = pl.level.min;
2550             card->lbnr.init = pl.level.init;
2551             card->lbnr.max = pl.level.max;
2552             break;
2553
2554         case NS_BUFTYPE_HUGE:
2555             if (pl.level.max > TOP_HB)
2556                 return -EINVAL;
2557             card->hbnr.min = pl.level.min;
2558             card->hbnr.init = pl.level.init;
2559             card->hbnr.max = pl.level.max;
2560             break;
2561
2562         case NS_BUFTYPE_IOVEC:
2563             if (pl.level.max > TOP_IOVB)
2564                 return -EINVAL;
2565             card->iovnr.min = pl.level.min;
2566             card->iovnr.init = pl.level.init;
2567             card->iovnr.max = pl.level.max;
2568             break;
2569
2570         default:
2571             return -EINVAL;
2572
2573         }
2574         return 0;
2575
2576     case NS_ADJBUFLEV:
2577         if (!capable(CAP_NET_ADMIN))
2578             return -EPERM;
2579         btype = (long)arg;  /* a long is the same size as a pointer or bigger */
2580         switch (btype) {
2581         case NS_BUFTYPE_SMALL:
2582             while (card->sbfqc < card->sbnr.init) {
2583                 struct sk_buff *sb;
2584
2585                 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2586                 if (sb == NULL)
2587                     return -ENOMEM;
2588                 NS_PRV_BUFTYPE(sb) = BUF_SM;
2589                 skb_queue_tail(&card->sbpool.queue, sb);
2590                 skb_reserve(sb, NS_AAL0_HEADER);
2591                 push_rxbufs(card, sb);
2592             }
2593             break;
2594
2595         case NS_BUFTYPE_LARGE:
2596             while (card->lbfqc < card->lbnr.init) {
2597                 struct sk_buff *lb;
2598
2599                 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2600                 if (lb == NULL)
2601                     return -ENOMEM;
2602                 NS_PRV_BUFTYPE(lb) = BUF_LG;
2603                 skb_queue_tail(&card->lbpool.queue, lb);
2604                 skb_reserve(lb, NS_SMBUFSIZE);
2605                 push_rxbufs(card, lb);
2606             }
2607             break;
2608
2609         case NS_BUFTYPE_HUGE:
2610             while (card->hbpool.count > card->hbnr.init) {
2611                 struct sk_buff *hb;
2612
2613                 spin_lock_irqsave(&card->int_lock, flags);
2614                 hb = skb_dequeue(&card->hbpool.queue);
2615                 card->hbpool.count--;
2616                 spin_unlock_irqrestore(&card->int_lock, flags);
2617                 if (hb == NULL)
2618                     printk
2619                         ("nicstar%d: huge buffer count inconsistent.\n",
2620                          card->index);
2621                 else
2622                     dev_kfree_skb_any(hb);
2623
2624             }
2625             while (card->hbpool.count < card->hbnr.init) {
2626                 struct sk_buff *hb;
2627
2628                 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2629                 if (hb == NULL)
2630                     return -ENOMEM;
2631                 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2632                 spin_lock_irqsave(&card->int_lock, flags);
2633                 skb_queue_tail(&card->hbpool.queue, hb);
2634                 card->hbpool.count++;
2635                 spin_unlock_irqrestore(&card->int_lock, flags);
2636             }
2637             break;
2638
2639         case NS_BUFTYPE_IOVEC:
2640             while (card->iovpool.count > card->iovnr.init) {
2641                 struct sk_buff *iovb;
2642
2643                 spin_lock_irqsave(&card->int_lock, flags);
2644                 iovb = skb_dequeue(&card->iovpool.queue);
2645                 card->iovpool.count--;
2646                 spin_unlock_irqrestore(&card->int_lock, flags);
2647                 if (iovb == NULL)
2648                     printk
2649                         ("nicstar%d: iovec buffer count inconsistent.\n",
2650                          card->index);
2651                 else
2652                     dev_kfree_skb_any(iovb);
2653
2654             }
2655             while (card->iovpool.count < card->iovnr.init) {
2656                 struct sk_buff *iovb;
2657
2658                 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2659                 if (iovb == NULL)
2660                     return -ENOMEM;
2661                 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2662                 spin_lock_irqsave(&card->int_lock, flags);
2663                 skb_queue_tail(&card->iovpool.queue, iovb);
2664                 card->iovpool.count++;
2665                 spin_unlock_irqrestore(&card->int_lock, flags);
2666             }
2667             break;
2668
2669         default:
2670             return -EINVAL;
2671
2672         }
2673         return 0;
2674
2675     default:
2676         if (dev->phy && dev->phy->ioctl) {
2677             return dev->phy->ioctl(dev, cmd, arg);
2678         } else {
2679             printk("nicstar%d: %s == NULL \n", card->index,
2680                    dev->phy ? "dev->phy->ioctl" : "dev->phy");
2681             return -ENOIOCTLCMD;
2682         }
2683     }
2684 }
2685
2686 #ifdef EXTRA_DEBUG
2687 static void which_list(ns_dev * card, struct sk_buff *skb)
2688 {
2689     printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2690 }
2691 #endif /* EXTRA_DEBUG */
2692
2693 static void ns_poll(struct timer_list *unused)
2694 {
2695     int i;
2696     ns_dev *card;
2697     unsigned long flags;
2698     u32 stat_r, stat_w;
2699
2700     PRINTK("nicstar: Entering ns_poll().\n");
2701     for (i = 0; i < num_cards; i++) {
2702         card = cards[i];
2703         if (!spin_trylock_irqsave(&card->int_lock, flags)) {
2704             /* Probably it isn't worth spinning */
2705             continue;
2706         }
2707
2708         stat_w = 0;
2709         stat_r = readl(card->membase + STAT);
2710         if (stat_r & NS_STAT_TSIF)
2711             stat_w |= NS_STAT_TSIF;
2712         if (stat_r & NS_STAT_EOPDU)
2713             stat_w |= NS_STAT_EOPDU;
2714
2715         process_tsq(card);
2716         process_rsq(card);
2717
2718         writel(stat_w, card->membase + STAT);
2719         spin_unlock_irqrestore(&card->int_lock, flags);
2720     }
2721     mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2722     PRINTK("nicstar: Leaving ns_poll().\n");
2723 }
2724
2725 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2726                unsigned long addr)
2727 {
2728     ns_dev *card;
2729     unsigned long flags;
2730
2731     card = dev->dev_data;
2732     spin_lock_irqsave(&card->res_lock, flags);
2733     while (CMD_BUSY(card)) ;
2734     writel((u32) value, card->membase + DR0);
2735     writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2736            card->membase + CMD);
2737     spin_unlock_irqrestore(&card->res_lock, flags);
2738 }
2739
2740 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2741 {
2742     ns_dev *card;
2743     unsigned long flags;
2744     u32 data;
2745
2746     card = dev->dev_data;
2747     spin_lock_irqsave(&card->res_lock, flags);
2748     while (CMD_BUSY(card)) ;
2749     writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2750            card->membase + CMD);
2751     while (CMD_BUSY(card)) ;
2752     data = readl(card->membase + DR0) & 0x000000FF;
2753     spin_unlock_irqrestore(&card->res_lock, flags);
2754     return (unsigned char)data;
2755 }
2756
2757 module_init(nicstar_init);
2758 module_exit(nicstar_cleanup);