drivers/ata/pata_radisys.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *    pata_radisys.c - Intel PATA/SATA controllers
0004  *
0005  *  (C) 2006 Red Hat <alan@lxorguk.ukuu.org.uk>
0006  *
0007  *    Some parts based on ata_piix.c by Jeff Garzik and others.
0008  *
0009  *    A PIIX relative, this device has a single ATA channel and no
0010  *    slave timings, SITRE or PPE. In that sense it is a close relative
0011  *    of the original PIIX. It does however support UDMA 33/66 per channel
0012  *    although no other modes/timings. Also lacking is 32bit I/O on the ATA
0013  *    port.
0014  */
0015
0016 #include <linux/kernel.h>
0017 #include <linux/module.h>
0018 #include <linux/pci.h>
0019 #include <linux/blkdev.h>
0020 #include <linux/delay.h>
0021 #include <linux/device.h>
0022 #include <scsi/scsi_host.h>
0023 #include <linux/libata.h>
0024 #include <linux/ata.h>
0025
0026 #define DRV_NAME    "pata_radisys"
0027 #define DRV_VERSION "0.4.4"
0028
0029 /**
0030  *  radisys_set_piomode - Initialize host controller PATA PIO timings
0031  *  @ap: ATA port
0032  *  @adev: Device whose timings we are configuring
0033  *
0034  *  Set PIO mode for device, in host controller PCI config space.
0035  *
0036  *  LOCKING:
0037  *  None (inherited from caller).
0038  */
0039
0040 static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
0041 {
0042     unsigned int pio    = adev->pio_mode - XFER_PIO_0;
0043     struct pci_dev *dev = to_pci_dev(ap->host->dev);
0044     u16 idetm_data;
0045     int control = 0;
0046
0047     /*
0048      *  See Intel Document 298600-004 for the timing programing rules
0049      *  for PIIX/ICH. Note that the early PIIX does not have the slave
0050      *  timing port at 0x44. The Radisys is a relative of the PIIX
0051      *  but not the same so be careful.
0052      */
0053
0054     static const     /* ISP  RTC */
0055     u8 timings[][2] = { { 0, 0 },   /* Check me */
0056                 { 0, 0 },
0057                 { 1, 1 },
0058                 { 2, 2 },
0059                 { 3, 3 }, };
0060
0061     if (pio > 0)
0062         control |= 1;   /* TIME1 enable */
0063     if (ata_pio_need_iordy(adev))
0064         control |= 2;   /* IE IORDY */
0065
0066     pci_read_config_word(dev, 0x40, &idetm_data);
0067
0068     /* Enable IE and TIME as appropriate. Clear the other
0069        drive timing bits */
0070     idetm_data &= 0xCCCC;
0071     idetm_data |= (control << (4 * adev->devno));
0072     idetm_data |= (timings[pio][0] << 12) |
0073             (timings[pio][1] << 8);
0074     pci_write_config_word(dev, 0x40, idetm_data);
0075
0076     /* Track which port is configured */
0077     ap->private_data = adev;
0078 }
0079
0080 /**
0081  *  radisys_set_dmamode - Initialize host controller PATA DMA timings
0082  *  @ap: Port whose timings we are configuring
0083  *  @adev: Device to program
0084  *
0085  *  Set MWDMA mode for device, in host controller PCI config space.
0086  *
0087  *  LOCKING:
0088  *  None (inherited from caller).
0089  */
0090
0091 static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
0092 {
0093     struct pci_dev *dev = to_pci_dev(ap->host->dev);
0094     u16 idetm_data;
0095     u8 udma_enable;
0096
0097     static const     /* ISP  RTC */
0098     u8 timings[][2] = { { 0, 0 },
0099                 { 0, 0 },
0100                 { 1, 1 },
0101                 { 2, 2 },
0102                 { 3, 3 }, };
0103
0104     /*
0105      * MWDMA is driven by the PIO timings. We must also enable
0106      * IORDY unconditionally.
0107      */
0108
0109     pci_read_config_word(dev, 0x40, &idetm_data);
0110     pci_read_config_byte(dev, 0x48, &udma_enable);
0111
0112     if (adev->dma_mode < XFER_UDMA_0) {
0113         unsigned int mwdma  = adev->dma_mode - XFER_MW_DMA_0;
0114         const unsigned int needed_pio[3] = {
0115             XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
0116         };
0117         int pio = needed_pio[mwdma] - XFER_PIO_0;
0118         int control = 3;    /* IORDY|TIME0 */
0119
0120         /* If the drive MWDMA is faster than it can do PIO then
0121            we must force PIO0 for PIO cycles. */
0122
0123         if (adev->pio_mode < needed_pio[mwdma])
0124             control = 1;
0125
0126         /* Mask out the relevant control and timing bits we will load. Also
0127            clear the other drive TIME register as a precaution */
0128
0129         idetm_data &= 0xCCCC;
0130         idetm_data |= control << (4 * adev->devno);
0131         idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
0132
0133         udma_enable &= ~(1 << adev->devno);
0134     } else {
0135         u8 udma_mode;
0136
0137         /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
0138
0139         pci_read_config_byte(dev, 0x4A, &udma_mode);
0140
0141         if (adev->xfer_mode == XFER_UDMA_2)
0142             udma_mode &= ~(2 << (adev->devno * 4));
0143         else /* UDMA 4 */
0144             udma_mode |= (2 << (adev->devno * 4));
0145
0146         pci_write_config_byte(dev, 0x4A, udma_mode);
0147
0148         udma_enable |= (1 << adev->devno);
0149     }
0150     pci_write_config_word(dev, 0x40, idetm_data);
0151     pci_write_config_byte(dev, 0x48, udma_enable);
0152
0153     /* Track which port is configured */
0154     ap->private_data = adev;
0155 }
0156
0157 /**
0158  *  radisys_qc_issue    -   command issue
0159  *  @qc: command pending
0160  *
0161  *  Called when the libata layer is about to issue a command. We wrap
0162  *  this interface so that we can load the correct ATA timings if
0163  *  necessary. Our logic also clears TIME0/TIME1 for the other device so
0164  *  that, even if we get this wrong, cycles to the other device will
0165  *  be made PIO0.
0166  */
0167
0168 static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc)
0169 {
0170     struct ata_port *ap = qc->ap;
0171     struct ata_device *adev = qc->dev;
0172
0173     if (adev != ap->private_data) {
0174         /* UDMA timing is not shared */
0175         if (adev->dma_mode < XFER_UDMA_0 || !ata_dma_enabled(adev)) {
0176             if (ata_dma_enabled(adev))
0177                 radisys_set_dmamode(ap, adev);
0178             else if (adev->pio_mode)
0179                 radisys_set_piomode(ap, adev);
0180         }
0181     }
0182     return ata_bmdma_qc_issue(qc);
0183 }
0184
0185
0186 static struct scsi_host_template radisys_sht = {
0187     ATA_BMDMA_SHT(DRV_NAME),
0188 };
0189
0190 static struct ata_port_operations radisys_pata_ops = {
0191     .inherits       = &ata_bmdma_port_ops,
0192     .qc_issue       = radisys_qc_issue,
0193     .cable_detect       = ata_cable_unknown,
0194     .set_piomode        = radisys_set_piomode,
0195     .set_dmamode        = radisys_set_dmamode,
0196 };
0197
0198
0199 /**
0200  *  radisys_init_one - Register PIIX ATA PCI device with kernel services
0201  *  @pdev: PCI device to register
0202  *  @ent: Entry in radisys_pci_tbl matching with @pdev
0203  *
0204  *  Called from kernel PCI layer.  We probe for combined mode (sigh),
0205  *  and then hand over control to libata, for it to do the rest.
0206  *
0207  *  LOCKING:
0208  *  Inherited from PCI layer (may sleep).
0209  *
0210  *  RETURNS:
0211  *  Zero on success, or -ERRNO value.
0212  */
0213
0214 static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
0215 {
0216     static const struct ata_port_info info = {
0217         .flags      = ATA_FLAG_SLAVE_POSS,
0218         .pio_mask   = ATA_PIO4,
0219         .mwdma_mask = ATA_MWDMA12_ONLY,
0220         .udma_mask  = ATA_UDMA24_ONLY,
0221         .port_ops   = &radisys_pata_ops,
0222     };
0223     const struct ata_port_info *ppi[] = { &info, NULL };
0224
0225     ata_print_version_once(&pdev->dev, DRV_VERSION);
0226
0227     return ata_pci_bmdma_init_one(pdev, ppi, &radisys_sht, NULL, 0);
0228 }
0229
0230 static const struct pci_device_id radisys_pci_tbl[] = {
0231     { PCI_VDEVICE(RADISYS, 0x8201), },
0232
0233     { } /* terminate list */
0234 };
0235
0236 static struct pci_driver radisys_pci_driver = {
0237     .name           = DRV_NAME,
0238     .id_table       = radisys_pci_tbl,
0239     .probe          = radisys_init_one,
0240     .remove         = ata_pci_remove_one,
0241 #ifdef CONFIG_PM_SLEEP
0242     .suspend        = ata_pci_device_suspend,
0243     .resume         = ata_pci_device_resume,
0244 #endif
0245 };
0246
0247 module_pci_driver(radisys_pci_driver);
0248
0249 MODULE_AUTHOR("Alan Cox");
0250 MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
0251 MODULE_LICENSE("GPL");
0252 MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
0253 MODULE_VERSION(DRV_VERSION);