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0027 #include <linux/kernel.h>
0028 #include <linux/module.h>
0029 #include <linux/pci.h>
0030 #include <linux/blkdev.h>
0031 #include <linux/delay.h>
0032 #include <scsi/scsi_host.h>
0033 #include <linux/libata.h>
0034
0035 #define DRV_NAME "pata_opti"
0036 #define DRV_VERSION "0.2.9"
0037
0038 enum {
0039 READ_REG = 0,
0040 WRITE_REG = 1,
0041 CNTRL_REG = 3,
0042 STRAP_REG = 5,
0043 MISC_REG = 6
0044 };
0045
0046
0047
0048
0049
0050
0051
0052
0053
0054 static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
0055 {
0056 struct ata_port *ap = link->ap;
0057 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0058 static const struct pci_bits opti_enable_bits[] = {
0059 { 0x45, 1, 0x80, 0x00 },
0060 { 0x40, 1, 0x08, 0x00 }
0061 };
0062
0063 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
0064 return -ENOENT;
0065
0066 return ata_sff_prereset(link, deadline);
0067 }
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081 static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
0082 {
0083 void __iomem *regio = ap->ioaddr.cmd_addr;
0084
0085
0086 ioread16(regio + 1);
0087 ioread16(regio + 1);
0088 iowrite8(3, regio + 2);
0089
0090
0091 iowrite8(val, regio + reg);
0092
0093
0094 iowrite8(0x83, regio + 2);
0095 }
0096
0097
0098
0099
0100
0101
0102
0103
0104
0105
0106
0107 static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
0108 {
0109 struct ata_device *pair = ata_dev_pair(adev);
0110 int clock;
0111 int pio = adev->pio_mode - XFER_PIO_0;
0112 void __iomem *regio = ap->ioaddr.cmd_addr;
0113 u8 addr;
0114
0115
0116 static const u8 addr_timing[2][5] = {
0117 { 0x30, 0x20, 0x20, 0x10, 0x10 },
0118 { 0x20, 0x20, 0x10, 0x10, 0x10 }
0119 };
0120 static const u8 data_rec_timing[2][5] = {
0121 { 0x6B, 0x56, 0x42, 0x32, 0x31 },
0122 { 0x58, 0x44, 0x32, 0x22, 0x21 }
0123 };
0124
0125 iowrite8(0xff, regio + 5);
0126 clock = ioread16(regio + 5) & 1;
0127
0128
0129
0130
0131
0132
0133 addr = addr_timing[clock][pio];
0134 if (pair) {
0135
0136 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
0137 if (pair_addr > addr)
0138 addr = pair_addr;
0139 }
0140
0141
0142 opti_write_reg(ap, adev->devno, MISC_REG);
0143 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
0144 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
0145 opti_write_reg(ap, addr, MISC_REG);
0146
0147
0148 opti_write_reg(ap, 0x85, CNTRL_REG);
0149 }
0150
0151 static struct scsi_host_template opti_sht = {
0152 ATA_PIO_SHT(DRV_NAME),
0153 };
0154
0155 static struct ata_port_operations opti_port_ops = {
0156 .inherits = &ata_sff_port_ops,
0157 .cable_detect = ata_cable_40wire,
0158 .set_piomode = opti_set_piomode,
0159 .prereset = opti_pre_reset,
0160 };
0161
0162 static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
0163 {
0164 static const struct ata_port_info info = {
0165 .flags = ATA_FLAG_SLAVE_POSS,
0166 .pio_mask = ATA_PIO4,
0167 .port_ops = &opti_port_ops
0168 };
0169 const struct ata_port_info *ppi[] = { &info, NULL };
0170
0171 ata_print_version_once(&dev->dev, DRV_VERSION);
0172
0173 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
0174 }
0175
0176 static const struct pci_device_id opti[] = {
0177 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
0178 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
0179
0180 { },
0181 };
0182
0183 static struct pci_driver opti_pci_driver = {
0184 .name = DRV_NAME,
0185 .id_table = opti,
0186 .probe = opti_init_one,
0187 .remove = ata_pci_remove_one,
0188 #ifdef CONFIG_PM_SLEEP
0189 .suspend = ata_pci_device_suspend,
0190 .resume = ata_pci_device_resume,
0191 #endif
0192 };
0193
0194 module_pci_driver(opti_pci_driver);
0195
0196 MODULE_AUTHOR("Alan Cox");
0197 MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
0198 MODULE_LICENSE("GPL");
0199 MODULE_DEVICE_TABLE(pci, opti);
0200 MODULE_VERSION(DRV_VERSION);