drivers/ata/pata_ns87410.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * pata_ns87410.c   - National Semiconductor 87410 PATA for new ATA layer
0004  *            (C) 2006 Red Hat Inc
0005  */
0006
0007 #include <linux/kernel.h>
0008 #include <linux/module.h>
0009 #include <linux/pci.h>
0010 #include <linux/blkdev.h>
0011 #include <linux/delay.h>
0012 #include <scsi/scsi_host.h>
0013 #include <linux/libata.h>
0014
0015 #define DRV_NAME "pata_ns87410"
0016 #define DRV_VERSION "0.4.6"
0017
0018 /**
0019  *  ns87410_pre_reset       -   probe begin
0020  *  @link: ATA link
0021  *  @deadline: deadline jiffies for the operation
0022  *
0023  *  Check enabled ports
0024  */
0025
0026 static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline)
0027 {
0028     struct ata_port *ap = link->ap;
0029     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0030     static const struct pci_bits ns87410_enable_bits[] = {
0031         { 0x43, 1, 0x08, 0x08 },
0032         { 0x47, 1, 0x08, 0x08 }
0033     };
0034
0035     if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
0036         return -ENOENT;
0037
0038     return ata_sff_prereset(link, deadline);
0039 }
0040
0041 /**
0042  *  ns87410_set_piomode -   set initial PIO mode data
0043  *  @ap: ATA interface
0044  *  @adev: ATA device
0045  *
0046  *  Program timing data. This is kept per channel not per device,
0047  *  and only affects the data port.
0048  */
0049
0050 static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev)
0051 {
0052     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0053     int port = 0x40 + 4 * ap->port_no;
0054     u8 idetcr, idefr;
0055     struct ata_timing at;
0056
0057     static const u8 activebits[15] = {
0058         0, 1, 2, 3, 4,
0059         5, 5, 6, 6, 6,
0060         6, 7, 7, 7, 7
0061     };
0062
0063     static const u8 recoverbits[12] = {
0064         0, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7
0065     };
0066
0067     pci_read_config_byte(pdev, port + 3, &idefr);
0068
0069     if (ata_pio_need_iordy(adev))
0070         idefr |= 0x04;  /* IORDY enable */
0071     else
0072         idefr &= ~0x04;
0073
0074     if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
0075         dev_err(&pdev->dev, "unknown mode %d\n", adev->pio_mode);
0076         return;
0077     }
0078
0079     at.active = clamp_val(at.active, 2, 16) - 2;
0080     at.setup = clamp_val(at.setup, 1, 4) - 1;
0081     at.recover = clamp_val(at.recover, 1, 12) - 1;
0082
0083     idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active];
0084
0085     pci_write_config_byte(pdev, port, idetcr);
0086     pci_write_config_byte(pdev, port + 3, idefr);
0087     /* We use ap->private_data as a pointer to the device currently
0088        loaded for timing */
0089     ap->private_data = adev;
0090 }
0091
0092 /**
0093  *  ns87410_qc_issue    -   command issue
0094  *  @qc: command pending
0095  *
0096  *  Called when the libata layer is about to issue a command. We wrap
0097  *  this interface so that we can load the correct ATA timings if
0098  *  necessary.
0099  */
0100
0101 static unsigned int ns87410_qc_issue(struct ata_queued_cmd *qc)
0102 {
0103     struct ata_port *ap = qc->ap;
0104     struct ata_device *adev = qc->dev;
0105
0106     /* If modes have been configured and the channel data is not loaded
0107        then load it. We have to check if pio_mode is set as the core code
0108        does not set adev->pio_mode to XFER_PIO_0 while probing as would be
0109        logical */
0110
0111     if (adev->pio_mode && adev != ap->private_data)
0112         ns87410_set_piomode(ap, adev);
0113
0114     return ata_sff_qc_issue(qc);
0115 }
0116
0117 static struct scsi_host_template ns87410_sht = {
0118     ATA_PIO_SHT(DRV_NAME),
0119 };
0120
0121 static struct ata_port_operations ns87410_port_ops = {
0122     .inherits   = &ata_sff_port_ops,
0123     .qc_issue   = ns87410_qc_issue,
0124     .cable_detect   = ata_cable_40wire,
0125     .set_piomode    = ns87410_set_piomode,
0126     .prereset   = ns87410_pre_reset,
0127 };
0128
0129 static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
0130 {
0131     static const struct ata_port_info info = {
0132         .flags = ATA_FLAG_SLAVE_POSS,
0133         .pio_mask = ATA_PIO3,
0134         .port_ops = &ns87410_port_ops
0135     };
0136     const struct ata_port_info *ppi[] = { &info, NULL };
0137     return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
0138 }
0139
0140 static const struct pci_device_id ns87410[] = {
0141     { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), },
0142
0143     { },
0144 };
0145
0146 static struct pci_driver ns87410_pci_driver = {
0147     .name       = DRV_NAME,
0148     .id_table   = ns87410,
0149     .probe      = ns87410_init_one,
0150     .remove     = ata_pci_remove_one,
0151 #ifdef CONFIG_PM_SLEEP
0152     .suspend    = ata_pci_device_suspend,
0153     .resume     = ata_pci_device_resume,
0154 #endif
0155 };
0156
0157 module_pci_driver(ns87410_pci_driver);
0158
0159 MODULE_AUTHOR("Alan Cox");
0160 MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
0161 MODULE_LICENSE("GPL");
0162 MODULE_DEVICE_TABLE(pci, ns87410);
0163 MODULE_VERSION(DRV_VERSION);