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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *    pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
0004  *          PATA port of the controller. The SATA ports are
0005  *          driven by AHCI in the usual configuration although
0006  *          this driver can handle other setups if we need it.
0007  *
0008  *  (c) 2006 Red Hat
0009  */
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/pci.h>
0014 #include <linux/blkdev.h>
0015 #include <linux/delay.h>
0016 #include <linux/device.h>
0017 #include <scsi/scsi_host.h>
0018 #include <linux/libata.h>
0019 #include <linux/ata.h>
0020 
0021 #define DRV_NAME    "pata_jmicron"
0022 #define DRV_VERSION "0.1.5"
0023 
0024 typedef enum {
0025     PORT_PATA0 = 0,
0026     PORT_PATA1 = 1,
0027     PORT_SATA = 2,
0028 } port_type;
0029 
0030 /**
0031  *  jmicron_pre_reset   -   check for 40/80 pin
0032  *  @link: ATA link
0033  *  @deadline: deadline jiffies for the operation
0034  *
0035  *  Perform the PATA port setup we need.
0036  *
0037  *  On the Jmicron 361/363 there is a single PATA port that can be mapped
0038  *  either as primary or secondary (or neither). We don't do any policy
0039  *  and setup here. We assume that has been done by init_one and the
0040  *  BIOS.
0041  */
0042 static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
0043 {
0044     struct ata_port *ap = link->ap;
0045     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0046     u32 control;
0047     u32 control5;
0048     int port_mask = 1<< (4 * ap->port_no);
0049     int port = ap->port_no;
0050     port_type port_map[2];
0051 
0052     /* Check if our port is enabled */
0053     pci_read_config_dword(pdev, 0x40, &control);
0054     if ((control & port_mask) == 0)
0055         return -ENOENT;
0056 
0057     /* There are two basic mappings. One has the two SATA ports merged
0058        as master/slave and the secondary as PATA, the other has only the
0059        SATA port mapped */
0060     if (control & (1 << 23)) {
0061         port_map[0] = PORT_SATA;
0062         port_map[1] = PORT_PATA0;
0063     } else {
0064         port_map[0] = PORT_SATA;
0065         port_map[1] = PORT_SATA;
0066     }
0067 
0068     /* The 365/366 may have this bit set to map the second PATA port
0069        as the internal primary channel */
0070     pci_read_config_dword(pdev, 0x80, &control5);
0071     if (control5 & (1<<24))
0072         port_map[0] = PORT_PATA1;
0073 
0074     /* The two ports may then be logically swapped by the firmware */
0075     if (control & (1 << 22))
0076         port = port ^ 1;
0077 
0078     /*
0079      *  Now we know which physical port we are talking about we can
0080      *  actually do our cable checking etc. Thankfully we don't need
0081      *  to do the plumbing for other cases.
0082      */
0083     switch (port_map[port]) {
0084     case PORT_PATA0:
0085         if ((control & (1 << 5)) == 0)
0086             return -ENOENT;
0087         if (control & (1 << 3)) /* 40/80 pin primary */
0088             ap->cbl = ATA_CBL_PATA40;
0089         else
0090             ap->cbl = ATA_CBL_PATA80;
0091         break;
0092     case PORT_PATA1:
0093         /* Bit 21 is set if the port is enabled */
0094         if ((control5 & (1 << 21)) == 0)
0095             return -ENOENT;
0096         if (control5 & (1 << 19))   /* 40/80 pin secondary */
0097             ap->cbl = ATA_CBL_PATA40;
0098         else
0099             ap->cbl = ATA_CBL_PATA80;
0100         break;
0101     case PORT_SATA:
0102         ap->cbl = ATA_CBL_SATA;
0103         break;
0104     }
0105     return ata_sff_prereset(link, deadline);
0106 }
0107 
0108 /* No PIO or DMA methods needed for this device */
0109 
0110 static struct scsi_host_template jmicron_sht = {
0111     ATA_BMDMA_SHT(DRV_NAME),
0112 };
0113 
0114 static struct ata_port_operations jmicron_ops = {
0115     .inherits       = &ata_bmdma_port_ops,
0116     .prereset       = jmicron_pre_reset,
0117 };
0118 
0119 
0120 /**
0121  *  jmicron_init_one - Register Jmicron ATA PCI device with kernel services
0122  *  @pdev: PCI device to register
0123  *  @id: PCI device ID
0124  *
0125  *  Called from kernel PCI layer.
0126  *
0127  *  LOCKING:
0128  *  Inherited from PCI layer (may sleep).
0129  *
0130  *  RETURNS:
0131  *  Zero on success, or -ERRNO value.
0132  */
0133 
0134 static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
0135 {
0136     static const struct ata_port_info info = {
0137         .flags  = ATA_FLAG_SLAVE_POSS,
0138 
0139         .pio_mask   = ATA_PIO4,
0140         .mwdma_mask = ATA_MWDMA2,
0141         .udma_mask  = ATA_UDMA5,
0142 
0143         .port_ops   = &jmicron_ops,
0144     };
0145     const struct ata_port_info *ppi[] = { &info, NULL };
0146 
0147     return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);
0148 }
0149 
0150 static const struct pci_device_id jmicron_pci_tbl[] = {
0151     { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
0152       PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
0153     { } /* terminate list */
0154 };
0155 
0156 static struct pci_driver jmicron_pci_driver = {
0157     .name           = DRV_NAME,
0158     .id_table       = jmicron_pci_tbl,
0159     .probe          = jmicron_init_one,
0160     .remove         = ata_pci_remove_one,
0161 #ifdef CONFIG_PM_SLEEP
0162     .suspend        = ata_pci_device_suspend,
0163     .resume         = ata_pci_device_resume,
0164 #endif
0165 };
0166 
0167 module_pci_driver(jmicron_pci_driver);
0168 
0169 MODULE_AUTHOR("Alan Cox");
0170 MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
0171 MODULE_LICENSE("GPL");
0172 MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
0173 MODULE_VERSION(DRV_VERSION);
0174