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0016 #include <linux/ata.h>
0017 #include <linux/clk.h>
0018 #include <linux/libata.h>
0019 #include <linux/module.h>
0020 #include <linux/mod_devicetable.h>
0021 #include <linux/platform_device.h>
0022
0023 #define DRV_NAME "pata_imx"
0024
0025 #define PATA_IMX_ATA_TIME_OFF 0x00
0026 #define PATA_IMX_ATA_TIME_ON 0x01
0027 #define PATA_IMX_ATA_TIME_1 0x02
0028 #define PATA_IMX_ATA_TIME_2W 0x03
0029 #define PATA_IMX_ATA_TIME_2R 0x04
0030 #define PATA_IMX_ATA_TIME_AX 0x05
0031 #define PATA_IMX_ATA_TIME_PIO_RDX 0x06
0032 #define PATA_IMX_ATA_TIME_4 0x07
0033 #define PATA_IMX_ATA_TIME_9 0x08
0034
0035 #define PATA_IMX_ATA_CONTROL 0x24
0036 #define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7)
0037 #define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6)
0038 #define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0)
0039 #define PATA_IMX_ATA_INT_EN 0x2C
0040 #define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3)
0041 #define PATA_IMX_DRIVE_DATA 0xA0
0042 #define PATA_IMX_DRIVE_CONTROL 0xD8
0043
0044 static u32 pio_t4[] = { 30, 20, 15, 10, 10 };
0045 static u32 pio_t9[] = { 20, 15, 10, 10, 10 };
0046 static u32 pio_tA[] = { 35, 35, 35, 35, 35 };
0047
0048 struct pata_imx_priv {
0049 struct clk *clk;
0050
0051 void __iomem *host_regs;
0052 u32 ata_ctl;
0053 };
0054
0055 static void pata_imx_set_timing(struct ata_device *adev,
0056 struct pata_imx_priv *priv)
0057 {
0058 struct ata_timing timing;
0059 unsigned long clkrate;
0060 u32 T, mode;
0061
0062 clkrate = clk_get_rate(priv->clk);
0063
0064 if (adev->pio_mode < XFER_PIO_0 || adev->pio_mode > XFER_PIO_4 ||
0065 !clkrate)
0066 return;
0067
0068 T = 1000000000 / clkrate;
0069 ata_timing_compute(adev, adev->pio_mode, &timing, T * 1000, 0);
0070
0071 mode = adev->pio_mode - XFER_PIO_0;
0072
0073 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_OFF);
0074 writeb(3, priv->host_regs + PATA_IMX_ATA_TIME_ON);
0075 writeb(timing.setup, priv->host_regs + PATA_IMX_ATA_TIME_1);
0076 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2W);
0077 writeb(timing.act8b, priv->host_regs + PATA_IMX_ATA_TIME_2R);
0078 writeb(1, priv->host_regs + PATA_IMX_ATA_TIME_PIO_RDX);
0079
0080 writeb(pio_t4[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_4);
0081 writeb(pio_t9[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_9);
0082 writeb(pio_tA[mode] / T + 1, priv->host_regs + PATA_IMX_ATA_TIME_AX);
0083 }
0084
0085 static void pata_imx_set_piomode(struct ata_port *ap, struct ata_device *adev)
0086 {
0087 struct pata_imx_priv *priv = ap->host->private_data;
0088 u32 val;
0089
0090 pata_imx_set_timing(adev, priv);
0091
0092 val = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
0093 if (ata_pio_need_iordy(adev))
0094 val |= PATA_IMX_ATA_CTRL_IORDY_EN;
0095 else
0096 val &= ~PATA_IMX_ATA_CTRL_IORDY_EN;
0097 __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL);
0098 }
0099
0100 static struct scsi_host_template pata_imx_sht = {
0101 ATA_PIO_SHT(DRV_NAME),
0102 };
0103
0104 static struct ata_port_operations pata_imx_port_ops = {
0105 .inherits = &ata_sff_port_ops,
0106 .sff_data_xfer = ata_sff_data_xfer32,
0107 .cable_detect = ata_cable_unknown,
0108 .set_piomode = pata_imx_set_piomode,
0109 };
0110
0111 static void pata_imx_setup_port(struct ata_ioports *ioaddr)
0112 {
0113
0114 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2);
0115 ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << 2);
0116 ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << 2);
0117 ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << 2);
0118 ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << 2);
0119 ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << 2);
0120 ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << 2);
0121 ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << 2);
0122 ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << 2);
0123 ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << 2);
0124 }
0125
0126 static int pata_imx_probe(struct platform_device *pdev)
0127 {
0128 struct ata_host *host;
0129 struct ata_port *ap;
0130 struct pata_imx_priv *priv;
0131 int irq = 0;
0132 struct resource *io_res;
0133 int ret;
0134
0135 irq = platform_get_irq(pdev, 0);
0136 if (irq < 0)
0137 return irq;
0138
0139 priv = devm_kzalloc(&pdev->dev,
0140 sizeof(struct pata_imx_priv), GFP_KERNEL);
0141 if (!priv)
0142 return -ENOMEM;
0143
0144 priv->clk = devm_clk_get(&pdev->dev, NULL);
0145 if (IS_ERR(priv->clk)) {
0146 dev_err(&pdev->dev, "Failed to get clock\n");
0147 return PTR_ERR(priv->clk);
0148 }
0149
0150 ret = clk_prepare_enable(priv->clk);
0151 if (ret)
0152 return ret;
0153
0154 host = ata_host_alloc(&pdev->dev, 1);
0155 if (!host) {
0156 ret = -ENOMEM;
0157 goto err;
0158 }
0159
0160 host->private_data = priv;
0161 ap = host->ports[0];
0162
0163 ap->ops = &pata_imx_port_ops;
0164 ap->pio_mask = ATA_PIO4;
0165 ap->flags |= ATA_FLAG_SLAVE_POSS;
0166
0167 io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0168 priv->host_regs = devm_ioremap_resource(&pdev->dev, io_res);
0169 if (IS_ERR(priv->host_regs)) {
0170 ret = PTR_ERR(priv->host_regs);
0171 goto err;
0172 }
0173
0174 ap->ioaddr.cmd_addr = priv->host_regs + PATA_IMX_DRIVE_DATA;
0175 ap->ioaddr.ctl_addr = priv->host_regs + PATA_IMX_DRIVE_CONTROL;
0176
0177 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
0178
0179 pata_imx_setup_port(&ap->ioaddr);
0180
0181 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
0182 (unsigned long long)io_res->start + PATA_IMX_DRIVE_DATA,
0183 (unsigned long long)io_res->start + PATA_IMX_DRIVE_CONTROL);
0184
0185
0186 __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B |
0187 PATA_IMX_ATA_CTRL_ATA_RST_B,
0188 priv->host_regs + PATA_IMX_ATA_CONTROL);
0189
0190 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
0191 priv->host_regs + PATA_IMX_ATA_INT_EN);
0192
0193
0194 ret = ata_host_activate(host, irq, ata_sff_interrupt, 0,
0195 &pata_imx_sht);
0196
0197 if (ret)
0198 goto err;
0199
0200 return 0;
0201 err:
0202 clk_disable_unprepare(priv->clk);
0203
0204 return ret;
0205 }
0206
0207 static int pata_imx_remove(struct platform_device *pdev)
0208 {
0209 struct ata_host *host = platform_get_drvdata(pdev);
0210 struct pata_imx_priv *priv = host->private_data;
0211
0212 ata_host_detach(host);
0213
0214 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
0215
0216 clk_disable_unprepare(priv->clk);
0217
0218 return 0;
0219 }
0220
0221 #ifdef CONFIG_PM_SLEEP
0222 static int pata_imx_suspend(struct device *dev)
0223 {
0224 struct ata_host *host = dev_get_drvdata(dev);
0225 struct pata_imx_priv *priv = host->private_data;
0226
0227 ata_host_suspend(host, PMSG_SUSPEND);
0228
0229 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
0230 priv->ata_ctl = __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
0231 clk_disable_unprepare(priv->clk);
0232
0233 return 0;
0234 }
0235
0236 static int pata_imx_resume(struct device *dev)
0237 {
0238 struct ata_host *host = dev_get_drvdata(dev);
0239 struct pata_imx_priv *priv = host->private_data;
0240
0241 int ret = clk_prepare_enable(priv->clk);
0242 if (ret)
0243 return ret;
0244
0245 __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL);
0246
0247 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
0248 priv->host_regs + PATA_IMX_ATA_INT_EN);
0249
0250 ata_host_resume(host);
0251
0252 return 0;
0253 }
0254 #endif
0255
0256 static SIMPLE_DEV_PM_OPS(pata_imx_pm_ops, pata_imx_suspend, pata_imx_resume);
0257
0258 static const struct of_device_id imx_pata_dt_ids[] = {
0259 {
0260 .compatible = "fsl,imx27-pata",
0261 }, {
0262
0263 }
0264 };
0265 MODULE_DEVICE_TABLE(of, imx_pata_dt_ids);
0266
0267 static struct platform_driver pata_imx_driver = {
0268 .probe = pata_imx_probe,
0269 .remove = pata_imx_remove,
0270 .driver = {
0271 .name = DRV_NAME,
0272 .of_match_table = imx_pata_dt_ids,
0273 .pm = &pata_imx_pm_ops,
0274 },
0275 };
0276
0277 module_platform_driver(pata_imx_driver);
0278
0279 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
0280 MODULE_DESCRIPTION("low-level driver for iMX PATA");
0281 MODULE_LICENSE("GPL");
0282 MODULE_ALIAS("platform:" DRV_NAME);