drivers/ata/pata_cypress.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * pata_cypress.c   - Cypress PATA for new ATA layer
0004  *            (C) 2006 Red Hat Inc
0005  *            Alan Cox
0006  *
0007  * Based heavily on
0008  * linux/drivers/ide/pci/cy82c693.c     Version 0.40    Sep. 10, 2002
0009  *
0010  */
0011
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/pci.h>
0015 #include <linux/blkdev.h>
0016 #include <linux/delay.h>
0017 #include <scsi/scsi_host.h>
0018 #include <linux/libata.h>
0019
0020 #define DRV_NAME "pata_cypress"
0021 #define DRV_VERSION "0.1.5"
0022
0023 /* here are the offset definitions for the registers */
0024
0025 enum {
0026     CY82_IDE_CMDREG     = 0x04,
0027     CY82_IDE_ADDRSETUP  = 0x48,
0028     CY82_IDE_MASTER_IOR = 0x4C,
0029     CY82_IDE_MASTER_IOW = 0x4D,
0030     CY82_IDE_SLAVE_IOR  = 0x4E,
0031     CY82_IDE_SLAVE_IOW  = 0x4F,
0032     CY82_IDE_MASTER_8BIT    = 0x50,
0033     CY82_IDE_SLAVE_8BIT = 0x51,
0034
0035     CY82_INDEX_PORT     = 0x22,
0036     CY82_DATA_PORT      = 0x23,
0037
0038     CY82_INDEX_CTRLREG1 = 0x01,
0039     CY82_INDEX_CHANNEL0 = 0x30,
0040     CY82_INDEX_CHANNEL1 = 0x31,
0041     CY82_INDEX_TIMEOUT  = 0x32
0042 };
0043
0044 static bool enable_dma = true;
0045 module_param(enable_dma, bool, 0);
0046 MODULE_PARM_DESC(enable_dma, "Enable bus master DMA operations");
0047
0048 /**
0049  *  cy82c693_set_piomode    -   set initial PIO mode data
0050  *  @ap: ATA interface
0051  *  @adev: ATA device
0052  *
0053  *  Called to do the PIO mode setup.
0054  */
0055
0056 static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
0057 {
0058     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0059     struct ata_timing t;
0060     const unsigned long T = 1000000 / 33;
0061     short time_16, time_8;
0062     u32 addr;
0063
0064     if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
0065         ata_dev_err(adev, DRV_NAME ": mome computation failed.\n");
0066         return;
0067     }
0068
0069     time_16 = clamp_val(t.recover - 1, 0, 15) |
0070           (clamp_val(t.active - 1, 0, 15) << 4);
0071     time_8 = clamp_val(t.act8b - 1, 0, 15) |
0072          (clamp_val(t.rec8b - 1, 0, 15) << 4);
0073
0074     if (adev->devno == 0) {
0075         pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
0076
0077         addr &= ~0x0F;  /* Mask bits */
0078         addr |= clamp_val(t.setup - 1, 0, 15);
0079
0080         pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
0081         pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
0082         pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
0083         pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
0084     } else {
0085         pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
0086
0087         addr &= ~0xF0;  /* Mask bits */
0088         addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
0089
0090         pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
0091         pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
0092         pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
0093         pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
0094     }
0095 }
0096
0097 /**
0098  *  cy82c693_set_dmamode    -   set initial DMA mode data
0099  *  @ap: ATA interface
0100  *  @adev: ATA device
0101  *
0102  *  Called to do the DMA mode setup.
0103  */
0104
0105 static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
0106 {
0107     int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
0108
0109     /* Be afraid, be very afraid. Magic registers  in low I/O space */
0110     outb(reg, 0x22);
0111     outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
0112
0113     /* 0x50 gives the best behaviour on the Alpha's using this chip */
0114     outb(CY82_INDEX_TIMEOUT, 0x22);
0115     outb(0x50, 0x23);
0116 }
0117
0118 static struct scsi_host_template cy82c693_sht = {
0119     ATA_BMDMA_SHT(DRV_NAME),
0120 };
0121
0122 static struct ata_port_operations cy82c693_port_ops = {
0123     .inherits   = &ata_bmdma_port_ops,
0124     .cable_detect   = ata_cable_40wire,
0125     .set_piomode    = cy82c693_set_piomode,
0126     .set_dmamode    = cy82c693_set_dmamode,
0127 };
0128
0129 static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
0130 {
0131     static struct ata_port_info info = {
0132         .flags = ATA_FLAG_SLAVE_POSS,
0133         .pio_mask = ATA_PIO4,
0134         .port_ops = &cy82c693_port_ops
0135     };
0136     const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
0137
0138     if (enable_dma)
0139         info.mwdma_mask = ATA_MWDMA2;
0140
0141     /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
0142        For the moment we don't handle the secondary. FIXME */
0143
0144     if (PCI_FUNC(pdev->devfn) != 1)
0145         return -ENODEV;
0146
0147     return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
0148 }
0149
0150 static const struct pci_device_id cy82c693[] = {
0151     { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
0152
0153     { },
0154 };
0155
0156 static struct pci_driver cy82c693_pci_driver = {
0157     .name       = DRV_NAME,
0158     .id_table   = cy82c693,
0159     .probe      = cy82c693_init_one,
0160     .remove     = ata_pci_remove_one,
0161 #ifdef CONFIG_PM_SLEEP
0162     .suspend    = ata_pci_device_suspend,
0163     .resume     = ata_pci_device_resume,
0164 #endif
0165 };
0166
0167 module_pci_driver(cy82c693_pci_driver);
0168
0169 MODULE_AUTHOR("Alan Cox");
0170 MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
0171 MODULE_LICENSE("GPL");
0172 MODULE_DEVICE_TABLE(pci, cy82c693);
0173 MODULE_VERSION(DRV_VERSION);