drivers/ata/pata_cs5535.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * pata-cs5535.c    - CS5535 PATA for new ATA layer
0004  *            (C) 2005-2006 Red Hat Inc
0005  *            Alan Cox <alan@lxorguk.ukuu.org.uk>
0006  *
0007  * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
0008  * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
0009  * and Alexander Kiausch <alex.kiausch@t-online.de>
0010  *
0011  * Loosely based on the piix & svwks drivers.
0012  *
0013  * Documentation:
0014  *  Available from AMD web site.
0015  * TODO
0016  *  Review errata to see if serializing is necessary
0017  */
0018
0019 #include <linux/kernel.h>
0020 #include <linux/module.h>
0021 #include <linux/pci.h>
0022 #include <linux/blkdev.h>
0023 #include <linux/delay.h>
0024 #include <scsi/scsi_host.h>
0025 #include <linux/libata.h>
0026 #include <asm/msr.h>
0027
0028 #define DRV_NAME    "pata_cs5535"
0029 #define DRV_VERSION "0.2.12"
0030
0031 /*
0032  *  The Geode (Aka Athlon GX now) uses an internal MSR based
0033  *  bus system for control. Demented but there you go.
0034  */
0035
0036 #define MSR_ATAC_BASE       0x51300000
0037 #define ATAC_GLD_MSR_CAP    (MSR_ATAC_BASE+0)
0038 #define ATAC_GLD_MSR_CONFIG    (MSR_ATAC_BASE+0x01)
0039 #define ATAC_GLD_MSR_SMI       (MSR_ATAC_BASE+0x02)
0040 #define ATAC_GLD_MSR_ERROR     (MSR_ATAC_BASE+0x03)
0041 #define ATAC_GLD_MSR_PM        (MSR_ATAC_BASE+0x04)
0042 #define ATAC_GLD_MSR_DIAG      (MSR_ATAC_BASE+0x05)
0043 #define ATAC_IO_BAR            (MSR_ATAC_BASE+0x08)
0044 #define ATAC_RESET             (MSR_ATAC_BASE+0x10)
0045 #define ATAC_CH0D0_PIO         (MSR_ATAC_BASE+0x20)
0046 #define ATAC_CH0D0_DMA         (MSR_ATAC_BASE+0x21)
0047 #define ATAC_CH0D1_PIO         (MSR_ATAC_BASE+0x22)
0048 #define ATAC_CH0D1_DMA         (MSR_ATAC_BASE+0x23)
0049 #define ATAC_PCI_ABRTERR       (MSR_ATAC_BASE+0x24)
0050
0051 #define ATAC_BM0_CMD_PRIM      0x00
0052 #define ATAC_BM0_STS_PRIM      0x02
0053 #define ATAC_BM0_PRD           0x04
0054
0055 #define CS5535_CABLE_DETECT    0x48
0056
0057 /**
0058  *  cs5535_cable_detect -   detect cable type
0059  *  @ap: Port to detect on
0060  *
0061  *  Perform cable detection for ATA66 capable cable. Return a libata
0062  *  cable type.
0063  */
0064
0065 static int cs5535_cable_detect(struct ata_port *ap)
0066 {
0067     u8 cable;
0068     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0069
0070     pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
0071     if (cable & 1)
0072         return ATA_CBL_PATA80;
0073     else
0074         return ATA_CBL_PATA40;
0075 }
0076
0077 /**
0078  *  cs5535_set_piomode      -   PIO setup
0079  *  @ap: ATA interface
0080  *  @adev: device on the interface
0081  *
0082  *  Set our PIO requirements. The CS5535 is pretty clean about all this
0083  */
0084
0085 static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
0086 {
0087     static const u16 pio_timings[5] = {
0088         0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
0089     };
0090     static const u16 pio_cmd_timings[5] = {
0091         0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
0092     };
0093     u32 reg, __maybe_unused dummy;
0094     struct ata_device *pair = ata_dev_pair(adev);
0095
0096     int mode = adev->pio_mode - XFER_PIO_0;
0097     int cmdmode = mode;
0098
0099     /* Command timing has to be for the lowest of the pair of devices */
0100     if (pair) {
0101         int pairmode = pair->pio_mode - XFER_PIO_0;
0102         cmdmode = min(mode, pairmode);
0103         /* Write the other drive timing register if it changed */
0104         if (cmdmode < pairmode)
0105             wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
0106                 pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
0107     }
0108     /* Write the drive timing register */
0109     wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
0110         pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
0111
0112     /* Set the PIO "format 1" bit in the DMA timing register */
0113     rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
0114     wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
0115 }
0116
0117 /**
0118  *  cs5535_set_dmamode      -   DMA timing setup
0119  *  @ap: ATA interface
0120  *  @adev: Device being configured
0121  *
0122  */
0123
0124 static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
0125 {
0126     static const u32 udma_timings[5] = {
0127         0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
0128     };
0129     static const u32 mwdma_timings[3] = {
0130         0x7F0FFFF3, 0x7F035352, 0x7F024241
0131     };
0132     u32 reg, __maybe_unused dummy;
0133     int mode = adev->dma_mode;
0134
0135     rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
0136     reg &= 0x80000000UL;
0137     if (mode >= XFER_UDMA_0)
0138         reg |= udma_timings[mode - XFER_UDMA_0];
0139     else
0140         reg |= mwdma_timings[mode - XFER_MW_DMA_0];
0141     wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
0142 }
0143
0144 static struct scsi_host_template cs5535_sht = {
0145     ATA_BMDMA_SHT(DRV_NAME),
0146 };
0147
0148 static struct ata_port_operations cs5535_port_ops = {
0149     .inherits   = &ata_bmdma_port_ops,
0150     .cable_detect   = cs5535_cable_detect,
0151     .set_piomode    = cs5535_set_piomode,
0152     .set_dmamode    = cs5535_set_dmamode,
0153 };
0154
0155 /**
0156  *  cs5535_init_one     -   Initialise a CS5530
0157  *  @dev: PCI device
0158  *  @id: Entry in match table
0159  *
0160  *  Install a driver for the newly found CS5530 companion chip. Most of
0161  *  this is just housekeeping. We have to set the chip up correctly and
0162  *  turn off various bits of emulation magic.
0163  */
0164
0165 static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
0166 {
0167     static const struct ata_port_info info = {
0168         .flags = ATA_FLAG_SLAVE_POSS,
0169         .pio_mask = ATA_PIO4,
0170         .mwdma_mask = ATA_MWDMA2,
0171         .udma_mask = ATA_UDMA4,
0172         .port_ops = &cs5535_port_ops
0173     };
0174     const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
0175
0176     return ata_pci_bmdma_init_one(dev, ppi, &cs5535_sht, NULL, 0);
0177 }
0178
0179 static const struct pci_device_id cs5535[] = {
0180     { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), },
0181     { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
0182
0183     { },
0184 };
0185
0186 static struct pci_driver cs5535_pci_driver = {
0187     .name       = DRV_NAME,
0188     .id_table   = cs5535,
0189     .probe      = cs5535_init_one,
0190     .remove     = ata_pci_remove_one,
0191 #ifdef CONFIG_PM_SLEEP
0192     .suspend    = ata_pci_device_suspend,
0193     .resume     = ata_pci_device_resume,
0194 #endif
0195 };
0196
0197 module_pci_driver(cs5535_pci_driver);
0198
0199 MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
0200 MODULE_DESCRIPTION("low-level driver for the NS/AMD 5535");
0201 MODULE_LICENSE("GPL");
0202 MODULE_DEVICE_TABLE(pci, cs5535);
0203 MODULE_VERSION(DRV_VERSION);