drivers/ata/pata_cmd640.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * pata_cmd640.c    - CMD640 PCI PATA for new ATA layer
0004  *            (C) 2007 Red Hat Inc
0005  *
0006  * Based upon
0007  *  linux/drivers/ide/pci/cmd640.c      Version 1.02  Sep 01, 1996
0008  *
0009  *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
0010  *
0011  *  This drives only the PCI version of the controller. If you have a
0012  *  VLB one then we have enough docs to support it but you can write
0013  *  your own code.
0014  */
0015
0016 #include <linux/kernel.h>
0017 #include <linux/module.h>
0018 #include <linux/pci.h>
0019 #include <linux/blkdev.h>
0020 #include <linux/delay.h>
0021 #include <linux/gfp.h>
0022 #include <scsi/scsi_host.h>
0023 #include <linux/libata.h>
0024
0025 #define DRV_NAME "pata_cmd640"
0026 #define DRV_VERSION "0.0.5"
0027
0028 struct cmd640_reg {
0029     int last;
0030     u8 reg58[ATA_MAX_DEVICES];
0031 };
0032
0033 enum {
0034     CFR = 0x50,
0035     CNTRL = 0x51,
0036     CMDTIM = 0x52,
0037     ARTIM0 = 0x53,
0038     DRWTIM0 = 0x54,
0039     ARTIM23 = 0x57,
0040     DRWTIM23 = 0x58,
0041     BRST = 0x59
0042 };
0043
0044 /**
0045  *  cmd640_set_piomode  -   set initial PIO mode data
0046  *  @ap: ATA port
0047  *  @adev: ATA device
0048  *
0049  *  Called to do the PIO mode setup.
0050  */
0051
0052 static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
0053 {
0054     struct cmd640_reg *timing = ap->private_data;
0055     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0056     struct ata_timing t;
0057     const unsigned long T = 1000000 / 33;
0058     const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
0059     u8 reg;
0060     int arttim = ARTIM0 + 2 * adev->devno;
0061     struct ata_device *pair = ata_dev_pair(adev);
0062
0063     if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
0064         ata_dev_err(adev, DRV_NAME ": mode computation failed.\n");
0065         return;
0066     }
0067
0068     /* The second channel has shared timings and the setup timing is
0069        messy to switch to merge it for worst case */
0070     if (ap->port_no && pair) {
0071         struct ata_timing p;
0072         ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
0073         ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
0074     }
0075
0076     /* Make the timings fit */
0077     if (t.recover > 16) {
0078         t.active += t.recover - 16;
0079         t.recover = 16;
0080     }
0081     if (t.active > 16)
0082         t.active = 16;
0083
0084     /* Now convert the clocks into values we can actually stuff into
0085        the chip */
0086
0087     if (t.recover > 1)
0088         t.recover--;    /* 640B only */
0089     else
0090         t.recover = 15;
0091
0092     if (t.setup > 4)
0093         t.setup = 0xC0;
0094     else
0095         t.setup = setup_data[t.setup];
0096
0097     if (ap->port_no == 0) {
0098         t.active &= 0x0F;   /* 0 = 16 */
0099
0100         /* Load setup timing */
0101         pci_read_config_byte(pdev, arttim, &reg);
0102         reg &= 0x3F;
0103         reg |= t.setup;
0104         pci_write_config_byte(pdev, arttim, reg);
0105
0106         /* Load active/recovery */
0107         pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
0108     } else {
0109         /* Save the shared timings for channel, they will be loaded
0110            by qc_issue. Reloading the setup time is expensive so we
0111            keep a merged one loaded */
0112         pci_read_config_byte(pdev, ARTIM23, &reg);
0113         reg &= 0x3F;
0114         reg |= t.setup;
0115         pci_write_config_byte(pdev, ARTIM23, reg);
0116         timing->reg58[adev->devno] = (t.active << 4) | t.recover;
0117     }
0118 }
0119
0120
0121 /**
0122  *  cmd640_qc_issue -   command preparation hook
0123  *  @qc: Command to be issued
0124  *
0125  *  Channel 1 has shared timings. We must reprogram the
0126  *  clock each drive 2/3 switch we do.
0127  */
0128
0129 static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
0130 {
0131     struct ata_port *ap = qc->ap;
0132     struct ata_device *adev = qc->dev;
0133     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0134     struct cmd640_reg *timing = ap->private_data;
0135
0136     if (ap->port_no != 0 && adev->devno != timing->last) {
0137         pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
0138         timing->last = adev->devno;
0139     }
0140     return ata_sff_qc_issue(qc);
0141 }
0142
0143 /**
0144  *  cmd640_port_start   -   port setup
0145  *  @ap: ATA port being set up
0146  *
0147  *  The CMD640 needs to maintain private data structures so we
0148  *  allocate space here.
0149  */
0150
0151 static int cmd640_port_start(struct ata_port *ap)
0152 {
0153     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0154     struct cmd640_reg *timing;
0155
0156     timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
0157     if (timing == NULL)
0158         return -ENOMEM;
0159     timing->last = -1;  /* Force a load */
0160     ap->private_data = timing;
0161     return 0;
0162 }
0163
0164 static bool cmd640_sff_irq_check(struct ata_port *ap)
0165 {
0166     struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
0167     int irq_reg     = ap->port_no ? ARTIM23 : CFR;
0168     u8  irq_stat, irq_mask  = ap->port_no ? 0x10 : 0x04;
0169
0170     pci_read_config_byte(pdev, irq_reg, &irq_stat);
0171
0172     return irq_stat & irq_mask;
0173 }
0174
0175 static struct scsi_host_template cmd640_sht = {
0176     ATA_PIO_SHT(DRV_NAME),
0177 };
0178
0179 static struct ata_port_operations cmd640_port_ops = {
0180     .inherits   = &ata_sff_port_ops,
0181     /* In theory xfer_noirq is not needed once we kill the prefetcher */
0182     .sff_data_xfer  = ata_sff_data_xfer32,
0183     .sff_irq_check  = cmd640_sff_irq_check,
0184     .qc_issue   = cmd640_qc_issue,
0185     .cable_detect   = ata_cable_40wire,
0186     .set_piomode    = cmd640_set_piomode,
0187     .port_start = cmd640_port_start,
0188 };
0189
0190 static void cmd640_hardware_init(struct pci_dev *pdev)
0191 {
0192     u8 ctrl;
0193
0194     /* CMD640 detected, commiserations */
0195     pci_write_config_byte(pdev, 0x5B, 0x00);
0196     /* PIO0 command cycles */
0197     pci_write_config_byte(pdev, CMDTIM, 0);
0198     /* 512 byte bursts (sector) */
0199     pci_write_config_byte(pdev, BRST, 0x40);
0200     /*
0201      * A reporter a long time ago
0202      * Had problems with the data fifo
0203      * So don't run the risk
0204      * Of putting crap on the disk
0205      * For its better just to go slow
0206      */
0207     /* Do channel 0 */
0208     pci_read_config_byte(pdev, CNTRL, &ctrl);
0209     pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
0210     /* Ditto for channel 1 */
0211     pci_read_config_byte(pdev, ARTIM23, &ctrl);
0212     ctrl |= 0x0C;
0213     pci_write_config_byte(pdev, ARTIM23, ctrl);
0214 }
0215
0216 static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
0217 {
0218     static const struct ata_port_info info = {
0219         .flags = ATA_FLAG_SLAVE_POSS,
0220         .pio_mask = ATA_PIO4,
0221         .port_ops = &cmd640_port_ops
0222     };
0223     const struct ata_port_info *ppi[] = { &info, NULL };
0224     int rc;
0225
0226     rc = pcim_enable_device(pdev);
0227     if (rc)
0228         return rc;
0229
0230     cmd640_hardware_init(pdev);
0231
0232     return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
0233 }
0234
0235 #ifdef CONFIG_PM_SLEEP
0236 static int cmd640_reinit_one(struct pci_dev *pdev)
0237 {
0238     struct ata_host *host = pci_get_drvdata(pdev);
0239     int rc;
0240
0241     rc = ata_pci_device_do_resume(pdev);
0242     if (rc)
0243         return rc;
0244     cmd640_hardware_init(pdev);
0245     ata_host_resume(host);
0246     return 0;
0247 }
0248 #endif
0249
0250 static const struct pci_device_id cmd640[] = {
0251     { PCI_VDEVICE(CMD, 0x640), 0 },
0252     { },
0253 };
0254
0255 static struct pci_driver cmd640_pci_driver = {
0256     .name       = DRV_NAME,
0257     .id_table   = cmd640,
0258     .probe      = cmd640_init_one,
0259     .remove     = ata_pci_remove_one,
0260 #ifdef CONFIG_PM_SLEEP
0261     .suspend    = ata_pci_device_suspend,
0262     .resume     = cmd640_reinit_one,
0263 #endif
0264 };
0265
0266 module_pci_driver(cmd640_pci_driver);
0267
0268 MODULE_AUTHOR("Alan Cox");
0269 MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
0270 MODULE_LICENSE("GPL");
0271 MODULE_DEVICE_TABLE(pci, cmd640);
0272 MODULE_VERSION(DRV_VERSION);