Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
0004  *
0005  *  (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
0006  *
0007  * Per Atp867 data sheet rev 1.2, Acard.
0008  * Based in part on early ide code from
0009  *  2003-2004 by Eric Uhrhane, Google, Inc.
0010  *
0011  * TODO:
0012  *   1. RAID features [comparison, XOR, striping, mirroring, etc.]
0013  */
0014 
0015 #include <linux/kernel.h>
0016 #include <linux/module.h>
0017 #include <linux/pci.h>
0018 #include <linux/blkdev.h>
0019 #include <linux/delay.h>
0020 #include <linux/device.h>
0021 #include <linux/gfp.h>
0022 #include <scsi/scsi_host.h>
0023 #include <linux/libata.h>
0024 
0025 #define DRV_NAME    "pata_atp867x"
0026 #define DRV_VERSION "0.7.5"
0027 
0028 /*
0029  * IO Registers
0030  * Note that all runtime hot priv ports are cached in ap private_data
0031  */
0032 
0033 enum {
0034     ATP867X_IO_CHANNEL_OFFSET   = 0x10,
0035 
0036     /*
0037      * IO Register Bitfields
0038      */
0039 
0040     ATP867X_IO_PIOSPD_ACTIVE_SHIFT  = 4,
0041     ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
0042 
0043     ATP867X_IO_DMAMODE_MSTR_SHIFT   = 0,
0044     ATP867X_IO_DMAMODE_MSTR_MASK    = 0x07,
0045     ATP867X_IO_DMAMODE_SLAVE_SHIFT  = 4,
0046     ATP867X_IO_DMAMODE_SLAVE_MASK   = 0x70,
0047 
0048     ATP867X_IO_DMAMODE_UDMA_6   = 0x07,
0049     ATP867X_IO_DMAMODE_UDMA_5   = 0x06,
0050     ATP867X_IO_DMAMODE_UDMA_4   = 0x05,
0051     ATP867X_IO_DMAMODE_UDMA_3   = 0x04,
0052     ATP867X_IO_DMAMODE_UDMA_2   = 0x03,
0053     ATP867X_IO_DMAMODE_UDMA_1   = 0x02,
0054     ATP867X_IO_DMAMODE_UDMA_0   = 0x01,
0055     ATP867X_IO_DMAMODE_DISABLE  = 0x00,
0056 
0057     ATP867X_IO_SYS_INFO_66MHZ   = 0x04,
0058     ATP867X_IO_SYS_INFO_SLOW_UDMA5  = 0x02,
0059     ATP867X_IO_SYS_MASK_RESERVED    = (~0xf1),
0060 
0061     ATP867X_IO_PORTSPD_VAL      = 0x1143,
0062     ATP867X_PREREAD_VAL     = 0x0200,
0063 
0064     ATP867X_NUM_PORTS       = 4,
0065     ATP867X_BAR_IOBASE      = 0,
0066     ATP867X_BAR_ROMBASE     = 6,
0067 };
0068 
0069 #define ATP867X_IOBASE(ap)      ((ap)->host->iomap[0])
0070 #define ATP867X_SYS_INFO(ap)        (0x3F + ATP867X_IOBASE(ap))
0071 
0072 #define ATP867X_IO_PORTBASE(ap, port)   (0x00 + ATP867X_IOBASE(ap) + \
0073                     (port) * ATP867X_IO_CHANNEL_OFFSET)
0074 #define ATP867X_IO_DMABASE(ap, port)    (0x40 + \
0075                     ATP867X_IO_PORTBASE((ap), (port)))
0076 
0077 #define ATP867X_IO_STATUS(ap, port) (0x07 + \
0078                     ATP867X_IO_PORTBASE((ap), (port)))
0079 #define ATP867X_IO_ALTSTATUS(ap, port)  (0x0E + \
0080                     ATP867X_IO_PORTBASE((ap), (port)))
0081 
0082 /*
0083  * hot priv ports
0084  */
0085 #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
0086                     ATP867X_IO_DMABASE((ap), (port)))
0087 #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
0088                     ATP867X_IO_DMABASE((ap), (port)))
0089 #define ATP867X_IO_8BPIOSPD(ap, port)   (0x0A + \
0090                     ATP867X_IO_DMABASE((ap), (port)))
0091 #define ATP867X_IO_DMAMODE(ap, port)    (0x0B + \
0092                     ATP867X_IO_DMABASE((ap), (port)))
0093 
0094 #define ATP867X_IO_PORTSPD(ap, port)    (0x4A + \
0095                     ATP867X_IO_PORTBASE((ap), (port)))
0096 #define ATP867X_IO_PREREAD(ap, port)    (0x4C + \
0097                     ATP867X_IO_PORTBASE((ap), (port)))
0098 
0099 struct atp867x_priv {
0100     void __iomem *dma_mode;
0101     void __iomem *mstr_piospd;
0102     void __iomem *slave_piospd;
0103     void __iomem *eightb_piospd;
0104     int     pci66mhz;
0105 };
0106 
0107 static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
0108 {
0109     struct pci_dev *pdev    = to_pci_dev(ap->host->dev);
0110     struct atp867x_priv *dp = ap->private_data;
0111     u8 speed = adev->dma_mode;
0112     u8 b;
0113     u8 mode = speed - XFER_UDMA_0 + 1;
0114 
0115     /*
0116      * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
0117      * on 66MHz bus
0118      *   rev-A: UDMA_1~4 (5, 6 no change)
0119      *   rev-B: all UDMA modes
0120      *   UDMA_0 stays not to disable UDMA
0121      */
0122     if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0  &&
0123        (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
0124         mode < ATP867X_IO_DMAMODE_UDMA_5))
0125         mode--;
0126 
0127     b = ioread8(dp->dma_mode);
0128     if (adev->devno & 1) {
0129         b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
0130             (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
0131     } else {
0132         b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
0133             (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
0134     }
0135     iowrite8(b, dp->dma_mode);
0136 }
0137 
0138 static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
0139     unsigned int clk)
0140 {
0141     struct atp867x_priv *dp = ap->private_data;
0142     unsigned char clocks = clk;
0143 
0144     /*
0145      * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
0146      * on 66MHz bus
0147      */
0148     if (dp->pci66mhz)
0149         clocks++;
0150 
0151     switch (clocks) {
0152     case 0:
0153         clocks = 1;
0154         break;
0155     case 1 ... 6:
0156         break;
0157     default:
0158         ata_port_warn(ap, "ATP867X: active %dclk is invalid. "
0159             "Using 12clk.\n", clk);
0160         fallthrough;
0161     case 9 ... 12:
0162         clocks = 7; /* 12 clk */
0163         break;
0164     case 7:
0165     case 8: /* default 8 clk */
0166         clocks = 0;
0167         goto active_clock_shift_done;
0168     }
0169 
0170 active_clock_shift_done:
0171     return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
0172 }
0173 
0174 static int atp867x_get_recover_clocks_shifted(struct ata_port *ap,
0175                           unsigned int clk)
0176 {
0177     unsigned char clocks = clk;
0178 
0179     switch (clocks) {
0180     case 0:
0181         clocks = 1;
0182         break;
0183     case 1 ... 11:
0184         break;
0185     case 13:
0186     case 14:
0187         --clocks;   /* by the spec */
0188         break;
0189     case 15:
0190         break;
0191     default:
0192         ata_port_warn(ap, "ATP867X: recover %dclk is invalid. "
0193             "Using default 12clk.\n", clk);
0194         fallthrough;
0195     case 12:    /* default 12 clk */
0196         clocks = 0;
0197         break;
0198     }
0199 
0200     return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
0201 }
0202 
0203 static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
0204 {
0205     struct ata_device *peer = ata_dev_pair(adev);
0206     struct atp867x_priv *dp = ap->private_data;
0207     u8 speed = adev->pio_mode;
0208     struct ata_timing t, p;
0209     int T, UT;
0210     u8 b;
0211 
0212     T = 1000000000 / 33333;
0213     UT = T / 4;
0214 
0215     ata_timing_compute(adev, speed, &t, T, UT);
0216     if (peer && peer->pio_mode) {
0217         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
0218         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
0219     }
0220 
0221     b = ioread8(dp->dma_mode);
0222     if (adev->devno & 1)
0223         b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
0224     else
0225         b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
0226     iowrite8(b, dp->dma_mode);
0227 
0228     b = atp867x_get_active_clocks_shifted(ap, t.active) |
0229         atp867x_get_recover_clocks_shifted(ap, t.recover);
0230 
0231     if (adev->devno & 1)
0232         iowrite8(b, dp->slave_piospd);
0233     else
0234         iowrite8(b, dp->mstr_piospd);
0235 
0236     b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
0237         atp867x_get_recover_clocks_shifted(ap, t.rec8b);
0238 
0239     iowrite8(b, dp->eightb_piospd);
0240 }
0241 
0242 static int atp867x_cable_override(struct pci_dev *pdev)
0243 {
0244     if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
0245         (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
0246          pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
0247         return 1;
0248     }
0249     return 0;
0250 }
0251 
0252 static int atp867x_cable_detect(struct ata_port *ap)
0253 {
0254     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0255 
0256     if (atp867x_cable_override(pdev))
0257         return ATA_CBL_PATA40_SHORT;
0258 
0259     return ATA_CBL_PATA_UNK;
0260 }
0261 
0262 static struct scsi_host_template atp867x_sht = {
0263     ATA_BMDMA_SHT(DRV_NAME),
0264 };
0265 
0266 static struct ata_port_operations atp867x_ops = {
0267     .inherits       = &ata_bmdma_port_ops,
0268     .cable_detect       = atp867x_cable_detect,
0269     .set_piomode        = atp867x_set_piomode,
0270     .set_dmamode        = atp867x_set_dmamode,
0271 };
0272 
0273 
0274 static void atp867x_check_res(struct pci_dev *pdev)
0275 {
0276     int i;
0277     unsigned long start, len;
0278 
0279     /* Check the PCI resources for this channel are enabled */
0280     for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
0281         start = pci_resource_start(pdev, i);
0282         len   = pci_resource_len(pdev, i);
0283         dev_dbg(&pdev->dev, "ATP867X: resource start:len=%lx:%lx\n",
0284             start, len);
0285     }
0286 }
0287 
0288 static void atp867x_check_ports(struct ata_port *ap, int port)
0289 {
0290     struct ata_ioports *ioaddr = &ap->ioaddr;
0291     struct atp867x_priv *dp = ap->private_data;
0292 
0293     ata_port_dbg(ap, "ATP867X: port[%d] addresses\n"
0294         "  cmd_addr =0x%lx, 0x%lx\n"
0295         "  ctl_addr =0x%lx, 0x%lx\n"
0296         "  bmdma_addr   =0x%lx, 0x%lx\n"
0297         "  data_addr    =0x%lx\n"
0298         "  error_addr   =0x%lx\n"
0299         "  feature_addr =0x%lx\n"
0300         "  nsect_addr   =0x%lx\n"
0301         "  lbal_addr    =0x%lx\n"
0302         "  lbam_addr    =0x%lx\n"
0303         "  lbah_addr    =0x%lx\n"
0304         "  device_addr  =0x%lx\n"
0305         "  status_addr  =0x%lx\n"
0306         "  command_addr =0x%lx\n"
0307         "  dp->dma_mode =0x%lx\n"
0308         "  dp->mstr_piospd  =0x%lx\n"
0309         "  dp->slave_piospd =0x%lx\n"
0310         "  dp->eightb_piospd    =0x%lx\n"
0311         "  dp->pci66mhz     =0x%lx\n",
0312         port,
0313         (unsigned long)ioaddr->cmd_addr,
0314         (unsigned long)ATP867X_IO_PORTBASE(ap, port),
0315         (unsigned long)ioaddr->ctl_addr,
0316         (unsigned long)ATP867X_IO_ALTSTATUS(ap, port),
0317         (unsigned long)ioaddr->bmdma_addr,
0318         (unsigned long)ATP867X_IO_DMABASE(ap, port),
0319         (unsigned long)ioaddr->data_addr,
0320         (unsigned long)ioaddr->error_addr,
0321         (unsigned long)ioaddr->feature_addr,
0322         (unsigned long)ioaddr->nsect_addr,
0323         (unsigned long)ioaddr->lbal_addr,
0324         (unsigned long)ioaddr->lbam_addr,
0325         (unsigned long)ioaddr->lbah_addr,
0326         (unsigned long)ioaddr->device_addr,
0327         (unsigned long)ioaddr->status_addr,
0328         (unsigned long)ioaddr->command_addr,
0329         (unsigned long)dp->dma_mode,
0330         (unsigned long)dp->mstr_piospd,
0331         (unsigned long)dp->slave_piospd,
0332         (unsigned long)dp->eightb_piospd,
0333         (unsigned long)dp->pci66mhz);
0334 }
0335 
0336 static int atp867x_set_priv(struct ata_port *ap)
0337 {
0338     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0339     struct atp867x_priv *dp;
0340     int port = ap->port_no;
0341 
0342     dp = ap->private_data =
0343         devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
0344     if (dp == NULL)
0345         return -ENOMEM;
0346 
0347     dp->dma_mode     = ATP867X_IO_DMAMODE(ap, port);
0348     dp->mstr_piospd  = ATP867X_IO_MSTRPIOSPD(ap, port);
0349     dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
0350     dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
0351 
0352     dp->pci66mhz =
0353         ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
0354 
0355     return 0;
0356 }
0357 
0358 static void atp867x_fixup(struct ata_host *host)
0359 {
0360     struct pci_dev *pdev = to_pci_dev(host->dev);
0361     struct ata_port *ap = host->ports[0];
0362     int i;
0363     u8 v;
0364 
0365     /*
0366      * Broken BIOS might not set latency high enough
0367      */
0368     pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
0369     if (v < 0x80) {
0370         v = 0x80;
0371         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
0372         dev_dbg(&pdev->dev, "ATP867X: set latency timer to %d\n", v);
0373     }
0374 
0375     /*
0376      * init 8bit io ports speed(0aaarrrr) to 43h and
0377      * init udma modes of master/slave to 0/0(11h)
0378      */
0379     for (i = 0; i < ATP867X_NUM_PORTS; i++)
0380         iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
0381 
0382     /*
0383      * init PreREAD counts
0384      */
0385     for (i = 0; i < ATP867X_NUM_PORTS; i++)
0386         iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
0387 
0388     v = ioread8(ATP867X_IOBASE(ap) + 0x28);
0389     v &= 0xcf;  /* Enable INTA#: bit4=0 means enable */
0390     v |= 0xc0;  /* Enable PCI burst, MRM & not immediate interrupts */
0391     iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
0392 
0393     /*
0394      * Turn off the over clocked udma5 mode, only for Rev-B
0395      */
0396     v = ioread8(ATP867X_SYS_INFO(ap));
0397     v &= ATP867X_IO_SYS_MASK_RESERVED;
0398     if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
0399         v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
0400     iowrite8(v, ATP867X_SYS_INFO(ap));
0401 }
0402 
0403 static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
0404 {
0405     struct device *gdev = host->dev;
0406     struct pci_dev *pdev = to_pci_dev(gdev);
0407     unsigned int mask = 0;
0408     int i, rc;
0409 
0410     /*
0411      * do not map rombase
0412      */
0413     rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
0414     if (rc == -EBUSY)
0415         pcim_pin_device(pdev);
0416     if (rc)
0417         return rc;
0418     host->iomap = pcim_iomap_table(pdev);
0419 
0420     atp867x_check_res(pdev);
0421 
0422     for (i = 0; i < PCI_STD_NUM_BARS; i++)
0423         dev_dbg(gdev, "ATP867X: iomap[%d]=0x%p\n", i,
0424             host->iomap[i]);
0425 
0426     /*
0427      * request, iomap BARs and init port addresses accordingly
0428      */
0429     for (i = 0; i < host->n_ports; i++) {
0430         struct ata_port *ap = host->ports[i];
0431         struct ata_ioports *ioaddr = &ap->ioaddr;
0432 
0433         ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
0434         ioaddr->ctl_addr = ioaddr->altstatus_addr
0435                  = ATP867X_IO_ALTSTATUS(ap, i);
0436         ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
0437 
0438         ata_sff_std_ports(ioaddr);
0439         rc = atp867x_set_priv(ap);
0440         if (rc)
0441             return rc;
0442 
0443         atp867x_check_ports(ap, i);
0444 
0445         ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
0446             (unsigned long)ioaddr->cmd_addr,
0447             (unsigned long)ioaddr->ctl_addr);
0448         ata_port_desc(ap, "bmdma 0x%lx",
0449             (unsigned long)ioaddr->bmdma_addr);
0450 
0451         mask |= 1 << i;
0452     }
0453 
0454     if (!mask) {
0455         dev_err(gdev, "no available native port\n");
0456         return -ENODEV;
0457     }
0458 
0459     atp867x_fixup(host);
0460 
0461     return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);
0462 }
0463 
0464 static int atp867x_init_one(struct pci_dev *pdev,
0465     const struct pci_device_id *id)
0466 {
0467     static const struct ata_port_info info_867x = {
0468         .flags      = ATA_FLAG_SLAVE_POSS,
0469         .pio_mask   = ATA_PIO4,
0470         .udma_mask  = ATA_UDMA6,
0471         .port_ops   = &atp867x_ops,
0472     };
0473 
0474     struct ata_host *host;
0475     const struct ata_port_info *ppi[] = { &info_867x, NULL };
0476     int rc;
0477 
0478     ata_print_version_once(&pdev->dev, DRV_VERSION);
0479 
0480     rc = pcim_enable_device(pdev);
0481     if (rc)
0482         return rc;
0483 
0484     dev_info(&pdev->dev, "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
0485         pdev->device);
0486 
0487     host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
0488     if (!host) {
0489         dev_err(&pdev->dev, "failed to allocate ATA host\n");
0490         rc = -ENOMEM;
0491         goto err_out;
0492     }
0493 
0494     rc = atp867x_ata_pci_sff_init_host(host);
0495     if (rc) {
0496         dev_err(&pdev->dev, "failed to init host\n");
0497         goto err_out;
0498     }
0499 
0500     pci_set_master(pdev);
0501 
0502     rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
0503                 IRQF_SHARED, &atp867x_sht);
0504     if (rc)
0505         dev_err(&pdev->dev, "failed to activate host\n");
0506 
0507 err_out:
0508     return rc;
0509 }
0510 
0511 #ifdef CONFIG_PM_SLEEP
0512 static int atp867x_reinit_one(struct pci_dev *pdev)
0513 {
0514     struct ata_host *host = pci_get_drvdata(pdev);
0515     int rc;
0516 
0517     rc = ata_pci_device_do_resume(pdev);
0518     if (rc)
0519         return rc;
0520 
0521     atp867x_fixup(host);
0522 
0523     ata_host_resume(host);
0524     return 0;
0525 }
0526 #endif
0527 
0528 static struct pci_device_id atp867x_pci_tbl[] = {
0529     { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A),  0 },
0530     { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B),  0 },
0531     { },
0532 };
0533 
0534 static struct pci_driver atp867x_driver = {
0535     .name       = DRV_NAME,
0536     .id_table   = atp867x_pci_tbl,
0537     .probe      = atp867x_init_one,
0538     .remove     = ata_pci_remove_one,
0539 #ifdef CONFIG_PM_SLEEP
0540     .suspend    = ata_pci_device_suspend,
0541     .resume     = atp867x_reinit_one,
0542 #endif
0543 };
0544 
0545 module_pci_driver(atp867x_driver);
0546 
0547 MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
0548 MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
0549 MODULE_LICENSE("GPL");
0550 MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
0551 MODULE_VERSION(DRV_VERSION);
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!