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0001 /*
0002  * pata_ali.c   - ALI 15x3 PATA for new ATA layer
0003  *            (C) 2005 Red Hat Inc
0004  *
0005  * based in part upon
0006  * linux/drivers/ide/pci/alim15x3.c     Version 0.17    2003/01/02
0007  *
0008  *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
0009  *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
0010  *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
0011  *
0012  *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
0013  *  May be copied or modified under the terms of the GNU General Public License
0014  *  Copyright (C) 2002 Alan Cox <alan@redhat.com>
0015  *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
0016  *
0017  *  Documentation
0018  *  Chipset documentation available under NDA only
0019  *
0020  *  TODO/CHECK
0021  *  Cannot have ATAPI on both master & slave for rev < c2 (???) but
0022  *  otherwise should do atapi DMA (For now for old we do PIO only for
0023  *  ATAPI)
0024  *  Review Sunblade workaround.
0025  */
0026 
0027 #include <linux/kernel.h>
0028 #include <linux/module.h>
0029 #include <linux/pci.h>
0030 #include <linux/init.h>
0031 #include <linux/blkdev.h>
0032 #include <linux/delay.h>
0033 #include <scsi/scsi_host.h>
0034 #include <linux/libata.h>
0035 #include <linux/dmi.h>
0036 
0037 #define DRV_NAME "pata_ali"
0038 #define DRV_VERSION "0.7.8"
0039 
0040 static int ali_atapi_dma;
0041 module_param_named(atapi_dma, ali_atapi_dma, int, 0644);
0042 MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)");
0043 
0044 static struct pci_dev *ali_isa_bridge;
0045 
0046 /*
0047  *  Cable special cases
0048  */
0049 
0050 static const struct dmi_system_id cable_dmi_table[] = {
0051     {
0052         .ident = "HP Pavilion N5430",
0053         .matches = {
0054             DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
0055             DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
0056         },
0057     },
0058     {
0059         .ident = "Toshiba Satellite S1800-814",
0060         .matches = {
0061             DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
0062             DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
0063         },
0064     },
0065     { }
0066 };
0067 
0068 static int ali_cable_override(struct pci_dev *pdev)
0069 {
0070     /* Fujitsu P2000 */
0071     if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
0072         return 1;
0073     /* Mitac 8317 (Winbook-A) and relatives */
0074     if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317)
0075         return 1;
0076     /* Systems by DMI */
0077     if (dmi_check_system(cable_dmi_table))
0078         return 1;
0079     return 0;
0080 }
0081 
0082 /**
0083  *  ali_c2_cable_detect -   cable detection
0084  *  @ap: ATA port
0085  *
0086  *  Perform cable detection for C2 and later revisions
0087  */
0088 
0089 static int ali_c2_cable_detect(struct ata_port *ap)
0090 {
0091     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0092     u8 ata66;
0093 
0094     /* Certain laptops use short but suitable cables and don't
0095        implement the detect logic */
0096 
0097     if (ali_cable_override(pdev))
0098         return ATA_CBL_PATA40_SHORT;
0099 
0100     /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
0101        Bit set for 40 pin */
0102     pci_read_config_byte(pdev, 0x4A, &ata66);
0103     if (ata66 & (1 << ap->port_no))
0104         return ATA_CBL_PATA40;
0105     else
0106         return ATA_CBL_PATA80;
0107 }
0108 
0109 /**
0110  *  ali_20_filter       -   filter for earlier ALI DMA
0111  *  @adev: ATA device
0112  *  @mask: received mask to manipulate and pass back
0113  *
0114  *  Ensure that we do not do DMA on CD devices. We may be able to
0115  *  fix that later on. Also ensure we do not do UDMA on WDC drives
0116  */
0117 
0118 static unsigned int ali_20_filter(struct ata_device *adev, unsigned int mask)
0119 {
0120     char model_num[ATA_ID_PROD_LEN + 1];
0121     /* No DMA on anything but a disk for now */
0122     if (adev->class != ATA_DEV_ATA)
0123         mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
0124     ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
0125     if (strstr(model_num, "WDC"))
0126         mask &= ~ATA_MASK_UDMA;
0127     return mask;
0128 }
0129 
0130 /**
0131  *  ali_fifo_control    -   FIFO manager
0132  *  @ap: ALi channel to control
0133  *  @adev: device for FIFO control
0134  *  @on: 0 for off 1 for on
0135  *
0136  *  Enable or disable the FIFO on a given device. Because of the way the
0137  *  ALi FIFO works it provides a boost on ATA disk but can be confused by
0138  *  ATAPI and we must therefore manage it.
0139  */
0140 
0141 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
0142 {
0143     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0144     int pio_fifo = 0x54 + ap->port_no;
0145     u8 fifo;
0146     int shift = 4 * adev->devno;
0147 
0148     /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
0149        0x00. Not all the docs agree but the behaviour we now use is the
0150        one stated in the BIOS Programming Guide */
0151 
0152     pci_read_config_byte(pdev, pio_fifo, &fifo);
0153     fifo &= ~(0x0F << shift);
0154     fifo |= (on << shift);
0155     pci_write_config_byte(pdev, pio_fifo, fifo);
0156 }
0157 
0158 /**
0159  *  ali_program_modes   -   load mode registers
0160  *  @ap: ALi channel to load
0161  *  @adev: Device the timing is for
0162  *  @t: timing data
0163  *  @ultra: UDMA timing or zero for off
0164  *
0165  *  Loads the timing registers for cmd/data and disable UDMA if
0166  *  ultra is zero. If ultra is set then load and enable the UDMA
0167  *  timing but do not touch the command/data timing.
0168  */
0169 
0170 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
0171 {
0172     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0173     int cas = 0x58 + 4 * ap->port_no;   /* Command timing */
0174     int cbt = 0x59 + 4 * ap->port_no;   /* Command timing */
0175     int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
0176     int udmat = 0x56 + ap->port_no; /* UDMA timing */
0177     int shift = 4 * adev->devno;
0178     u8 udma;
0179 
0180     if (t != NULL) {
0181         t->setup = clamp_val(t->setup, 1, 8) & 7;
0182         t->act8b = clamp_val(t->act8b, 1, 8) & 7;
0183         t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
0184         t->active = clamp_val(t->active, 1, 8) & 7;
0185         t->recover = clamp_val(t->recover, 1, 16) & 15;
0186 
0187         pci_write_config_byte(pdev, cas, t->setup);
0188         pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
0189         pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
0190     }
0191 
0192     /* Set up the UDMA enable */
0193     pci_read_config_byte(pdev, udmat, &udma);
0194     udma &= ~(0x0F << shift);
0195     udma |= ultra << shift;
0196     pci_write_config_byte(pdev, udmat, udma);
0197 }
0198 
0199 /**
0200  *  ali_set_piomode -   set initial PIO mode data
0201  *  @ap: ATA interface
0202  *  @adev: ATA device
0203  *
0204  *  Program the ALi registers for PIO mode.
0205  */
0206 
0207 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
0208 {
0209     struct ata_device *pair = ata_dev_pair(adev);
0210     struct ata_timing t;
0211     unsigned long T =  1000000000 / 33333;  /* PCI clock based */
0212 
0213     ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
0214     if (pair) {
0215         struct ata_timing p;
0216         ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
0217         ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
0218         if (ata_dma_enabled(pair)) {
0219             ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
0220             ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
0221         }
0222     }
0223 
0224     /* PIO FIFO is only permitted on ATA disk */
0225     if (adev->class != ATA_DEV_ATA)
0226         ali_fifo_control(ap, adev, 0x00);
0227     ali_program_modes(ap, adev, &t, 0);
0228     if (adev->class == ATA_DEV_ATA)
0229         ali_fifo_control(ap, adev, 0x05);
0230 
0231 }
0232 
0233 /**
0234  *  ali_set_dmamode -   set initial DMA mode data
0235  *  @ap: ATA interface
0236  *  @adev: ATA device
0237  *
0238  *  Program the ALi registers for DMA mode.
0239  */
0240 
0241 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
0242 {
0243     static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
0244     struct ata_device *pair = ata_dev_pair(adev);
0245     struct ata_timing t;
0246     unsigned long T =  1000000000 / 33333;  /* PCI clock based */
0247     struct pci_dev *pdev = to_pci_dev(ap->host->dev);
0248 
0249 
0250     if (adev->class == ATA_DEV_ATA)
0251         ali_fifo_control(ap, adev, 0x08);
0252 
0253     if (adev->dma_mode >= XFER_UDMA_0) {
0254         ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
0255         if (adev->dma_mode >= XFER_UDMA_3) {
0256             u8 reg4b;
0257             pci_read_config_byte(pdev, 0x4B, &reg4b);
0258             reg4b |= 1;
0259             pci_write_config_byte(pdev, 0x4B, reg4b);
0260         }
0261     } else {
0262         ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
0263         if (pair) {
0264             struct ata_timing p;
0265             ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
0266             ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
0267             if (ata_dma_enabled(pair)) {
0268                 ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
0269                 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
0270             }
0271         }
0272         ali_program_modes(ap, adev, &t, 0);
0273     }
0274 }
0275 
0276 /**
0277  *  ali_warn_atapi_dma  -   Warn about ATAPI DMA disablement
0278  *  @adev: Device
0279  *
0280  *  Whine about ATAPI DMA disablement if @adev is an ATAPI device.
0281  *  Can be used as ->dev_config.
0282  */
0283 
0284 static void ali_warn_atapi_dma(struct ata_device *adev)
0285 {
0286     struct ata_eh_context *ehc = &adev->link->eh_context;
0287     int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
0288 
0289     if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) {
0290         ata_dev_warn(adev,
0291                  "WARNING: ATAPI DMA disabled for reliability issues.  It can be enabled\n");
0292         ata_dev_warn(adev,
0293                  "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n");
0294     }
0295 }
0296 
0297 /**
0298  *  ali_lock_sectors    -   Keep older devices to 255 sector mode
0299  *  @adev: Device
0300  *
0301  *  Called during the bus probe for each device that is found. We use
0302  *  this call to lock the sector count of the device to 255 or less on
0303  *  older ALi controllers. If we didn't do this then large I/O's would
0304  *  require LBA48 commands which the older ALi requires are issued by
0305  *  slower PIO methods
0306  */
0307 
0308 static void ali_lock_sectors(struct ata_device *adev)
0309 {
0310     adev->max_sectors = 255;
0311     ali_warn_atapi_dma(adev);
0312 }
0313 
0314 /**
0315  *  ali_check_atapi_dma -   DMA check for most ALi controllers
0316  *  @qc: Command to complete
0317  *
0318  *  Called to decide whether commands should be sent by DMA or PIO
0319  */
0320 
0321 static int ali_check_atapi_dma(struct ata_queued_cmd *qc)
0322 {
0323     if (!ali_atapi_dma) {
0324         /* FIXME: pata_ali can't do ATAPI DMA reliably but the
0325          * IDE alim15x3 driver can.  I tried lots of things
0326          * but couldn't find what the actual difference was.
0327          * If you got an idea, please write it to
0328          * linux-ide@vger.kernel.org and cc htejun@gmail.com.
0329          *
0330          * Disable ATAPI DMA for now.
0331          */
0332         return -EOPNOTSUPP;
0333     }
0334 
0335     /* If its not a media command, its not worth it */
0336     if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC)
0337         return -EOPNOTSUPP;
0338     return 0;
0339 }
0340 
0341 static void ali_c2_c3_postreset(struct ata_link *link, unsigned int *classes)
0342 {
0343     u8 r;
0344     int port_bit = 4 << link->ap->port_no;
0345 
0346     /* If our bridge is an ALI 1533 then do the extra work */
0347     if (ali_isa_bridge) {
0348         /* Tristate and re-enable the bus signals */
0349         pci_read_config_byte(ali_isa_bridge, 0x58, &r);
0350         r &= ~port_bit;
0351         pci_write_config_byte(ali_isa_bridge, 0x58, r);
0352         r |= port_bit;
0353         pci_write_config_byte(ali_isa_bridge, 0x58, r);
0354     }
0355     ata_sff_postreset(link, classes);
0356 }
0357 
0358 static struct scsi_host_template ali_sht = {
0359     ATA_BMDMA_SHT(DRV_NAME),
0360 };
0361 
0362 /*
0363  *  Port operations for PIO only ALi
0364  */
0365 
0366 static struct ata_port_operations ali_early_port_ops = {
0367     .inherits   = &ata_sff_port_ops,
0368     .cable_detect   = ata_cable_40wire,
0369     .set_piomode    = ali_set_piomode,
0370     .sff_data_xfer  = ata_sff_data_xfer32,
0371 };
0372 
0373 static const struct ata_port_operations ali_dma_base_ops = {
0374     .inherits   = &ata_bmdma32_port_ops,
0375     .set_piomode    = ali_set_piomode,
0376     .set_dmamode    = ali_set_dmamode,
0377 };
0378 
0379 /*
0380  *  Port operations for DMA capable ALi without cable
0381  *  detect
0382  */
0383 static struct ata_port_operations ali_20_port_ops = {
0384     .inherits   = &ali_dma_base_ops,
0385     .cable_detect   = ata_cable_40wire,
0386     .mode_filter    = ali_20_filter,
0387     .check_atapi_dma = ali_check_atapi_dma,
0388     .dev_config = ali_lock_sectors,
0389 };
0390 
0391 /*
0392  *  Port operations for DMA capable ALi with cable detect
0393  */
0394 static struct ata_port_operations ali_c2_port_ops = {
0395     .inherits   = &ali_dma_base_ops,
0396     .check_atapi_dma = ali_check_atapi_dma,
0397     .cable_detect   = ali_c2_cable_detect,
0398     .dev_config = ali_lock_sectors,
0399     .postreset  = ali_c2_c3_postreset,
0400 };
0401 
0402 /*
0403  *  Port operations for DMA capable ALi with cable detect
0404  */
0405 static struct ata_port_operations ali_c4_port_ops = {
0406     .inherits   = &ali_dma_base_ops,
0407     .check_atapi_dma = ali_check_atapi_dma,
0408     .cable_detect   = ali_c2_cable_detect,
0409     .dev_config = ali_lock_sectors,
0410 };
0411 
0412 /*
0413  *  Port operations for DMA capable ALi with cable detect and LBA48
0414  */
0415 static struct ata_port_operations ali_c5_port_ops = {
0416     .inherits   = &ali_dma_base_ops,
0417     .check_atapi_dma = ali_check_atapi_dma,
0418     .dev_config = ali_warn_atapi_dma,
0419     .cable_detect   = ali_c2_cable_detect,
0420 };
0421 
0422 
0423 /**
0424  *  ali_init_chipset    -   chip setup function
0425  *  @pdev: PCI device of ATA controller
0426  *
0427  *  Perform the setup on the device that must be done both at boot
0428  *  and at resume time.
0429  */
0430 
0431 static void ali_init_chipset(struct pci_dev *pdev)
0432 {
0433     u8 tmp;
0434     struct pci_dev *north;
0435 
0436     /*
0437      * The chipset revision selects the driver operations and
0438      * mode data.
0439      */
0440 
0441     if (pdev->revision <= 0x20) {
0442         pci_read_config_byte(pdev, 0x53, &tmp);
0443         tmp |= 0x03;
0444         pci_write_config_byte(pdev, 0x53, tmp);
0445     } else {
0446         pci_read_config_byte(pdev, 0x4a, &tmp);
0447         pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
0448         pci_read_config_byte(pdev, 0x4B, &tmp);
0449         if (pdev->revision < 0xC2)
0450             /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
0451             /* Clear CD-ROM DMA write bit */
0452             tmp &= 0x7F;
0453         /* Cable and UDMA */
0454         if (pdev->revision >= 0xc2)
0455             tmp |= 0x01;
0456         pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
0457         /*
0458          * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
0459          * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
0460          * via 0x54/55.
0461          */
0462         pci_read_config_byte(pdev, 0x53, &tmp);
0463         if (pdev->revision >= 0xc7)
0464             tmp |= 0x03;
0465         else
0466             tmp |= 0x01;    /* CD_ROM enable for DMA */
0467         pci_write_config_byte(pdev, 0x53, tmp);
0468     }
0469     north = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), 0,
0470                         PCI_DEVFN(0, 0));
0471     if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
0472         /* Configure the ALi bridge logic. For non ALi rely on BIOS.
0473            Set the south bridge enable bit */
0474         pci_read_config_byte(ali_isa_bridge, 0x79, &tmp);
0475         if (pdev->revision == 0xC2)
0476             pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x04);
0477         else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
0478             pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02);
0479     }
0480     pci_dev_put(north);
0481     ata_pci_bmdma_clear_simplex(pdev);
0482 }
0483 /**
0484  *  ali_init_one        -   discovery callback
0485  *  @pdev: PCI device ID
0486  *  @id: PCI table info
0487  *
0488  *  An ALi IDE interface has been discovered. Figure out what revision
0489  *  and perform configuration work before handing it to the ATA layer
0490  */
0491 
0492 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
0493 {
0494     static const struct ata_port_info info_early = {
0495         .flags = ATA_FLAG_SLAVE_POSS,
0496         .pio_mask = ATA_PIO4,
0497         .port_ops = &ali_early_port_ops
0498     };
0499     /* Revision 0x20 added DMA */
0500     static const struct ata_port_info info_20 = {
0501         .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
0502                             ATA_FLAG_IGN_SIMPLEX,
0503         .pio_mask = ATA_PIO4,
0504         .mwdma_mask = ATA_MWDMA2,
0505         .port_ops = &ali_20_port_ops
0506     };
0507     /* Revision 0x20 with support logic added UDMA */
0508     static const struct ata_port_info info_20_udma = {
0509         .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
0510                             ATA_FLAG_IGN_SIMPLEX,
0511         .pio_mask = ATA_PIO4,
0512         .mwdma_mask = ATA_MWDMA2,
0513         .udma_mask = ATA_UDMA2,
0514         .port_ops = &ali_20_port_ops
0515     };
0516     /* Revision 0xC2 adds UDMA66 */
0517     static const struct ata_port_info info_c2 = {
0518         .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
0519                             ATA_FLAG_IGN_SIMPLEX,
0520         .pio_mask = ATA_PIO4,
0521         .mwdma_mask = ATA_MWDMA2,
0522         .udma_mask = ATA_UDMA4,
0523         .port_ops = &ali_c2_port_ops
0524     };
0525     /* Revision 0xC3 is UDMA66 for now */
0526     static const struct ata_port_info info_c3 = {
0527         .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
0528                             ATA_FLAG_IGN_SIMPLEX,
0529         .pio_mask = ATA_PIO4,
0530         .mwdma_mask = ATA_MWDMA2,
0531         .udma_mask = ATA_UDMA4,
0532         .port_ops = &ali_c2_port_ops
0533     };
0534     /* Revision 0xC4 is UDMA100 */
0535     static const struct ata_port_info info_c4 = {
0536         .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
0537                             ATA_FLAG_IGN_SIMPLEX,
0538         .pio_mask = ATA_PIO4,
0539         .mwdma_mask = ATA_MWDMA2,
0540         .udma_mask = ATA_UDMA5,
0541         .port_ops = &ali_c4_port_ops
0542     };
0543     /* Revision 0xC5 is UDMA133 with LBA48 DMA */
0544     static const struct ata_port_info info_c5 = {
0545         .flags = ATA_FLAG_SLAVE_POSS |  ATA_FLAG_IGN_SIMPLEX,
0546         .pio_mask = ATA_PIO4,
0547         .mwdma_mask = ATA_MWDMA2,
0548         .udma_mask = ATA_UDMA6,
0549         .port_ops = &ali_c5_port_ops
0550     };
0551 
0552     const struct ata_port_info *ppi[] = { NULL, NULL };
0553     u8 tmp;
0554     int rc;
0555 
0556     rc = pcim_enable_device(pdev);
0557     if (rc)
0558         return rc;
0559 
0560     /*
0561      * The chipset revision selects the driver operations and
0562      * mode data.
0563      */
0564 
0565     if (pdev->revision < 0x20) {
0566         ppi[0] = &info_early;
0567     } else if (pdev->revision < 0xC2) {
0568             ppi[0] = &info_20;
0569     } else if (pdev->revision == 0xC2) {
0570             ppi[0] = &info_c2;
0571     } else if (pdev->revision == 0xC3) {
0572             ppi[0] = &info_c3;
0573     } else if (pdev->revision == 0xC4) {
0574             ppi[0] = &info_c4;
0575     } else
0576             ppi[0] = &info_c5;
0577 
0578     ali_init_chipset(pdev);
0579 
0580     if (ali_isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
0581         /* Are we paired with a UDMA capable chip */
0582         pci_read_config_byte(ali_isa_bridge, 0x5E, &tmp);
0583         if ((tmp & 0x1E) == 0x12)
0584                 ppi[0] = &info_20_udma;
0585     }
0586 
0587     if (!ppi[0]->mwdma_mask && !ppi[0]->udma_mask)
0588         return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0);
0589     else
0590         return ata_pci_bmdma_init_one(pdev, ppi, &ali_sht, NULL, 0);
0591 }
0592 
0593 #ifdef CONFIG_PM_SLEEP
0594 static int ali_reinit_one(struct pci_dev *pdev)
0595 {
0596     struct ata_host *host = pci_get_drvdata(pdev);
0597     int rc;
0598 
0599     rc = ata_pci_device_do_resume(pdev);
0600     if (rc)
0601         return rc;
0602     ali_init_chipset(pdev);
0603     ata_host_resume(host);
0604     return 0;
0605 }
0606 #endif
0607 
0608 static const struct pci_device_id ali[] = {
0609     { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
0610     { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
0611 
0612     { },
0613 };
0614 
0615 static struct pci_driver ali_pci_driver = {
0616     .name       = DRV_NAME,
0617     .id_table   = ali,
0618     .probe      = ali_init_one,
0619     .remove     = ata_pci_remove_one,
0620 #ifdef CONFIG_PM_SLEEP
0621     .suspend    = ata_pci_device_suspend,
0622     .resume     = ali_reinit_one,
0623 #endif
0624 };
0625 
0626 static int __init ali_init(void)
0627 {
0628     int ret;
0629     ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
0630 
0631     ret = pci_register_driver(&ali_pci_driver);
0632     if (ret < 0)
0633         pci_dev_put(ali_isa_bridge);
0634     return ret;
0635 }
0636 
0637 
0638 static void __exit ali_exit(void)
0639 {
0640     pci_unregister_driver(&ali_pci_driver);
0641     pci_dev_put(ali_isa_bridge);
0642 }
0643 
0644 
0645 MODULE_AUTHOR("Alan Cox");
0646 MODULE_DESCRIPTION("low-level driver for ALi PATA");
0647 MODULE_LICENSE("GPL");
0648 MODULE_DEVICE_TABLE(pci, ali);
0649 MODULE_VERSION(DRV_VERSION);
0650 
0651 module_init(ali_init);
0652 module_exit(ali_exit);
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