drivers/ata/ata_generic.c

0001 /*
0002  *  ata_generic.c - Generic PATA/SATA controller driver.
0003  *  Copyright 2005 Red Hat Inc, all rights reserved.
0004  *
0005  *  Elements from ide/pci/generic.c
0006  *      Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
0007  *      Portions (C) Copyright 2002  Red Hat Inc <alan@redhat.com>
0008  *
0009  *  May be copied or modified under the terms of the GNU General Public License
0010  *
0011  *  Driver for PCI IDE interfaces implementing the standard bus mastering
0012  *  interface functionality. This assumes the BIOS did the drive set up and
0013  *  tuning for us. By default we do not grab all IDE class devices as they
0014  *  may have other drivers or need fixups to avoid problems. Instead we keep
0015  *  a default list of stuff without documentation/driver that appears to
0016  *  work.
0017  */
0018
0019 #include <linux/kernel.h>
0020 #include <linux/module.h>
0021 #include <linux/pci.h>
0022 #include <linux/blkdev.h>
0023 #include <linux/delay.h>
0024 #include <scsi/scsi_host.h>
0025 #include <linux/libata.h>
0026
0027 #define DRV_NAME "ata_generic"
0028 #define DRV_VERSION "0.2.15"
0029
0030 /*
0031  *  A generic parallel ATA driver using libata
0032  */
0033
0034 enum {
0035     ATA_GEN_CLASS_MATCH     = (1 << 0),
0036     ATA_GEN_FORCE_DMA       = (1 << 1),
0037     ATA_GEN_INTEL_IDER      = (1 << 2),
0038 };
0039
0040 /**
0041  *  generic_set_mode    -   mode setting
0042  *  @link: link to set up
0043  *  @unused: returned device on error
0044  *
0045  *  Use a non standard set_mode function. We don't want to be tuned.
0046  *  The BIOS configured everything. Our job is not to fiddle. We
0047  *  read the dma enabled bits from the PCI configuration of the device
0048  *  and respect them.
0049  */
0050
0051 static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
0052 {
0053     struct ata_port *ap = link->ap;
0054     const struct pci_device_id *id = ap->host->private_data;
0055     int dma_enabled = 0;
0056     struct ata_device *dev;
0057
0058     if (id->driver_data & ATA_GEN_FORCE_DMA) {
0059         dma_enabled = 0xff;
0060     } else if (ap->ioaddr.bmdma_addr) {
0061         /* Bits 5 and 6 indicate if DMA is active on master/slave */
0062         dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
0063     }
0064
0065     ata_for_each_dev(dev, link, ENABLED) {
0066         /* We don't really care */
0067         dev->pio_mode = XFER_PIO_0;
0068         dev->dma_mode = XFER_MW_DMA_0;
0069         /* We do need the right mode information for DMA or PIO
0070            and this comes from the current configuration flags */
0071         if (dma_enabled & (1 << (5 + dev->devno))) {
0072             unsigned int xfer_mask = ata_id_xfermask(dev->id);
0073             const char *name;
0074
0075             if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
0076                 name = ata_mode_string(xfer_mask);
0077             else {
0078                 /* SWDMA perhaps? */
0079                 name = "DMA";
0080                 xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
0081             }
0082
0083             ata_dev_info(dev, "configured for %s\n", name);
0084
0085             dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
0086             dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
0087             dev->flags &= ~ATA_DFLAG_PIO;
0088         } else {
0089             ata_dev_info(dev, "configured for PIO\n");
0090             dev->xfer_mode = XFER_PIO_0;
0091             dev->xfer_shift = ATA_SHIFT_PIO;
0092             dev->flags |= ATA_DFLAG_PIO;
0093         }
0094     }
0095     return 0;
0096 }
0097
0098 static struct scsi_host_template generic_sht = {
0099     ATA_BMDMA_SHT(DRV_NAME),
0100 };
0101
0102 static struct ata_port_operations generic_port_ops = {
0103     .inherits   = &ata_bmdma_port_ops,
0104     .cable_detect   = ata_cable_unknown,
0105     .set_mode   = generic_set_mode,
0106 };
0107
0108 static int all_generic_ide;     /* Set to claim all devices */
0109
0110 /**
0111  *  is_intel_ider       -   identify intel IDE-R devices
0112  *  @dev: PCI device
0113  *
0114  *  Distinguish Intel IDE-R controller devices from other Intel IDE
0115  *  devices. IDE-R devices have no timing registers and are in
0116  *  most respects virtual. They should be driven by the ata_generic
0117  *  driver.
0118  *
0119  *  IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
0120  *  it non zero. All Intel ATA has 0x40 writable (timing), but it is
0121  *  not writable on IDE-R devices (this is guaranteed).
0122  */
0123
0124 static int is_intel_ider(struct pci_dev *dev)
0125 {
0126     /* For Intel IDE the value at 0xF8 is only zero on IDE-R
0127        interfaces */
0128     u32 r;
0129     u16 t;
0130
0131     /* Check the manufacturing ID, it will be zero for IDE-R */
0132     pci_read_config_dword(dev, 0xF8, &r);
0133     /* Not IDE-R: punt so that ata_(old)piix gets it */
0134     if (r != 0)
0135         return 0;
0136     /* 0xF8 will also be zero on some early Intel IDE devices
0137        but they will have a sane timing register */
0138     pci_read_config_word(dev, 0x40, &t);
0139     if (t != 0)
0140         return 0;
0141     /* Finally check if the timing register is writable so that
0142        we eliminate any early devices hot-docked in a docking
0143        station */
0144     pci_write_config_word(dev, 0x40, 1);
0145     pci_read_config_word(dev, 0x40, &t);
0146     if (t) {
0147         pci_write_config_word(dev, 0x40, 0);
0148         return 0;
0149     }
0150     return 1;
0151 }
0152
0153 /**
0154  *  ata_generic_init_one        -   attach generic IDE
0155  *  @dev: PCI device found
0156  *  @id: match entry
0157  *
0158  *  Called each time a matching IDE interface is found. We check if the
0159  *  interface is one we wish to claim and if so we perform any chip
0160  *  specific hacks then let the ATA layer do the heavy lifting.
0161  */
0162
0163 static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
0164 {
0165     u16 command;
0166     static const struct ata_port_info info = {
0167         .flags = ATA_FLAG_SLAVE_POSS,
0168         .pio_mask = ATA_PIO4,
0169         .mwdma_mask = ATA_MWDMA2,
0170         .udma_mask = ATA_UDMA5,
0171         .port_ops = &generic_port_ops
0172     };
0173     const struct ata_port_info *ppi[] = { &info, NULL };
0174
0175     /* Don't use the generic entry unless instructed to do so */
0176     if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
0177         return -ENODEV;
0178
0179     if ((id->driver_data & ATA_GEN_INTEL_IDER) && !all_generic_ide)
0180         if (!is_intel_ider(dev))
0181             return -ENODEV;
0182
0183     /* Devices that need care */
0184     if (dev->vendor == PCI_VENDOR_ID_UMC &&
0185         dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
0186         (!(PCI_FUNC(dev->devfn) & 1)))
0187         return -ENODEV;
0188
0189     if (dev->vendor == PCI_VENDOR_ID_OPTI &&
0190         dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
0191         (!(PCI_FUNC(dev->devfn) & 1)))
0192         return -ENODEV;
0193
0194     /* Don't re-enable devices in generic mode or we will break some
0195        motherboards with disabled and unused IDE controllers */
0196     pci_read_config_word(dev, PCI_COMMAND, &command);
0197     if (!(command & PCI_COMMAND_IO))
0198         return -ENODEV;
0199
0200     if (dev->vendor == PCI_VENDOR_ID_AL)
0201         ata_pci_bmdma_clear_simplex(dev);
0202
0203     if (dev->vendor == PCI_VENDOR_ID_ATI) {
0204         int rc = pcim_enable_device(dev);
0205         if (rc < 0)
0206             return rc;
0207         pcim_pin_device(dev);
0208     }
0209     return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
0210 }
0211
0212 static struct pci_device_id ata_generic[] = {
0213     { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
0214     { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
0215     { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8673F), },
0216     { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886A), },
0217     { PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886BF), },
0218     { PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
0219     { PCI_DEVICE(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561), },
0220     { PCI_DEVICE(PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558), },
0221     { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
0222       .driver_data = ATA_GEN_FORCE_DMA },
0223 #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
0224     { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
0225     { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),  },
0226     { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3),  },
0227     { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5),  },
0228 #endif
0229     /* Intel, IDE class device */
0230     { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
0231       PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
0232       .driver_data = ATA_GEN_INTEL_IDER },
0233     /* Must come last. If you add entries adjust this table appropriately */
0234     { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
0235       .driver_data = ATA_GEN_CLASS_MATCH },
0236     { 0, },
0237 };
0238
0239 static struct pci_driver ata_generic_pci_driver = {
0240     .name       = DRV_NAME,
0241     .id_table   = ata_generic,
0242     .probe      = ata_generic_init_one,
0243     .remove     = ata_pci_remove_one,
0244 #ifdef CONFIG_PM_SLEEP
0245     .suspend    = ata_pci_device_suspend,
0246     .resume     = ata_pci_device_resume,
0247 #endif
0248 };
0249
0250 module_pci_driver(ata_generic_pci_driver);
0251
0252 MODULE_AUTHOR("Alan Cox");
0253 MODULE_DESCRIPTION("low-level driver for generic ATA");
0254 MODULE_LICENSE("GPL");
0255 MODULE_DEVICE_TABLE(pci, ata_generic);
0256 MODULE_VERSION(DRV_VERSION);
0257
0258 module_param(all_generic_ide, int, 0);