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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * processor_idle - idle state submodule to the ACPI processor driver
0004  *
0005  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
0006  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
0007  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
0008  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
0009  *              - Added processor hotplug support
0010  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
0011  *              - Added support for C3 on SMP
0012  */
0013 #define pr_fmt(fmt) "ACPI: " fmt
0014 
0015 #include <linux/module.h>
0016 #include <linux/acpi.h>
0017 #include <linux/dmi.h>
0018 #include <linux/sched.h>       /* need_resched() */
0019 #include <linux/sort.h>
0020 #include <linux/tick.h>
0021 #include <linux/cpuidle.h>
0022 #include <linux/cpu.h>
0023 #include <linux/minmax.h>
0024 #include <linux/perf_event.h>
0025 #include <acpi/processor.h>
0026 #include <linux/context_tracking.h>
0027 
0028 /*
0029  * Include the apic definitions for x86 to have the APIC timer related defines
0030  * available also for UP (on SMP it gets magically included via linux/smp.h).
0031  * asm/acpi.h is not an option, as it would require more include magic. Also
0032  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
0033  */
0034 #ifdef CONFIG_X86
0035 #include <asm/apic.h>
0036 #include <asm/cpu.h>
0037 #endif
0038 
0039 #define ACPI_IDLE_STATE_START   (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
0040 
0041 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
0042 module_param(max_cstate, uint, 0400);
0043 static bool nocst __read_mostly;
0044 module_param(nocst, bool, 0400);
0045 static bool bm_check_disable __read_mostly;
0046 module_param(bm_check_disable, bool, 0400);
0047 
0048 static unsigned int latency_factor __read_mostly = 2;
0049 module_param(latency_factor, uint, 0644);
0050 
0051 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
0052 
0053 struct cpuidle_driver acpi_idle_driver = {
0054     .name =     "acpi_idle",
0055     .owner =    THIS_MODULE,
0056 };
0057 
0058 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE
0059 static
0060 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
0061 
0062 static int disabled_by_idle_boot_param(void)
0063 {
0064     return boot_option_idle_override == IDLE_POLL ||
0065         boot_option_idle_override == IDLE_HALT;
0066 }
0067 
0068 /*
0069  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
0070  * For now disable this. Probably a bug somewhere else.
0071  *
0072  * To skip this limit, boot/load with a large max_cstate limit.
0073  */
0074 static int set_max_cstate(const struct dmi_system_id *id)
0075 {
0076     if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
0077         return 0;
0078 
0079     pr_notice("%s detected - limiting to C%ld max_cstate."
0080           " Override with \"processor.max_cstate=%d\"\n", id->ident,
0081           (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
0082 
0083     max_cstate = (long)id->driver_data;
0084 
0085     return 0;
0086 }
0087 
0088 static const struct dmi_system_id processor_power_dmi_table[] = {
0089     { set_max_cstate, "Clevo 5600D", {
0090       DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
0091       DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
0092      (void *)2},
0093     { set_max_cstate, "Pavilion zv5000", {
0094       DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
0095       DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
0096      (void *)1},
0097     { set_max_cstate, "Asus L8400B", {
0098       DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
0099       DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
0100      (void *)1},
0101     {},
0102 };
0103 
0104 
0105 /*
0106  * Callers should disable interrupts before the call and enable
0107  * interrupts after return.
0108  */
0109 static void __cpuidle acpi_safe_halt(void)
0110 {
0111     if (!tif_need_resched()) {
0112         safe_halt();
0113         local_irq_disable();
0114     }
0115 }
0116 
0117 #ifdef ARCH_APICTIMER_STOPS_ON_C3
0118 
0119 /*
0120  * Some BIOS implementations switch to C3 in the published C2 state.
0121  * This seems to be a common problem on AMD boxen, but other vendors
0122  * are affected too. We pick the most conservative approach: we assume
0123  * that the local APIC stops in both C2 and C3.
0124  */
0125 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
0126                    struct acpi_processor_cx *cx)
0127 {
0128     struct acpi_processor_power *pwr = &pr->power;
0129     u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
0130 
0131     if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
0132         return;
0133 
0134     if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
0135         type = ACPI_STATE_C1;
0136 
0137     /*
0138      * Check, if one of the previous states already marked the lapic
0139      * unstable
0140      */
0141     if (pwr->timer_broadcast_on_state < state)
0142         return;
0143 
0144     if (cx->type >= type)
0145         pr->power.timer_broadcast_on_state = state;
0146 }
0147 
0148 static void __lapic_timer_propagate_broadcast(void *arg)
0149 {
0150     struct acpi_processor *pr = (struct acpi_processor *) arg;
0151 
0152     if (pr->power.timer_broadcast_on_state < INT_MAX)
0153         tick_broadcast_enable();
0154     else
0155         tick_broadcast_disable();
0156 }
0157 
0158 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
0159 {
0160     smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
0161                  (void *)pr, 1);
0162 }
0163 
0164 /* Power(C) State timer broadcast control */
0165 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
0166                     struct acpi_processor_cx *cx)
0167 {
0168     return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
0169 }
0170 
0171 #else
0172 
0173 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
0174                    struct acpi_processor_cx *cstate) { }
0175 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
0176 
0177 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
0178                     struct acpi_processor_cx *cx)
0179 {
0180     return false;
0181 }
0182 
0183 #endif
0184 
0185 #if defined(CONFIG_X86)
0186 static void tsc_check_state(int state)
0187 {
0188     switch (boot_cpu_data.x86_vendor) {
0189     case X86_VENDOR_HYGON:
0190     case X86_VENDOR_AMD:
0191     case X86_VENDOR_INTEL:
0192     case X86_VENDOR_CENTAUR:
0193     case X86_VENDOR_ZHAOXIN:
0194         /*
0195          * AMD Fam10h TSC will tick in all
0196          * C/P/S0/S1 states when this bit is set.
0197          */
0198         if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
0199             return;
0200         fallthrough;
0201     default:
0202         /* TSC could halt in idle, so notify users */
0203         if (state > ACPI_STATE_C1)
0204             mark_tsc_unstable("TSC halts in idle");
0205     }
0206 }
0207 #else
0208 static void tsc_check_state(int state) { return; }
0209 #endif
0210 
0211 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
0212 {
0213 
0214     if (!pr->pblk)
0215         return -ENODEV;
0216 
0217     /* if info is obtained from pblk/fadt, type equals state */
0218     pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
0219     pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
0220 
0221 #ifndef CONFIG_HOTPLUG_CPU
0222     /*
0223      * Check for P_LVL2_UP flag before entering C2 and above on
0224      * an SMP system.
0225      */
0226     if ((num_online_cpus() > 1) &&
0227         !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
0228         return -ENODEV;
0229 #endif
0230 
0231     /* determine C2 and C3 address from pblk */
0232     pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
0233     pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
0234 
0235     /* determine latencies from FADT */
0236     pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
0237     pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
0238 
0239     /*
0240      * FADT specified C2 latency must be less than or equal to
0241      * 100 microseconds.
0242      */
0243     if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
0244         acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
0245                   acpi_gbl_FADT.c2_latency);
0246         /* invalidate C2 */
0247         pr->power.states[ACPI_STATE_C2].address = 0;
0248     }
0249 
0250     /*
0251      * FADT supplied C3 latency must be less than or equal to
0252      * 1000 microseconds.
0253      */
0254     if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
0255         acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
0256                   acpi_gbl_FADT.c3_latency);
0257         /* invalidate C3 */
0258         pr->power.states[ACPI_STATE_C3].address = 0;
0259     }
0260 
0261     acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
0262               pr->power.states[ACPI_STATE_C2].address,
0263               pr->power.states[ACPI_STATE_C3].address);
0264 
0265     snprintf(pr->power.states[ACPI_STATE_C2].desc,
0266              ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
0267              pr->power.states[ACPI_STATE_C2].address);
0268     snprintf(pr->power.states[ACPI_STATE_C3].desc,
0269              ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
0270              pr->power.states[ACPI_STATE_C3].address);
0271 
0272     return 0;
0273 }
0274 
0275 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
0276 {
0277     if (!pr->power.states[ACPI_STATE_C1].valid) {
0278         /* set the first C-State to C1 */
0279         /* all processors need to support C1 */
0280         pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
0281         pr->power.states[ACPI_STATE_C1].valid = 1;
0282         pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
0283 
0284         snprintf(pr->power.states[ACPI_STATE_C1].desc,
0285              ACPI_CX_DESC_LEN, "ACPI HLT");
0286     }
0287     /* the C0 state only exists as a filler in our array */
0288     pr->power.states[ACPI_STATE_C0].valid = 1;
0289     return 0;
0290 }
0291 
0292 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
0293 {
0294     int ret;
0295 
0296     if (nocst)
0297         return -ENODEV;
0298 
0299     ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
0300     if (ret)
0301         return ret;
0302 
0303     if (!pr->power.count)
0304         return -EFAULT;
0305 
0306     pr->flags.has_cst = 1;
0307     return 0;
0308 }
0309 
0310 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
0311                        struct acpi_processor_cx *cx)
0312 {
0313     static int bm_check_flag = -1;
0314     static int bm_control_flag = -1;
0315 
0316 
0317     if (!cx->address)
0318         return;
0319 
0320     /*
0321      * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
0322      * DMA transfers are used by any ISA device to avoid livelock.
0323      * Note that we could disable Type-F DMA (as recommended by
0324      * the erratum), but this is known to disrupt certain ISA
0325      * devices thus we take the conservative approach.
0326      */
0327     else if (errata.piix4.fdma) {
0328         acpi_handle_debug(pr->handle,
0329                   "C3 not supported on PIIX4 with Type-F DMA\n");
0330         return;
0331     }
0332 
0333     /* All the logic here assumes flags.bm_check is same across all CPUs */
0334     if (bm_check_flag == -1) {
0335         /* Determine whether bm_check is needed based on CPU  */
0336         acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
0337         bm_check_flag = pr->flags.bm_check;
0338         bm_control_flag = pr->flags.bm_control;
0339     } else {
0340         pr->flags.bm_check = bm_check_flag;
0341         pr->flags.bm_control = bm_control_flag;
0342     }
0343 
0344     if (pr->flags.bm_check) {
0345         if (!pr->flags.bm_control) {
0346             if (pr->flags.has_cst != 1) {
0347                 /* bus mastering control is necessary */
0348                 acpi_handle_debug(pr->handle,
0349                           "C3 support requires BM control\n");
0350                 return;
0351             } else {
0352                 /* Here we enter C3 without bus mastering */
0353                 acpi_handle_debug(pr->handle,
0354                           "C3 support without BM control\n");
0355             }
0356         }
0357     } else {
0358         /*
0359          * WBINVD should be set in fadt, for C3 state to be
0360          * supported on when bm_check is not required.
0361          */
0362         if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
0363             acpi_handle_debug(pr->handle,
0364                       "Cache invalidation should work properly"
0365                       " for C3 to be enabled on SMP systems\n");
0366             return;
0367         }
0368     }
0369 
0370     /*
0371      * Otherwise we've met all of our C3 requirements.
0372      * Normalize the C3 latency to expidite policy.  Enable
0373      * checking of bus mastering status (bm_check) so we can
0374      * use this in our C3 policy
0375      */
0376     cx->valid = 1;
0377 
0378     /*
0379      * On older chipsets, BM_RLD needs to be set
0380      * in order for Bus Master activity to wake the
0381      * system from C3.  Newer chipsets handle DMA
0382      * during C3 automatically and BM_RLD is a NOP.
0383      * In either case, the proper way to
0384      * handle BM_RLD is to set it and leave it set.
0385      */
0386     acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
0387 
0388     return;
0389 }
0390 
0391 static int acpi_cst_latency_cmp(const void *a, const void *b)
0392 {
0393     const struct acpi_processor_cx *x = a, *y = b;
0394 
0395     if (!(x->valid && y->valid))
0396         return 0;
0397     if (x->latency > y->latency)
0398         return 1;
0399     if (x->latency < y->latency)
0400         return -1;
0401     return 0;
0402 }
0403 static void acpi_cst_latency_swap(void *a, void *b, int n)
0404 {
0405     struct acpi_processor_cx *x = a, *y = b;
0406 
0407     if (!(x->valid && y->valid))
0408         return;
0409     swap(x->latency, y->latency);
0410 }
0411 
0412 static int acpi_processor_power_verify(struct acpi_processor *pr)
0413 {
0414     unsigned int i;
0415     unsigned int working = 0;
0416     unsigned int last_latency = 0;
0417     unsigned int last_type = 0;
0418     bool buggy_latency = false;
0419 
0420     pr->power.timer_broadcast_on_state = INT_MAX;
0421 
0422     for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
0423         struct acpi_processor_cx *cx = &pr->power.states[i];
0424 
0425         switch (cx->type) {
0426         case ACPI_STATE_C1:
0427             cx->valid = 1;
0428             break;
0429 
0430         case ACPI_STATE_C2:
0431             if (!cx->address)
0432                 break;
0433             cx->valid = 1;
0434             break;
0435 
0436         case ACPI_STATE_C3:
0437             acpi_processor_power_verify_c3(pr, cx);
0438             break;
0439         }
0440         if (!cx->valid)
0441             continue;
0442         if (cx->type >= last_type && cx->latency < last_latency)
0443             buggy_latency = true;
0444         last_latency = cx->latency;
0445         last_type = cx->type;
0446 
0447         lapic_timer_check_state(i, pr, cx);
0448         tsc_check_state(cx->type);
0449         working++;
0450     }
0451 
0452     if (buggy_latency) {
0453         pr_notice("FW issue: working around C-state latencies out of order\n");
0454         sort(&pr->power.states[1], max_cstate,
0455              sizeof(struct acpi_processor_cx),
0456              acpi_cst_latency_cmp,
0457              acpi_cst_latency_swap);
0458     }
0459 
0460     lapic_timer_propagate_broadcast(pr);
0461 
0462     return (working);
0463 }
0464 
0465 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
0466 {
0467     unsigned int i;
0468     int result;
0469 
0470 
0471     /* NOTE: the idle thread may not be running while calling
0472      * this function */
0473 
0474     /* Zero initialize all the C-states info. */
0475     memset(pr->power.states, 0, sizeof(pr->power.states));
0476 
0477     result = acpi_processor_get_power_info_cst(pr);
0478     if (result == -ENODEV)
0479         result = acpi_processor_get_power_info_fadt(pr);
0480 
0481     if (result)
0482         return result;
0483 
0484     acpi_processor_get_power_info_default(pr);
0485 
0486     pr->power.count = acpi_processor_power_verify(pr);
0487 
0488     /*
0489      * if one state of type C2 or C3 is available, mark this
0490      * CPU as being "idle manageable"
0491      */
0492     for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
0493         if (pr->power.states[i].valid) {
0494             pr->power.count = i;
0495             pr->flags.power = 1;
0496         }
0497     }
0498 
0499     return 0;
0500 }
0501 
0502 /**
0503  * acpi_idle_bm_check - checks if bus master activity was detected
0504  */
0505 static int acpi_idle_bm_check(void)
0506 {
0507     u32 bm_status = 0;
0508 
0509     if (bm_check_disable)
0510         return 0;
0511 
0512     acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
0513     if (bm_status)
0514         acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
0515     /*
0516      * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
0517      * the true state of bus mastering activity; forcing us to
0518      * manually check the BMIDEA bit of each IDE channel.
0519      */
0520     else if (errata.piix4.bmisx) {
0521         if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
0522             || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
0523             bm_status = 1;
0524     }
0525     return bm_status;
0526 }
0527 
0528 static void wait_for_freeze(void)
0529 {
0530 #ifdef  CONFIG_X86
0531     /* No delay is needed if we are in guest */
0532     if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
0533         return;
0534     /*
0535      * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
0536      * not this code.  Assume that any Intel systems using this
0537      * are ancient and may need the dummy wait.  This also assumes
0538      * that the motivating chipset issue was Intel-only.
0539      */
0540     if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
0541         return;
0542 #endif
0543     /*
0544      * Dummy wait op - must do something useless after P_LVL2 read
0545      * because chipsets cannot guarantee that STPCLK# signal gets
0546      * asserted in time to freeze execution properly
0547      *
0548      * This workaround has been in place since the original ACPI
0549      * implementation was merged, circa 2002.
0550      *
0551      * If a profile is pointing to this instruction, please first
0552      * consider moving your system to a more modern idle
0553      * mechanism.
0554      */
0555     inl(acpi_gbl_FADT.xpm_timer_block.address);
0556 }
0557 
0558 /**
0559  * acpi_idle_do_entry - enter idle state using the appropriate method
0560  * @cx: cstate data
0561  *
0562  * Caller disables interrupt before call and enables interrupt after return.
0563  */
0564 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
0565 {
0566     perf_lopwr_cb(true);
0567 
0568     if (cx->entry_method == ACPI_CSTATE_FFH) {
0569         /* Call into architectural FFH based C-state */
0570         acpi_processor_ffh_cstate_enter(cx);
0571     } else if (cx->entry_method == ACPI_CSTATE_HALT) {
0572         acpi_safe_halt();
0573     } else {
0574         /* IO port based C-state */
0575         inb(cx->address);
0576         wait_for_freeze();
0577     }
0578 
0579     perf_lopwr_cb(false);
0580 }
0581 
0582 /**
0583  * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
0584  * @dev: the target CPU
0585  * @index: the index of suggested state
0586  */
0587 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
0588 {
0589     struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
0590 
0591     ACPI_FLUSH_CPU_CACHE();
0592 
0593     while (1) {
0594 
0595         if (cx->entry_method == ACPI_CSTATE_HALT)
0596             safe_halt();
0597         else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
0598             inb(cx->address);
0599             wait_for_freeze();
0600         } else
0601             return -ENODEV;
0602 
0603 #if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU)
0604         cond_wakeup_cpu0();
0605 #endif
0606     }
0607 
0608     /* Never reached */
0609     return 0;
0610 }
0611 
0612 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
0613 {
0614     return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
0615         !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
0616 }
0617 
0618 static int c3_cpu_count;
0619 static DEFINE_RAW_SPINLOCK(c3_lock);
0620 
0621 /**
0622  * acpi_idle_enter_bm - enters C3 with proper BM handling
0623  * @drv: cpuidle driver
0624  * @pr: Target processor
0625  * @cx: Target state context
0626  * @index: index of target state
0627  */
0628 static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
0629                    struct acpi_processor *pr,
0630                    struct acpi_processor_cx *cx,
0631                    int index)
0632 {
0633     static struct acpi_processor_cx safe_cx = {
0634         .entry_method = ACPI_CSTATE_HALT,
0635     };
0636 
0637     /*
0638      * disable bus master
0639      * bm_check implies we need ARB_DIS
0640      * bm_control implies whether we can do ARB_DIS
0641      *
0642      * That leaves a case where bm_check is set and bm_control is not set.
0643      * In that case we cannot do much, we enter C3 without doing anything.
0644      */
0645     bool dis_bm = pr->flags.bm_control;
0646 
0647     /* If we can skip BM, demote to a safe state. */
0648     if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
0649         dis_bm = false;
0650         index = drv->safe_state_index;
0651         if (index >= 0) {
0652             cx = this_cpu_read(acpi_cstate[index]);
0653         } else {
0654             cx = &safe_cx;
0655             index = -EBUSY;
0656         }
0657     }
0658 
0659     if (dis_bm) {
0660         raw_spin_lock(&c3_lock);
0661         c3_cpu_count++;
0662         /* Disable bus master arbitration when all CPUs are in C3 */
0663         if (c3_cpu_count == num_online_cpus())
0664             acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
0665         raw_spin_unlock(&c3_lock);
0666     }
0667 
0668     ct_idle_enter();
0669 
0670     acpi_idle_do_entry(cx);
0671 
0672     ct_idle_exit();
0673 
0674     /* Re-enable bus master arbitration */
0675     if (dis_bm) {
0676         raw_spin_lock(&c3_lock);
0677         acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
0678         c3_cpu_count--;
0679         raw_spin_unlock(&c3_lock);
0680     }
0681 
0682     return index;
0683 }
0684 
0685 static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
0686                struct cpuidle_driver *drv, int index)
0687 {
0688     struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
0689     struct acpi_processor *pr;
0690 
0691     pr = __this_cpu_read(processors);
0692     if (unlikely(!pr))
0693         return -EINVAL;
0694 
0695     if (cx->type != ACPI_STATE_C1) {
0696         if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
0697             return acpi_idle_enter_bm(drv, pr, cx, index);
0698 
0699         /* C2 to C1 demotion. */
0700         if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
0701             index = ACPI_IDLE_STATE_START;
0702             cx = per_cpu(acpi_cstate[index], dev->cpu);
0703         }
0704     }
0705 
0706     if (cx->type == ACPI_STATE_C3)
0707         ACPI_FLUSH_CPU_CACHE();
0708 
0709     acpi_idle_do_entry(cx);
0710 
0711     return index;
0712 }
0713 
0714 static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
0715                   struct cpuidle_driver *drv, int index)
0716 {
0717     struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
0718 
0719     if (cx->type == ACPI_STATE_C3) {
0720         struct acpi_processor *pr = __this_cpu_read(processors);
0721 
0722         if (unlikely(!pr))
0723             return 0;
0724 
0725         if (pr->flags.bm_check) {
0726             u8 bm_sts_skip = cx->bm_sts_skip;
0727 
0728             /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
0729             cx->bm_sts_skip = 1;
0730             acpi_idle_enter_bm(drv, pr, cx, index);
0731             cx->bm_sts_skip = bm_sts_skip;
0732 
0733             return 0;
0734         } else {
0735             ACPI_FLUSH_CPU_CACHE();
0736         }
0737     }
0738     acpi_idle_do_entry(cx);
0739 
0740     return 0;
0741 }
0742 
0743 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
0744                        struct cpuidle_device *dev)
0745 {
0746     int i, count = ACPI_IDLE_STATE_START;
0747     struct acpi_processor_cx *cx;
0748     struct cpuidle_state *state;
0749 
0750     if (max_cstate == 0)
0751         max_cstate = 1;
0752 
0753     for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
0754         state = &acpi_idle_driver.states[count];
0755         cx = &pr->power.states[i];
0756 
0757         if (!cx->valid)
0758             continue;
0759 
0760         per_cpu(acpi_cstate[count], dev->cpu) = cx;
0761 
0762         if (lapic_timer_needs_broadcast(pr, cx))
0763             state->flags |= CPUIDLE_FLAG_TIMER_STOP;
0764 
0765         if (cx->type == ACPI_STATE_C3) {
0766             state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
0767             if (pr->flags.bm_check)
0768                 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
0769         }
0770 
0771         count++;
0772         if (count == CPUIDLE_STATE_MAX)
0773             break;
0774     }
0775 
0776     if (!count)
0777         return -EINVAL;
0778 
0779     return 0;
0780 }
0781 
0782 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
0783 {
0784     int i, count;
0785     struct acpi_processor_cx *cx;
0786     struct cpuidle_state *state;
0787     struct cpuidle_driver *drv = &acpi_idle_driver;
0788 
0789     if (max_cstate == 0)
0790         max_cstate = 1;
0791 
0792     if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
0793         cpuidle_poll_state_init(drv);
0794         count = 1;
0795     } else {
0796         count = 0;
0797     }
0798 
0799     for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
0800         cx = &pr->power.states[i];
0801 
0802         if (!cx->valid)
0803             continue;
0804 
0805         state = &drv->states[count];
0806         snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
0807         strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
0808         state->exit_latency = cx->latency;
0809         state->target_residency = cx->latency * latency_factor;
0810         state->enter = acpi_idle_enter;
0811 
0812         state->flags = 0;
0813         if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||
0814             cx->type == ACPI_STATE_C3) {
0815             state->enter_dead = acpi_idle_play_dead;
0816             if (cx->type != ACPI_STATE_C3)
0817                 drv->safe_state_index = count;
0818         }
0819         /*
0820          * Halt-induced C1 is not good for ->enter_s2idle, because it
0821          * re-enables interrupts on exit.  Moreover, C1 is generally not
0822          * particularly interesting from the suspend-to-idle angle, so
0823          * avoid C1 and the situations in which we may need to fall back
0824          * to it altogether.
0825          */
0826         if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
0827             state->enter_s2idle = acpi_idle_enter_s2idle;
0828 
0829         count++;
0830         if (count == CPUIDLE_STATE_MAX)
0831             break;
0832     }
0833 
0834     drv->state_count = count;
0835 
0836     if (!count)
0837         return -EINVAL;
0838 
0839     return 0;
0840 }
0841 
0842 static inline void acpi_processor_cstate_first_run_checks(void)
0843 {
0844     static int first_run;
0845 
0846     if (first_run)
0847         return;
0848     dmi_check_system(processor_power_dmi_table);
0849     max_cstate = acpi_processor_cstate_check(max_cstate);
0850     if (max_cstate < ACPI_C_STATES_MAX)
0851         pr_notice("processor limited to max C-state %d\n", max_cstate);
0852 
0853     first_run++;
0854 
0855     if (nocst)
0856         return;
0857 
0858     acpi_processor_claim_cst_control();
0859 }
0860 #else
0861 
0862 static inline int disabled_by_idle_boot_param(void) { return 0; }
0863 static inline void acpi_processor_cstate_first_run_checks(void) { }
0864 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
0865 {
0866     return -ENODEV;
0867 }
0868 
0869 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
0870                        struct cpuidle_device *dev)
0871 {
0872     return -EINVAL;
0873 }
0874 
0875 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
0876 {
0877     return -EINVAL;
0878 }
0879 
0880 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
0881 
0882 struct acpi_lpi_states_array {
0883     unsigned int size;
0884     unsigned int composite_states_size;
0885     struct acpi_lpi_state *entries;
0886     struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
0887 };
0888 
0889 static int obj_get_integer(union acpi_object *obj, u32 *value)
0890 {
0891     if (obj->type != ACPI_TYPE_INTEGER)
0892         return -EINVAL;
0893 
0894     *value = obj->integer.value;
0895     return 0;
0896 }
0897 
0898 static int acpi_processor_evaluate_lpi(acpi_handle handle,
0899                        struct acpi_lpi_states_array *info)
0900 {
0901     acpi_status status;
0902     int ret = 0;
0903     int pkg_count, state_idx = 1, loop;
0904     struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
0905     union acpi_object *lpi_data;
0906     struct acpi_lpi_state *lpi_state;
0907 
0908     status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
0909     if (ACPI_FAILURE(status)) {
0910         acpi_handle_debug(handle, "No _LPI, giving up\n");
0911         return -ENODEV;
0912     }
0913 
0914     lpi_data = buffer.pointer;
0915 
0916     /* There must be at least 4 elements = 3 elements + 1 package */
0917     if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
0918         lpi_data->package.count < 4) {
0919         pr_debug("not enough elements in _LPI\n");
0920         ret = -ENODATA;
0921         goto end;
0922     }
0923 
0924     pkg_count = lpi_data->package.elements[2].integer.value;
0925 
0926     /* Validate number of power states. */
0927     if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
0928         pr_debug("count given by _LPI is not valid\n");
0929         ret = -ENODATA;
0930         goto end;
0931     }
0932 
0933     lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
0934     if (!lpi_state) {
0935         ret = -ENOMEM;
0936         goto end;
0937     }
0938 
0939     info->size = pkg_count;
0940     info->entries = lpi_state;
0941 
0942     /* LPI States start at index 3 */
0943     for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
0944         union acpi_object *element, *pkg_elem, *obj;
0945 
0946         element = &lpi_data->package.elements[loop];
0947         if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
0948             continue;
0949 
0950         pkg_elem = element->package.elements;
0951 
0952         obj = pkg_elem + 6;
0953         if (obj->type == ACPI_TYPE_BUFFER) {
0954             struct acpi_power_register *reg;
0955 
0956             reg = (struct acpi_power_register *)obj->buffer.pointer;
0957             if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
0958                 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
0959                 continue;
0960 
0961             lpi_state->address = reg->address;
0962             lpi_state->entry_method =
0963                 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
0964                 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
0965         } else if (obj->type == ACPI_TYPE_INTEGER) {
0966             lpi_state->entry_method = ACPI_CSTATE_INTEGER;
0967             lpi_state->address = obj->integer.value;
0968         } else {
0969             continue;
0970         }
0971 
0972         /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
0973 
0974         obj = pkg_elem + 9;
0975         if (obj->type == ACPI_TYPE_STRING)
0976             strlcpy(lpi_state->desc, obj->string.pointer,
0977                 ACPI_CX_DESC_LEN);
0978 
0979         lpi_state->index = state_idx;
0980         if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
0981             pr_debug("No min. residency found, assuming 10 us\n");
0982             lpi_state->min_residency = 10;
0983         }
0984 
0985         if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
0986             pr_debug("No wakeup residency found, assuming 10 us\n");
0987             lpi_state->wake_latency = 10;
0988         }
0989 
0990         if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
0991             lpi_state->flags = 0;
0992 
0993         if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
0994             lpi_state->arch_flags = 0;
0995 
0996         if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
0997             lpi_state->res_cnt_freq = 1;
0998 
0999         if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
1000             lpi_state->enable_parent_state = 0;
1001     }
1002 
1003     acpi_handle_debug(handle, "Found %d power states\n", state_idx);
1004 end:
1005     kfree(buffer.pointer);
1006     return ret;
1007 }
1008 
1009 /*
1010  * flat_state_cnt - the number of composite LPI states after the process of flattening
1011  */
1012 static int flat_state_cnt;
1013 
1014 /**
1015  * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1016  *
1017  * @local: local LPI state
1018  * @parent: parent LPI state
1019  * @result: composite LPI state
1020  */
1021 static bool combine_lpi_states(struct acpi_lpi_state *local,
1022                    struct acpi_lpi_state *parent,
1023                    struct acpi_lpi_state *result)
1024 {
1025     if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1026         if (!parent->address) /* 0 means autopromotable */
1027             return false;
1028         result->address = local->address + parent->address;
1029     } else {
1030         result->address = parent->address;
1031     }
1032 
1033     result->min_residency = max(local->min_residency, parent->min_residency);
1034     result->wake_latency = local->wake_latency + parent->wake_latency;
1035     result->enable_parent_state = parent->enable_parent_state;
1036     result->entry_method = local->entry_method;
1037 
1038     result->flags = parent->flags;
1039     result->arch_flags = parent->arch_flags;
1040     result->index = parent->index;
1041 
1042     strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1043     strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1044     strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1045     return true;
1046 }
1047 
1048 #define ACPI_LPI_STATE_FLAGS_ENABLED            BIT(0)
1049 
1050 static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1051                   struct acpi_lpi_state *t)
1052 {
1053     curr_level->composite_states[curr_level->composite_states_size++] = t;
1054 }
1055 
1056 static int flatten_lpi_states(struct acpi_processor *pr,
1057                   struct acpi_lpi_states_array *curr_level,
1058                   struct acpi_lpi_states_array *prev_level)
1059 {
1060     int i, j, state_count = curr_level->size;
1061     struct acpi_lpi_state *p, *t = curr_level->entries;
1062 
1063     curr_level->composite_states_size = 0;
1064     for (j = 0; j < state_count; j++, t++) {
1065         struct acpi_lpi_state *flpi;
1066 
1067         if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1068             continue;
1069 
1070         if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1071             pr_warn("Limiting number of LPI states to max (%d)\n",
1072                 ACPI_PROCESSOR_MAX_POWER);
1073             pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1074             break;
1075         }
1076 
1077         flpi = &pr->power.lpi_states[flat_state_cnt];
1078 
1079         if (!prev_level) { /* leaf/processor node */
1080             memcpy(flpi, t, sizeof(*t));
1081             stash_composite_state(curr_level, flpi);
1082             flat_state_cnt++;
1083             continue;
1084         }
1085 
1086         for (i = 0; i < prev_level->composite_states_size; i++) {
1087             p = prev_level->composite_states[i];
1088             if (t->index <= p->enable_parent_state &&
1089                 combine_lpi_states(p, t, flpi)) {
1090                 stash_composite_state(curr_level, flpi);
1091                 flat_state_cnt++;
1092                 flpi++;
1093             }
1094         }
1095     }
1096 
1097     kfree(curr_level->entries);
1098     return 0;
1099 }
1100 
1101 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1102 {
1103     return -EOPNOTSUPP;
1104 }
1105 
1106 static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1107 {
1108     int ret, i;
1109     acpi_status status;
1110     acpi_handle handle = pr->handle, pr_ahandle;
1111     struct acpi_device *d = NULL;
1112     struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1113 
1114     /* make sure our architecture has support */
1115     ret = acpi_processor_ffh_lpi_probe(pr->id);
1116     if (ret == -EOPNOTSUPP)
1117         return ret;
1118 
1119     if (!osc_pc_lpi_support_confirmed)
1120         return -EOPNOTSUPP;
1121 
1122     if (!acpi_has_method(handle, "_LPI"))
1123         return -EINVAL;
1124 
1125     flat_state_cnt = 0;
1126     prev = &info[0];
1127     curr = &info[1];
1128     handle = pr->handle;
1129     ret = acpi_processor_evaluate_lpi(handle, prev);
1130     if (ret)
1131         return ret;
1132     flatten_lpi_states(pr, prev, NULL);
1133 
1134     status = acpi_get_parent(handle, &pr_ahandle);
1135     while (ACPI_SUCCESS(status)) {
1136         d = acpi_fetch_acpi_dev(pr_ahandle);
1137         handle = pr_ahandle;
1138 
1139         if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1140             break;
1141 
1142         /* can be optional ? */
1143         if (!acpi_has_method(handle, "_LPI"))
1144             break;
1145 
1146         ret = acpi_processor_evaluate_lpi(handle, curr);
1147         if (ret)
1148             break;
1149 
1150         /* flatten all the LPI states in this level of hierarchy */
1151         flatten_lpi_states(pr, curr, prev);
1152 
1153         tmp = prev, prev = curr, curr = tmp;
1154 
1155         status = acpi_get_parent(handle, &pr_ahandle);
1156     }
1157 
1158     pr->power.count = flat_state_cnt;
1159     /* reset the index after flattening */
1160     for (i = 0; i < pr->power.count; i++)
1161         pr->power.lpi_states[i].index = i;
1162 
1163     /* Tell driver that _LPI is supported. */
1164     pr->flags.has_lpi = 1;
1165     pr->flags.power = 1;
1166 
1167     return 0;
1168 }
1169 
1170 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1171 {
1172     return -ENODEV;
1173 }
1174 
1175 /**
1176  * acpi_idle_lpi_enter - enters an ACPI any LPI state
1177  * @dev: the target CPU
1178  * @drv: cpuidle driver containing cpuidle state info
1179  * @index: index of target state
1180  *
1181  * Return: 0 for success or negative value for error
1182  */
1183 static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1184                    struct cpuidle_driver *drv, int index)
1185 {
1186     struct acpi_processor *pr;
1187     struct acpi_lpi_state *lpi;
1188 
1189     pr = __this_cpu_read(processors);
1190 
1191     if (unlikely(!pr))
1192         return -EINVAL;
1193 
1194     lpi = &pr->power.lpi_states[index];
1195     if (lpi->entry_method == ACPI_CSTATE_FFH)
1196         return acpi_processor_ffh_lpi_enter(lpi);
1197 
1198     return -EINVAL;
1199 }
1200 
1201 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1202 {
1203     int i;
1204     struct acpi_lpi_state *lpi;
1205     struct cpuidle_state *state;
1206     struct cpuidle_driver *drv = &acpi_idle_driver;
1207 
1208     if (!pr->flags.has_lpi)
1209         return -EOPNOTSUPP;
1210 
1211     for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1212         lpi = &pr->power.lpi_states[i];
1213 
1214         state = &drv->states[i];
1215         snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1216         strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1217         state->exit_latency = lpi->wake_latency;
1218         state->target_residency = lpi->min_residency;
1219         if (lpi->arch_flags)
1220             state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1221         state->enter = acpi_idle_lpi_enter;
1222         drv->safe_state_index = i;
1223     }
1224 
1225     drv->state_count = i;
1226 
1227     return 0;
1228 }
1229 
1230 /**
1231  * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1232  * global state data i.e. idle routines
1233  *
1234  * @pr: the ACPI processor
1235  */
1236 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1237 {
1238     int i;
1239     struct cpuidle_driver *drv = &acpi_idle_driver;
1240 
1241     if (!pr->flags.power_setup_done || !pr->flags.power)
1242         return -EINVAL;
1243 
1244     drv->safe_state_index = -1;
1245     for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1246         drv->states[i].name[0] = '\0';
1247         drv->states[i].desc[0] = '\0';
1248     }
1249 
1250     if (pr->flags.has_lpi)
1251         return acpi_processor_setup_lpi_states(pr);
1252 
1253     return acpi_processor_setup_cstates(pr);
1254 }
1255 
1256 /**
1257  * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1258  * device i.e. per-cpu data
1259  *
1260  * @pr: the ACPI processor
1261  * @dev : the cpuidle device
1262  */
1263 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1264                         struct cpuidle_device *dev)
1265 {
1266     if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1267         return -EINVAL;
1268 
1269     dev->cpu = pr->id;
1270     if (pr->flags.has_lpi)
1271         return acpi_processor_ffh_lpi_probe(pr->id);
1272 
1273     return acpi_processor_setup_cpuidle_cx(pr, dev);
1274 }
1275 
1276 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1277 {
1278     int ret;
1279 
1280     ret = acpi_processor_get_lpi_info(pr);
1281     if (ret)
1282         ret = acpi_processor_get_cstate_info(pr);
1283 
1284     return ret;
1285 }
1286 
1287 int acpi_processor_hotplug(struct acpi_processor *pr)
1288 {
1289     int ret = 0;
1290     struct cpuidle_device *dev;
1291 
1292     if (disabled_by_idle_boot_param())
1293         return 0;
1294 
1295     if (!pr->flags.power_setup_done)
1296         return -ENODEV;
1297 
1298     dev = per_cpu(acpi_cpuidle_device, pr->id);
1299     cpuidle_pause_and_lock();
1300     cpuidle_disable_device(dev);
1301     ret = acpi_processor_get_power_info(pr);
1302     if (!ret && pr->flags.power) {
1303         acpi_processor_setup_cpuidle_dev(pr, dev);
1304         ret = cpuidle_enable_device(dev);
1305     }
1306     cpuidle_resume_and_unlock();
1307 
1308     return ret;
1309 }
1310 
1311 int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1312 {
1313     int cpu;
1314     struct acpi_processor *_pr;
1315     struct cpuidle_device *dev;
1316 
1317     if (disabled_by_idle_boot_param())
1318         return 0;
1319 
1320     if (!pr->flags.power_setup_done)
1321         return -ENODEV;
1322 
1323     /*
1324      * FIXME:  Design the ACPI notification to make it once per
1325      * system instead of once per-cpu.  This condition is a hack
1326      * to make the code that updates C-States be called once.
1327      */
1328 
1329     if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1330 
1331         /* Protect against cpu-hotplug */
1332         cpus_read_lock();
1333         cpuidle_pause_and_lock();
1334 
1335         /* Disable all cpuidle devices */
1336         for_each_online_cpu(cpu) {
1337             _pr = per_cpu(processors, cpu);
1338             if (!_pr || !_pr->flags.power_setup_done)
1339                 continue;
1340             dev = per_cpu(acpi_cpuidle_device, cpu);
1341             cpuidle_disable_device(dev);
1342         }
1343 
1344         /* Populate Updated C-state information */
1345         acpi_processor_get_power_info(pr);
1346         acpi_processor_setup_cpuidle_states(pr);
1347 
1348         /* Enable all cpuidle devices */
1349         for_each_online_cpu(cpu) {
1350             _pr = per_cpu(processors, cpu);
1351             if (!_pr || !_pr->flags.power_setup_done)
1352                 continue;
1353             acpi_processor_get_power_info(_pr);
1354             if (_pr->flags.power) {
1355                 dev = per_cpu(acpi_cpuidle_device, cpu);
1356                 acpi_processor_setup_cpuidle_dev(_pr, dev);
1357                 cpuidle_enable_device(dev);
1358             }
1359         }
1360         cpuidle_resume_and_unlock();
1361         cpus_read_unlock();
1362     }
1363 
1364     return 0;
1365 }
1366 
1367 static int acpi_processor_registered;
1368 
1369 int acpi_processor_power_init(struct acpi_processor *pr)
1370 {
1371     int retval;
1372     struct cpuidle_device *dev;
1373 
1374     if (disabled_by_idle_boot_param())
1375         return 0;
1376 
1377     acpi_processor_cstate_first_run_checks();
1378 
1379     if (!acpi_processor_get_power_info(pr))
1380         pr->flags.power_setup_done = 1;
1381 
1382     /*
1383      * Install the idle handler if processor power management is supported.
1384      * Note that we use previously set idle handler will be used on
1385      * platforms that only support C1.
1386      */
1387     if (pr->flags.power) {
1388         /* Register acpi_idle_driver if not already registered */
1389         if (!acpi_processor_registered) {
1390             acpi_processor_setup_cpuidle_states(pr);
1391             retval = cpuidle_register_driver(&acpi_idle_driver);
1392             if (retval)
1393                 return retval;
1394             pr_debug("%s registered with cpuidle\n",
1395                  acpi_idle_driver.name);
1396         }
1397 
1398         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1399         if (!dev)
1400             return -ENOMEM;
1401         per_cpu(acpi_cpuidle_device, pr->id) = dev;
1402 
1403         acpi_processor_setup_cpuidle_dev(pr, dev);
1404 
1405         /* Register per-cpu cpuidle_device. Cpuidle driver
1406          * must already be registered before registering device
1407          */
1408         retval = cpuidle_register_device(dev);
1409         if (retval) {
1410             if (acpi_processor_registered == 0)
1411                 cpuidle_unregister_driver(&acpi_idle_driver);
1412             return retval;
1413         }
1414         acpi_processor_registered++;
1415     }
1416     return 0;
1417 }
1418 
1419 int acpi_processor_power_exit(struct acpi_processor *pr)
1420 {
1421     struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1422 
1423     if (disabled_by_idle_boot_param())
1424         return 0;
1425 
1426     if (pr->flags.power) {
1427         cpuidle_unregister_device(dev);
1428         acpi_processor_registered--;
1429         if (acpi_processor_registered == 0)
1430             cpuidle_unregister_driver(&acpi_idle_driver);
1431     }
1432 
1433     pr->flags.power_setup_done = 0;
1434     return 0;
1435 }
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