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0007 #ifndef __NFIT_H__
0008 #define __NFIT_H__
0009 #include <linux/workqueue.h>
0010 #include <linux/libnvdimm.h>
0011 #include <linux/ndctl.h>
0012 #include <linux/types.h>
0013 #include <linux/acpi.h>
0014 #include <acpi/acuuid.h>
0015
0016
0017 #define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
0018
0019
0020 #define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
0021 #define UUID_INTEL_BUS "c7d8acd4-2df8-4b82-9f65-a325335af149"
0022
0023
0024 #define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
0025 #define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
0026
0027
0028 #define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
0029
0030
0031 #define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"
0032
0033 #define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
0034 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
0035 | ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)
0036
0037 #define NVDIMM_CMD_MAX 31
0038
0039 #define NVDIMM_STANDARD_CMDMASK \
0040 (1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
0041 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
0042 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
0043 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)
0044
0045
0046
0047
0048
0049 enum nvdimm_family_cmds {
0050 NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
0051 NVDIMM_INTEL_GET_MODES = 11,
0052 NVDIMM_INTEL_GET_FWINFO = 12,
0053 NVDIMM_INTEL_START_FWUPDATE = 13,
0054 NVDIMM_INTEL_SEND_FWUPDATE = 14,
0055 NVDIMM_INTEL_FINISH_FWUPDATE = 15,
0056 NVDIMM_INTEL_QUERY_FWUPDATE = 16,
0057 NVDIMM_INTEL_SET_THRESHOLD = 17,
0058 NVDIMM_INTEL_INJECT_ERROR = 18,
0059 NVDIMM_INTEL_GET_SECURITY_STATE = 19,
0060 NVDIMM_INTEL_SET_PASSPHRASE = 20,
0061 NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
0062 NVDIMM_INTEL_UNLOCK_UNIT = 22,
0063 NVDIMM_INTEL_FREEZE_LOCK = 23,
0064 NVDIMM_INTEL_SECURE_ERASE = 24,
0065 NVDIMM_INTEL_OVERWRITE = 25,
0066 NVDIMM_INTEL_QUERY_OVERWRITE = 26,
0067 NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
0068 NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
0069 NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO = 29,
0070 NVDIMM_INTEL_FW_ACTIVATE_ARM = 30,
0071 };
0072
0073 enum nvdimm_bus_family_cmds {
0074 NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO = 1,
0075 NVDIMM_BUS_INTEL_FW_ACTIVATE = 2,
0076 };
0077
0078 #define NVDIMM_INTEL_SECURITY_CMDMASK \
0079 (1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
0080 | 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
0081 | 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
0082 | 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
0083 | 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
0084 | 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
0085
0086 #define NVDIMM_INTEL_FW_ACTIVATE_CMDMASK \
0087 (1 << NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO | 1 << NVDIMM_INTEL_FW_ACTIVATE_ARM)
0088
0089 #define NVDIMM_BUS_INTEL_FW_ACTIVATE_CMDMASK \
0090 (1 << NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO | 1 << NVDIMM_BUS_INTEL_FW_ACTIVATE)
0091
0092 #define NVDIMM_INTEL_CMDMASK \
0093 (NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
0094 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
0095 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
0096 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
0097 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
0098 | NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
0099
0100 #define NVDIMM_INTEL_DENY_CMDMASK \
0101 (NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
0102
0103 enum nfit_uuids {
0104
0105 NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
0106 NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
0107 NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
0108 NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
0109 NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
0110
0111
0112
0113
0114 NFIT_BUS_INTEL = NVDIMM_FAMILY_MAX + NVDIMM_BUS_FAMILY_INTEL,
0115 NFIT_SPA_VOLATILE,
0116 NFIT_SPA_PM,
0117 NFIT_SPA_DCR,
0118 NFIT_SPA_BDW,
0119 NFIT_SPA_VDISK,
0120 NFIT_SPA_VCD,
0121 NFIT_SPA_PDISK,
0122 NFIT_SPA_PCD,
0123 NFIT_DEV_BUS,
0124 NFIT_UUID_MAX,
0125 };
0126
0127
0128
0129
0130
0131 #define NFIT_FIC_BYTE cpu_to_le16(0x101)
0132 #define NFIT_FIC_BLK cpu_to_le16(0x201)
0133 #define NFIT_FIC_BYTEN cpu_to_le16(0x301)
0134
0135 enum {
0136 NFIT_BLK_READ_FLUSH = 1,
0137 NFIT_BLK_DCR_LATCH = 2,
0138 NFIT_ARS_STATUS_DONE = 0,
0139 NFIT_ARS_STATUS_BUSY = 1 << 16,
0140 NFIT_ARS_STATUS_NONE = 2 << 16,
0141 NFIT_ARS_STATUS_INTR = 3 << 16,
0142 NFIT_ARS_START_BUSY = 6,
0143 NFIT_ARS_CAP_NONE = 1,
0144 NFIT_ARS_F_OVERFLOW = 1,
0145 NFIT_ARS_TIMEOUT = 90,
0146 };
0147
0148 enum nfit_root_notifiers {
0149 NFIT_NOTIFY_UPDATE = 0x80,
0150 NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
0151 };
0152
0153 enum nfit_dimm_notifiers {
0154 NFIT_NOTIFY_DIMM_HEALTH = 0x81,
0155 };
0156
0157 enum nfit_ars_state {
0158 ARS_REQ_SHORT,
0159 ARS_REQ_LONG,
0160 ARS_FAILED,
0161 };
0162
0163 struct nfit_spa {
0164 struct list_head list;
0165 struct nd_region *nd_region;
0166 unsigned long ars_state;
0167 u32 clear_err_unit;
0168 u32 max_ars;
0169 struct acpi_nfit_system_address spa[];
0170 };
0171
0172 struct nfit_dcr {
0173 struct list_head list;
0174 struct acpi_nfit_control_region dcr[];
0175 };
0176
0177 struct nfit_bdw {
0178 struct list_head list;
0179 struct acpi_nfit_data_region bdw[];
0180 };
0181
0182 struct nfit_idt {
0183 struct list_head list;
0184 struct acpi_nfit_interleave idt[];
0185 };
0186
0187 struct nfit_flush {
0188 struct list_head list;
0189 struct acpi_nfit_flush_address flush[];
0190 };
0191
0192 struct nfit_memdev {
0193 struct list_head list;
0194 struct acpi_nfit_memory_map memdev[];
0195 };
0196
0197 enum nfit_mem_flags {
0198 NFIT_MEM_LSR,
0199 NFIT_MEM_LSW,
0200 NFIT_MEM_DIRTY,
0201 NFIT_MEM_DIRTY_COUNT,
0202 };
0203
0204 #define NFIT_DIMM_ID_LEN 22
0205
0206
0207 struct nfit_mem {
0208 struct nvdimm *nvdimm;
0209 struct acpi_nfit_memory_map *memdev_dcr;
0210 struct acpi_nfit_memory_map *memdev_pmem;
0211 struct acpi_nfit_control_region *dcr;
0212 struct acpi_nfit_system_address *spa_dcr;
0213 struct acpi_nfit_interleave *idt_dcr;
0214 struct kernfs_node *flags_attr;
0215 struct nfit_flush *nfit_flush;
0216 struct list_head list;
0217 struct acpi_device *adev;
0218 struct acpi_nfit_desc *acpi_desc;
0219 enum nvdimm_fwa_state fwa_state;
0220 enum nvdimm_fwa_result fwa_result;
0221 int fwa_count;
0222 char id[NFIT_DIMM_ID_LEN+1];
0223 struct resource *flush_wpq;
0224 unsigned long dsm_mask;
0225 unsigned long flags;
0226 u32 dirty_shutdown;
0227 int family;
0228 };
0229
0230 enum scrub_flags {
0231 ARS_BUSY,
0232 ARS_CANCEL,
0233 ARS_VALID,
0234 ARS_POLL,
0235 };
0236
0237 struct acpi_nfit_desc {
0238 struct nvdimm_bus_descriptor nd_desc;
0239 struct acpi_table_header acpi_header;
0240 struct mutex init_mutex;
0241 struct list_head memdevs;
0242 struct list_head flushes;
0243 struct list_head dimms;
0244 struct list_head spas;
0245 struct list_head dcrs;
0246 struct list_head bdws;
0247 struct list_head idts;
0248 struct nvdimm_bus *nvdimm_bus;
0249 struct device *dev;
0250 struct nd_cmd_ars_status *ars_status;
0251 struct nfit_spa *scrub_spa;
0252 struct delayed_work dwork;
0253 struct list_head list;
0254 struct kernfs_node *scrub_count_state;
0255 unsigned int max_ars;
0256 unsigned int scrub_count;
0257 unsigned int scrub_mode;
0258 unsigned long scrub_flags;
0259 unsigned long dimm_cmd_force_en;
0260 unsigned long bus_cmd_force_en;
0261 unsigned long bus_dsm_mask;
0262 unsigned long family_dsm_mask[NVDIMM_BUS_FAMILY_MAX + 1];
0263 unsigned int platform_cap;
0264 unsigned int scrub_tmo;
0265 enum nvdimm_fwa_state fwa_state;
0266 enum nvdimm_fwa_capability fwa_cap;
0267 int fwa_count;
0268 bool fwa_noidle;
0269 bool fwa_nosuspend;
0270 };
0271
0272 enum scrub_mode {
0273 HW_ERROR_SCRUB_OFF,
0274 HW_ERROR_SCRUB_ON,
0275 };
0276
0277 enum nd_blk_mmio_selector {
0278 BDW,
0279 DCR,
0280 };
0281
0282 struct nd_blk_addr {
0283 union {
0284 void __iomem *base;
0285 void *aperture;
0286 };
0287 };
0288
0289 struct nfit_blk {
0290 struct nfit_blk_mmio {
0291 struct nd_blk_addr addr;
0292 u64 size;
0293 u64 base_offset;
0294 u32 line_size;
0295 u32 num_lines;
0296 u32 table_size;
0297 struct acpi_nfit_interleave *idt;
0298 struct acpi_nfit_system_address *spa;
0299 } mmio[2];
0300 struct nd_region *nd_region;
0301 u64 bdw_offset;
0302 u64 stat_offset;
0303 u64 cmd_offset;
0304 u32 dimm_flags;
0305 };
0306
0307 extern struct list_head acpi_descs;
0308 extern struct mutex acpi_desc_lock;
0309 int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
0310 enum nfit_ars_state req_type);
0311
0312 #ifdef CONFIG_X86_MCE
0313 void nfit_mce_register(void);
0314 void nfit_mce_unregister(void);
0315 #else
0316 static inline void nfit_mce_register(void)
0317 {
0318 }
0319 static inline void nfit_mce_unregister(void)
0320 {
0321 }
0322 #endif
0323
0324 int nfit_spa_type(struct acpi_nfit_system_address *spa);
0325
0326 static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
0327 struct nfit_mem *nfit_mem)
0328 {
0329 if (nfit_mem->memdev_dcr)
0330 return nfit_mem->memdev_dcr;
0331 return nfit_mem->memdev_pmem;
0332 }
0333
0334 static inline struct acpi_nfit_desc *to_acpi_desc(
0335 struct nvdimm_bus_descriptor *nd_desc)
0336 {
0337 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
0338 }
0339
0340 const guid_t *to_nfit_uuid(enum nfit_uuids id);
0341 int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
0342 void acpi_nfit_shutdown(void *data);
0343 void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
0344 void __acpi_nvdimm_notify(struct device *dev, u32 event);
0345 int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
0346 unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
0347 void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
0348 bool intel_fwa_supported(struct nvdimm_bus *nvdimm_bus);
0349 extern struct device_attribute dev_attr_firmware_activate_noidle;
0350 #endif