Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright(c) 2018 Intel Corporation. All rights reserved.
0004  * Intel specific definitions for NVDIMM Firmware Interface Table - NFIT
0005  */
0006 #ifndef _NFIT_INTEL_H_
0007 #define _NFIT_INTEL_H_
0008 
0009 #define ND_INTEL_SMART 1
0010 
0011 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
0012 #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
0013 
0014 struct nd_intel_smart {
0015     u32 status;
0016     union {
0017         struct {
0018             u32 flags;
0019             u8 reserved0[4];
0020             u8 health;
0021             u8 spares;
0022             u8 life_used;
0023             u8 alarm_flags;
0024             u16 media_temperature;
0025             u16 ctrl_temperature;
0026             u32 shutdown_count;
0027             u8 ait_status;
0028             u16 pmic_temperature;
0029             u8 reserved1[8];
0030             u8 shutdown_state;
0031             u32 vendor_size;
0032             u8 vendor_data[92];
0033         } __packed;
0034         u8 data[128];
0035     };
0036 } __packed;
0037 
0038 extern const struct nvdimm_security_ops *intel_security_ops;
0039 
0040 #define ND_INTEL_STATUS_SIZE        4
0041 #define ND_INTEL_PASSPHRASE_SIZE    32
0042 
0043 #define ND_INTEL_STATUS_NOT_SUPPORTED   1
0044 #define ND_INTEL_STATUS_RETRY       5
0045 #define ND_INTEL_STATUS_NOT_READY   9
0046 #define ND_INTEL_STATUS_INVALID_STATE   10
0047 #define ND_INTEL_STATUS_INVALID_PASS    11
0048 #define ND_INTEL_STATUS_OVERWRITE_UNSUPPORTED   0x10007
0049 #define ND_INTEL_STATUS_OQUERY_INPROGRESS   0x10007
0050 #define ND_INTEL_STATUS_OQUERY_SEQUENCE_ERR 0x20007
0051 
0052 #define ND_INTEL_SEC_STATE_ENABLED  0x02
0053 #define ND_INTEL_SEC_STATE_LOCKED   0x04
0054 #define ND_INTEL_SEC_STATE_FROZEN   0x08
0055 #define ND_INTEL_SEC_STATE_PLIMIT   0x10
0056 #define ND_INTEL_SEC_STATE_UNSUPPORTED  0x20
0057 #define ND_INTEL_SEC_STATE_OVERWRITE    0x40
0058 
0059 #define ND_INTEL_SEC_ESTATE_ENABLED 0x01
0060 #define ND_INTEL_SEC_ESTATE_PLIMIT  0x02
0061 
0062 struct nd_intel_get_security_state {
0063     u32 status;
0064     u8 extended_state;
0065     u8 reserved[3];
0066     u8 state;
0067     u8 reserved1[3];
0068 } __packed;
0069 
0070 struct nd_intel_set_passphrase {
0071     u8 old_pass[ND_INTEL_PASSPHRASE_SIZE];
0072     u8 new_pass[ND_INTEL_PASSPHRASE_SIZE];
0073     u32 status;
0074 } __packed;
0075 
0076 struct nd_intel_unlock_unit {
0077     u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];
0078     u32 status;
0079 } __packed;
0080 
0081 struct nd_intel_disable_passphrase {
0082     u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];
0083     u32 status;
0084 } __packed;
0085 
0086 struct nd_intel_freeze_lock {
0087     u32 status;
0088 } __packed;
0089 
0090 struct nd_intel_secure_erase {
0091     u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];
0092     u32 status;
0093 } __packed;
0094 
0095 struct nd_intel_overwrite {
0096     u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];
0097     u32 status;
0098 } __packed;
0099 
0100 struct nd_intel_query_overwrite {
0101     u32 status;
0102 } __packed;
0103 
0104 struct nd_intel_set_master_passphrase {
0105     u8 old_pass[ND_INTEL_PASSPHRASE_SIZE];
0106     u8 new_pass[ND_INTEL_PASSPHRASE_SIZE];
0107     u32 status;
0108 } __packed;
0109 
0110 struct nd_intel_master_secure_erase {
0111     u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];
0112     u32 status;
0113 } __packed;
0114 
0115 #define ND_INTEL_FWA_IDLE 0
0116 #define ND_INTEL_FWA_ARMED 1
0117 #define ND_INTEL_FWA_BUSY 2
0118 
0119 #define ND_INTEL_DIMM_FWA_NONE 0
0120 #define ND_INTEL_DIMM_FWA_NOTSTAGED 1
0121 #define ND_INTEL_DIMM_FWA_SUCCESS 2
0122 #define ND_INTEL_DIMM_FWA_NEEDRESET 3
0123 #define ND_INTEL_DIMM_FWA_MEDIAFAILED 4
0124 #define ND_INTEL_DIMM_FWA_ABORT 5
0125 #define ND_INTEL_DIMM_FWA_NOTSUPP 6
0126 #define ND_INTEL_DIMM_FWA_ERROR 7
0127 
0128 struct nd_intel_fw_activate_dimminfo {
0129     u32 status;
0130     u16 result;
0131     u8 state;
0132     u8 reserved[7];
0133 } __packed;
0134 
0135 #define ND_INTEL_DIMM_FWA_ARM 1
0136 #define ND_INTEL_DIMM_FWA_DISARM 0
0137 
0138 struct nd_intel_fw_activate_arm {
0139     u8 activate_arm;
0140     u32 status;
0141 } __packed;
0142 
0143 /* Root device command payloads */
0144 #define ND_INTEL_BUS_FWA_CAP_FWQUIESCE (1 << 0)
0145 #define ND_INTEL_BUS_FWA_CAP_OSQUIESCE (1 << 1)
0146 #define ND_INTEL_BUS_FWA_CAP_RESET     (1 << 2)
0147 
0148 struct nd_intel_bus_fw_activate_businfo {
0149     u32 status;
0150     u16 reserved;
0151     u8 state;
0152     u8 capability;
0153     u64 activate_tmo;
0154     u64 cpu_quiesce_tmo;
0155     u64 io_quiesce_tmo;
0156     u64 max_quiesce_tmo;
0157 } __packed;
0158 
0159 #define ND_INTEL_BUS_FWA_STATUS_NOARM  (6 | 1 << 16)
0160 #define ND_INTEL_BUS_FWA_STATUS_BUSY   (6 | 2 << 16)
0161 #define ND_INTEL_BUS_FWA_STATUS_NOFW   (6 | 3 << 16)
0162 #define ND_INTEL_BUS_FWA_STATUS_TMO    (6 | 4 << 16)
0163 #define ND_INTEL_BUS_FWA_STATUS_NOIDLE (6 | 5 << 16)
0164 #define ND_INTEL_BUS_FWA_STATUS_ABORT  (6 | 6 << 16)
0165 
0166 #define ND_INTEL_BUS_FWA_IODEV_FORCE_IDLE (0)
0167 #define ND_INTEL_BUS_FWA_IODEV_OS_IDLE (1)
0168 struct nd_intel_bus_fw_activate {
0169     u8 iodev_state;
0170     u32 status;
0171 } __packed;
0172 
0173 extern const struct nvdimm_fw_ops *intel_fw_ops;
0174 extern const struct nvdimm_bus_fw_ops *intel_bus_fw_ops;
0175 #endif