um/asm/barrier.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _ASM_UM_BARRIER_H_
0003 #define _ASM_UM_BARRIER_H_
0004
0005 #include <asm/cpufeatures.h>
0006 #include <asm/alternative.h>
0007
0008 /*
0009  * Force strict CPU ordering.
0010  * And yes, this is required on UP too when we're talking
0011  * to devices.
0012  */
0013 #ifdef CONFIG_X86_32
0014
0015 #define mb()    alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
0016 #define rmb()   alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
0017 #define wmb()   alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
0018
0019 #else /* CONFIG_X86_32 */
0020
0021 #define mb()    asm volatile("mfence" : : : "memory")
0022 #define rmb()   asm volatile("lfence" : : : "memory")
0023 #define wmb()   asm volatile("sfence" : : : "memory")
0024
0025 #endif /* CONFIG_X86_32 */
0026
0027 #include <asm-generic/barrier.h>
0028
0029 #endif