0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * CE4100 on Falcon Falls
0004 *
0005 * (c) Copyright 2010 Intel Corporation
0006 */
0007 /dts-v1/;
0008 / {
0009 model = "intel,falconfalls";
0010 compatible = "intel,falconfalls";
0011 #address-cells = <1>;
0012 #size-cells = <1>;
0013
0014 cpus {
0015 #address-cells = <1>;
0016 #size-cells = <0>;
0017
0018 cpu@0 {
0019 device_type = "cpu";
0020 compatible = "intel,ce4100";
0021 reg = <0>;
0022 lapic = <&lapic0>;
0023 };
0024 };
0025
0026 soc@0 {
0027 #address-cells = <1>;
0028 #size-cells = <1>;
0029 compatible = "intel,ce4100-cp";
0030 ranges;
0031
0032 ioapic1: interrupt-controller@fec00000 {
0033 #interrupt-cells = <2>;
0034 compatible = "intel,ce4100-ioapic";
0035 interrupt-controller;
0036 reg = <0xfec00000 0x1000>;
0037 };
0038
0039 timer@fed00000 {
0040 compatible = "intel,ce4100-hpet";
0041 reg = <0xfed00000 0x200>;
0042 };
0043
0044 lapic0: interrupt-controller@fee00000 {
0045 compatible = "intel,ce4100-lapic";
0046 reg = <0xfee00000 0x1000>;
0047 };
0048
0049 pci@3fc {
0050 #address-cells = <3>;
0051 #size-cells = <2>;
0052 compatible = "intel,ce4100-pci", "pci";
0053 device_type = "pci";
0054 bus-range = <0 0>;
0055 ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
0056 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
0057 0x0000000 0 0x0 0x0 0 0x100>;
0058
0059 /* Secondary IO-APIC */
0060 ioapic2: interrupt-controller@0,1 {
0061 #interrupt-cells = <2>;
0062 compatible = "intel,ce4100-ioapic";
0063 interrupt-controller;
0064 reg = <0x100 0x0 0x0 0x0 0x0>;
0065 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
0066 };
0067
0068 pci@1,0 {
0069 #address-cells = <3>;
0070 #size-cells = <2>;
0071 compatible = "intel,ce4100-pci", "pci";
0072 device_type = "pci";
0073 bus-range = <1 1>;
0074 reg = <0x0800 0x0 0x0 0x0 0x0>;
0075 ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
0076
0077 interrupt-parent = <&ioapic2>;
0078
0079 display@2,0 {
0080 compatible = "pci8086,2e5b.2",
0081 "pci8086,2e5b",
0082 "pciclass038000",
0083 "pciclass0380";
0084
0085 reg = <0x11000 0x0 0x0 0x0 0x0>;
0086 interrupts = <0 1>;
0087 };
0088
0089 multimedia@3,0 {
0090 compatible = "pci8086,2e5c.2",
0091 "pci8086,2e5c",
0092 "pciclass048000",
0093 "pciclass0480";
0094
0095 reg = <0x11800 0x0 0x0 0x0 0x0>;
0096 interrupts = <2 1>;
0097 };
0098
0099 multimedia@4,0 {
0100 compatible = "pci8086,2e5d.2",
0101 "pci8086,2e5d",
0102 "pciclass048000",
0103 "pciclass0480";
0104
0105 reg = <0x12000 0x0 0x0 0x0 0x0>;
0106 interrupts = <4 1>;
0107 };
0108
0109 multimedia@4,1 {
0110 compatible = "pci8086,2e5e.2",
0111 "pci8086,2e5e",
0112 "pciclass048000",
0113 "pciclass0480";
0114
0115 reg = <0x12100 0x0 0x0 0x0 0x0>;
0116 interrupts = <5 1>;
0117 };
0118
0119 sound@6,0 {
0120 compatible = "pci8086,2e5f.2",
0121 "pci8086,2e5f",
0122 "pciclass040100",
0123 "pciclass0401";
0124
0125 reg = <0x13000 0x0 0x0 0x0 0x0>;
0126 interrupts = <6 1>;
0127 };
0128
0129 sound@6,1 {
0130 compatible = "pci8086,2e5f.2",
0131 "pci8086,2e5f",
0132 "pciclass040100",
0133 "pciclass0401";
0134
0135 reg = <0x13100 0x0 0x0 0x0 0x0>;
0136 interrupts = <7 1>;
0137 };
0138
0139 sound@6,2 {
0140 compatible = "pci8086,2e60.2",
0141 "pci8086,2e60",
0142 "pciclass040100",
0143 "pciclass0401";
0144
0145 reg = <0x13200 0x0 0x0 0x0 0x0>;
0146 interrupts = <8 1>;
0147 };
0148
0149 display@8,0 {
0150 compatible = "pci8086,2e61.2",
0151 "pci8086,2e61",
0152 "pciclass038000",
0153 "pciclass0380";
0154
0155 reg = <0x14000 0x0 0x0 0x0 0x0>;
0156 interrupts = <9 1>;
0157 };
0158
0159 display@8,1 {
0160 compatible = "pci8086,2e62.2",
0161 "pci8086,2e62",
0162 "pciclass038000",
0163 "pciclass0380";
0164
0165 reg = <0x14100 0x0 0x0 0x0 0x0>;
0166 interrupts = <10 1>;
0167 };
0168
0169 multimedia@8,2 {
0170 compatible = "pci8086,2e63.2",
0171 "pci8086,2e63",
0172 "pciclass048000",
0173 "pciclass0480";
0174
0175 reg = <0x14200 0x0 0x0 0x0 0x0>;
0176 interrupts = <11 1>;
0177 };
0178
0179 entertainment-encryption@9,0 {
0180 compatible = "pci8086,2e64.2",
0181 "pci8086,2e64",
0182 "pciclass101000",
0183 "pciclass1010";
0184
0185 reg = <0x14800 0x0 0x0 0x0 0x0>;
0186 interrupts = <12 1>;
0187 };
0188
0189 localbus@a,0 {
0190 compatible = "pci8086,2e65.2",
0191 "pci8086,2e65",
0192 "pciclassff0000",
0193 "pciclassff00";
0194
0195 reg = <0x15000 0x0 0x0 0x0 0x0>;
0196 };
0197
0198 serial@b,0 {
0199 compatible = "pci8086,2e66.2",
0200 "pci8086,2e66",
0201 "pciclass070003",
0202 "pciclass0700";
0203
0204 reg = <0x15800 0x0 0x0 0x0 0x0>;
0205 interrupts = <14 1>;
0206 };
0207
0208 pcigpio: gpio@b,1 {
0209 #gpio-cells = <2>;
0210 #interrupt-cells = <2>;
0211 compatible = "pci8086,2e67.2",
0212 "pci8086,2e67",
0213 "pciclassff0000",
0214 "pciclassff00";
0215
0216 reg = <0x15900 0x0 0x0 0x0 0x0>;
0217 interrupts = <15 1>;
0218 interrupt-controller;
0219 gpio-controller;
0220 intel,muxctl = <0>;
0221 };
0222
0223 i2c-controller@b,2 {
0224 #address-cells = <2>;
0225 #size-cells = <1>;
0226 compatible = "pci8086,2e68.2",
0227 "pci8086,2e68",
0228 "pciclass,ff0000",
0229 "pciclass,ff00";
0230
0231 reg = <0x15a00 0x0 0x0 0x0 0x0>;
0232 interrupts = <16 1>;
0233 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
0234 1 0 0x02000000 0 0xdffe0600 0x100
0235 2 0 0x02000000 0 0xdffe0700 0x100>;
0236
0237 i2c@0 {
0238 #address-cells = <1>;
0239 #size-cells = <0>;
0240 compatible = "intel,ce4100-i2c-controller";
0241 reg = <0 0 0x100>;
0242 };
0243
0244 i2c@1 {
0245 #address-cells = <1>;
0246 #size-cells = <0>;
0247 compatible = "intel,ce4100-i2c-controller";
0248 reg = <1 0 0x100>;
0249
0250 gpio@26 {
0251 #gpio-cells = <2>;
0252 compatible = "nxp,pcf8575";
0253 reg = <0x26>;
0254 gpio-controller;
0255 };
0256 };
0257
0258 i2c@2 {
0259 #address-cells = <1>;
0260 #size-cells = <0>;
0261 compatible = "intel,ce4100-i2c-controller";
0262 reg = <2 0 0x100>;
0263
0264 gpio@26 {
0265 #gpio-cells = <2>;
0266 compatible = "nxp,pcf8575";
0267 reg = <0x26>;
0268 gpio-controller;
0269 };
0270 };
0271 };
0272
0273 smard-card@b,3 {
0274 compatible = "pci8086,2e69.2",
0275 "pci8086,2e69",
0276 "pciclass070500",
0277 "pciclass0705";
0278
0279 reg = <0x15b00 0x0 0x0 0x0 0x0>;
0280 interrupts = <15 1>;
0281 };
0282
0283 spi-controller@b,4 {
0284 #address-cells = <1>;
0285 #size-cells = <0>;
0286 compatible =
0287 "pci8086,2e6a.2",
0288 "pci8086,2e6a",
0289 "pciclass,ff0000",
0290 "pciclass,ff00";
0291
0292 reg = <0x15c00 0x0 0x0 0x0 0x0>;
0293 interrupts = <15 1>;
0294
0295 dac@0 {
0296 compatible = "ti,pcm1755";
0297 reg = <0>;
0298 spi-max-frequency = <115200>;
0299 };
0300
0301 dac@1 {
0302 compatible = "ti,pcm1609a";
0303 reg = <1>;
0304 spi-max-frequency = <115200>;
0305 };
0306
0307 eeprom@2 {
0308 compatible = "atmel,at93c46";
0309 reg = <2>;
0310 spi-max-frequency = <115200>;
0311 };
0312 };
0313
0314 multimedia@b,7 {
0315 compatible = "pci8086,2e6d.2",
0316 "pci8086,2e6d",
0317 "pciclassff0000",
0318 "pciclassff00";
0319
0320 reg = <0x15f00 0x0 0x0 0x0 0x0>;
0321 };
0322
0323 ethernet@c,0 {
0324 compatible = "pci8086,2e6e.2",
0325 "pci8086,2e6e",
0326 "pciclass020000",
0327 "pciclass0200";
0328
0329 reg = <0x16000 0x0 0x0 0x0 0x0>;
0330 interrupts = <21 1>;
0331 };
0332
0333 clock@c,1 {
0334 compatible = "pci8086,2e6f.2",
0335 "pci8086,2e6f",
0336 "pciclassff0000",
0337 "pciclassff00";
0338
0339 reg = <0x16100 0x0 0x0 0x0 0x0>;
0340 interrupts = <3 1>;
0341 };
0342
0343 usb@d,0 {
0344 compatible = "pci8086,2e70.2",
0345 "pci8086,2e70",
0346 "pciclass0c0320",
0347 "pciclass0c03";
0348
0349 reg = <0x16800 0x0 0x0 0x0 0x0>;
0350 interrupts = <22 1>;
0351 };
0352
0353 usb@d,1 {
0354 compatible = "pci8086,2e70.2",
0355 "pci8086,2e70",
0356 "pciclass0c0320",
0357 "pciclass0c03";
0358
0359 reg = <0x16900 0x0 0x0 0x0 0x0>;
0360 interrupts = <22 1>;
0361 };
0362
0363 sata@e,0 {
0364 compatible = "pci8086,2e71.0",
0365 "pci8086,2e71",
0366 "pciclass010601",
0367 "pciclass0106";
0368
0369 reg = <0x17000 0x0 0x0 0x0 0x0>;
0370 interrupts = <23 1>;
0371 };
0372
0373 flash@f,0 {
0374 compatible = "pci8086,701.1",
0375 "pci8086,701",
0376 "pciclass050100",
0377 "pciclass0501";
0378
0379 reg = <0x17800 0x0 0x0 0x0 0x0>;
0380 interrupts = <13 1>;
0381 };
0382
0383 entertainment-encryption@10,0 {
0384 compatible = "pci8086,702.1",
0385 "pci8086,702",
0386 "pciclass101000",
0387 "pciclass1010";
0388
0389 reg = <0x18000 0x0 0x0 0x0 0x0>;
0390 };
0391
0392 co-processor@11,0 {
0393 compatible = "pci8086,703.1",
0394 "pci8086,703",
0395 "pciclass0b4000",
0396 "pciclass0b40";
0397
0398 reg = <0x18800 0x0 0x0 0x0 0x0>;
0399 interrupts = <1 1>;
0400 };
0401
0402 multimedia@12,0 {
0403 compatible = "pci8086,704.0",
0404 "pci8086,704",
0405 "pciclass048000",
0406 "pciclass0480";
0407
0408 reg = <0x19000 0x0 0x0 0x0 0x0>;
0409 };
0410 };
0411
0412 isa@1f,0 {
0413 #address-cells = <2>;
0414 #size-cells = <1>;
0415 compatible = "isa";
0416 reg = <0xf800 0x0 0x0 0x0 0x0>;
0417 ranges = <1 0 0 0 0 0x100>;
0418
0419 rtc@70 {
0420 compatible = "intel,ce4100-rtc", "motorola,mc146818";
0421 interrupts = <8 3>;
0422 interrupt-parent = <&ioapic1>;
0423 ctrl-reg = <2>;
0424 freq-reg = <0x26>;
0425 reg = <1 0x70 2>;
0426 };
0427 };
0428 };
0429 };
0430 };