x86/math-emu/status_w.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*---------------------------------------------------------------------------+
0003  |  status_w.h                                                               |
0004  |                                                                           |
0005  | Copyright (C) 1992,1993                                                   |
0006  |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
0007  |                       Australia.  E-mail   billm@vaxc.cc.monash.edu.au    |
0008  |                                                                           |
0009  +---------------------------------------------------------------------------*/
0010
0011 #ifndef _STATUS_H_
0012 #define _STATUS_H_
0013
0014 #include "fpu_emu.h"        /* for definition of PECULIAR_486 */
0015
0016 #ifdef __ASSEMBLY__
0017 #define Const__(x)  $##x
0018 #else
0019 #define Const__(x)  x
0020 #endif
0021
0022 #define SW_Backward     Const__(0x8000) /* backward compatibility */
0023 #define SW_C3       Const__(0x4000) /* condition bit 3 */
0024 #define SW_Top      Const__(0x3800) /* top of stack */
0025 #define SW_Top_Shift    Const__(11) /* shift for top of stack bits */
0026 #define SW_C2       Const__(0x0400) /* condition bit 2 */
0027 #define SW_C1       Const__(0x0200) /* condition bit 1 */
0028 #define SW_C0       Const__(0x0100) /* condition bit 0 */
0029 #define SW_Summary      Const__(0x0080) /* exception summary */
0030 #define SW_Stack_Fault  Const__(0x0040) /* stack fault */
0031 #define SW_Precision    Const__(0x0020) /* loss of precision */
0032 #define SW_Underflow    Const__(0x0010) /* underflow */
0033 #define SW_Overflow     Const__(0x0008) /* overflow */
0034 #define SW_Zero_Div     Const__(0x0004) /* divide by zero */
0035 #define SW_Denorm_Op    Const__(0x0002) /* denormalized operand */
0036 #define SW_Invalid      Const__(0x0001) /* invalid operation */
0037
0038 #define SW_Exc_Mask     Const__(0x27f)  /* Status word exception bit mask */
0039
0040 #ifndef __ASSEMBLY__
0041
0042 #define COMP_A_gt_B 1
0043 #define COMP_A_eq_B 2
0044 #define COMP_A_lt_B 3
0045 #define COMP_No_Comp    4
0046 #define COMP_Denormal   0x20
0047 #define COMP_NaN    0x40
0048 #define COMP_SNaN   0x80
0049
0050 #define status_word() \
0051   ((partial_status & ~SW_Top & 0xffff) | ((top << SW_Top_Shift) & SW_Top))
0052 static inline void setcc(int cc)
0053 {
0054     partial_status &= ~(SW_C0 | SW_C1 | SW_C2 | SW_C3);
0055     partial_status |= (cc) & (SW_C0 | SW_C1 | SW_C2 | SW_C3);
0056 }
0057
0058 #ifdef PECULIAR_486
0059    /* Default, this conveys no information, but an 80486 does it. */
0060    /* Clear the SW_C1 bit, "other bits undefined". */
0061 #  define clear_C1()  { partial_status &= ~SW_C1; }
0062 # else
0063 #  define clear_C1()
0064 #endif /* PECULIAR_486 */
0065
0066 #endif /* __ASSEMBLY__ */
0067
0068 #endif /* _STATUS_H_ */