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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef ARCH_X86_KVM_X86_H
0003 #define ARCH_X86_KVM_X86_H
0004 
0005 #include <linux/kvm_host.h>
0006 #include <asm/mce.h>
0007 #include <asm/pvclock.h>
0008 #include "kvm_cache_regs.h"
0009 #include "kvm_emulate.h"
0010 
0011 struct kvm_caps {
0012     /* control of guest tsc rate supported? */
0013     bool has_tsc_control;
0014     /* maximum supported tsc_khz for guests */
0015     u32  max_guest_tsc_khz;
0016     /* number of bits of the fractional part of the TSC scaling ratio */
0017     u8   tsc_scaling_ratio_frac_bits;
0018     /* maximum allowed value of TSC scaling ratio */
0019     u64  max_tsc_scaling_ratio;
0020     /* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */
0021     u64  default_tsc_scaling_ratio;
0022     /* bus lock detection supported? */
0023     bool has_bus_lock_exit;
0024     /* notify VM exit supported? */
0025     bool has_notify_vmexit;
0026 
0027     u64 supported_mce_cap;
0028     u64 supported_xcr0;
0029     u64 supported_xss;
0030 };
0031 
0032 void kvm_spurious_fault(void);
0033 
0034 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check)     \
0035 ({                                  \
0036     bool failed = (consistency_check);              \
0037     if (failed)                         \
0038         trace_kvm_nested_vmenter_failed(#consistency_check, 0); \
0039     failed;                             \
0040 })
0041 
0042 #define KVM_DEFAULT_PLE_GAP     128
0043 #define KVM_VMX_DEFAULT_PLE_WINDOW  4096
0044 #define KVM_DEFAULT_PLE_WINDOW_GROW 2
0045 #define KVM_DEFAULT_PLE_WINDOW_SHRINK   0
0046 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX  UINT_MAX
0047 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX  USHRT_MAX
0048 #define KVM_SVM_DEFAULT_PLE_WINDOW  3000
0049 
0050 static inline unsigned int __grow_ple_window(unsigned int val,
0051         unsigned int base, unsigned int modifier, unsigned int max)
0052 {
0053     u64 ret = val;
0054 
0055     if (modifier < 1)
0056         return base;
0057 
0058     if (modifier < base)
0059         ret *= modifier;
0060     else
0061         ret += modifier;
0062 
0063     return min(ret, (u64)max);
0064 }
0065 
0066 static inline unsigned int __shrink_ple_window(unsigned int val,
0067         unsigned int base, unsigned int modifier, unsigned int min)
0068 {
0069     if (modifier < 1)
0070         return base;
0071 
0072     if (modifier < base)
0073         val /= modifier;
0074     else
0075         val -= modifier;
0076 
0077     return max(val, min);
0078 }
0079 
0080 #define MSR_IA32_CR_PAT_DEFAULT  0x0007040600070406ULL
0081 
0082 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu);
0083 int kvm_check_nested_events(struct kvm_vcpu *vcpu);
0084 
0085 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
0086 {
0087     vcpu->arch.exception.pending = false;
0088     vcpu->arch.exception.injected = false;
0089 }
0090 
0091 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
0092     bool soft)
0093 {
0094     vcpu->arch.interrupt.injected = true;
0095     vcpu->arch.interrupt.soft = soft;
0096     vcpu->arch.interrupt.nr = vector;
0097 }
0098 
0099 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
0100 {
0101     vcpu->arch.interrupt.injected = false;
0102 }
0103 
0104 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
0105 {
0106     return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
0107         vcpu->arch.nmi_injected;
0108 }
0109 
0110 static inline bool kvm_exception_is_soft(unsigned int nr)
0111 {
0112     return (nr == BP_VECTOR) || (nr == OF_VECTOR);
0113 }
0114 
0115 static inline bool is_protmode(struct kvm_vcpu *vcpu)
0116 {
0117     return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
0118 }
0119 
0120 static inline int is_long_mode(struct kvm_vcpu *vcpu)
0121 {
0122 #ifdef CONFIG_X86_64
0123     return vcpu->arch.efer & EFER_LMA;
0124 #else
0125     return 0;
0126 #endif
0127 }
0128 
0129 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
0130 {
0131     int cs_db, cs_l;
0132 
0133     WARN_ON_ONCE(vcpu->arch.guest_state_protected);
0134 
0135     if (!is_long_mode(vcpu))
0136         return false;
0137     static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
0138     return cs_l;
0139 }
0140 
0141 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu)
0142 {
0143     /*
0144      * If running with protected guest state, the CS register is not
0145      * accessible. The hypercall register values will have had to been
0146      * provided in 64-bit mode, so assume the guest is in 64-bit.
0147      */
0148     return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu);
0149 }
0150 
0151 static inline bool x86_exception_has_error_code(unsigned int vector)
0152 {
0153     static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
0154             BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
0155             BIT(PF_VECTOR) | BIT(AC_VECTOR);
0156 
0157     return (1U << vector) & exception_has_error_code;
0158 }
0159 
0160 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
0161 {
0162     return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
0163 }
0164 
0165 static inline int is_pae(struct kvm_vcpu *vcpu)
0166 {
0167     return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
0168 }
0169 
0170 static inline int is_pse(struct kvm_vcpu *vcpu)
0171 {
0172     return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
0173 }
0174 
0175 static inline int is_paging(struct kvm_vcpu *vcpu)
0176 {
0177     return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
0178 }
0179 
0180 static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
0181 {
0182     return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
0183 }
0184 
0185 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
0186 {
0187     return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
0188 }
0189 
0190 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
0191 {
0192     return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu));
0193 }
0194 
0195 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
0196                     gva_t gva, gfn_t gfn, unsigned access)
0197 {
0198     u64 gen = kvm_memslots(vcpu->kvm)->generation;
0199 
0200     if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
0201         return;
0202 
0203     /*
0204      * If this is a shadow nested page table, the "GVA" is
0205      * actually a nGPA.
0206      */
0207     vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
0208     vcpu->arch.mmio_access = access;
0209     vcpu->arch.mmio_gfn = gfn;
0210     vcpu->arch.mmio_gen = gen;
0211 }
0212 
0213 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
0214 {
0215     return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
0216 }
0217 
0218 /*
0219  * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
0220  * clear all mmio cache info.
0221  */
0222 #define MMIO_GVA_ANY (~(gva_t)0)
0223 
0224 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
0225 {
0226     if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
0227         return;
0228 
0229     vcpu->arch.mmio_gva = 0;
0230 }
0231 
0232 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
0233 {
0234     if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
0235           vcpu->arch.mmio_gva == (gva & PAGE_MASK))
0236         return true;
0237 
0238     return false;
0239 }
0240 
0241 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
0242 {
0243     if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
0244           vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
0245         return true;
0246 
0247     return false;
0248 }
0249 
0250 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
0251 {
0252     unsigned long val = kvm_register_read_raw(vcpu, reg);
0253 
0254     return is_64_bit_mode(vcpu) ? val : (u32)val;
0255 }
0256 
0257 static inline void kvm_register_write(struct kvm_vcpu *vcpu,
0258                        int reg, unsigned long val)
0259 {
0260     if (!is_64_bit_mode(vcpu))
0261         val = (u32)val;
0262     return kvm_register_write_raw(vcpu, reg, val);
0263 }
0264 
0265 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
0266 {
0267     return !(kvm->arch.disabled_quirks & quirk);
0268 }
0269 
0270 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu)
0271 {
0272     return is_smm(vcpu) || static_call(kvm_x86_apic_init_signal_blocked)(vcpu);
0273 }
0274 
0275 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
0276 
0277 u64 get_kvmclock_ns(struct kvm *kvm);
0278 
0279 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
0280     gva_t addr, void *val, unsigned int bytes,
0281     struct x86_exception *exception);
0282 
0283 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
0284     gva_t addr, void *val, unsigned int bytes,
0285     struct x86_exception *exception);
0286 
0287 int handle_ud(struct kvm_vcpu *vcpu);
0288 
0289 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
0290 
0291 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
0292 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
0293 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
0294 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
0295 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
0296 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
0297                       int page_num);
0298 bool kvm_vector_hashing_enabled(void);
0299 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
0300 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
0301                     void *insn, int insn_len);
0302 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
0303                 int emulation_type, void *insn, int insn_len);
0304 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
0305 
0306 extern u64 host_xcr0;
0307 extern u64 host_xss;
0308 
0309 extern struct kvm_caps kvm_caps;
0310 
0311 extern bool enable_pmu;
0312 
0313 static inline bool kvm_mpx_supported(void)
0314 {
0315     return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
0316         == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
0317 }
0318 
0319 extern unsigned int min_timer_period_us;
0320 
0321 extern bool enable_vmware_backdoor;
0322 
0323 extern int pi_inject_timer;
0324 
0325 extern bool report_ignored_msrs;
0326 
0327 extern bool eager_page_split;
0328 
0329 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
0330 {
0331     return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
0332                    vcpu->arch.virtual_tsc_shift);
0333 }
0334 
0335 /* Same "calling convention" as do_div:
0336  * - divide (n << 32) by base
0337  * - put result in n
0338  * - return remainder
0339  */
0340 #define do_shl32_div32(n, base)                 \
0341     ({                          \
0342         u32 __quot, __rem;                  \
0343         asm("divl %2" : "=a" (__quot), "=d" (__rem)     \
0344             : "rm" (base), "0" (0), "1" ((u32) n)); \
0345         n = __quot;                     \
0346         __rem;                      \
0347      })
0348 
0349 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
0350 {
0351     return kvm->arch.mwait_in_guest;
0352 }
0353 
0354 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
0355 {
0356     return kvm->arch.hlt_in_guest;
0357 }
0358 
0359 static inline bool kvm_pause_in_guest(struct kvm *kvm)
0360 {
0361     return kvm->arch.pause_in_guest;
0362 }
0363 
0364 static inline bool kvm_cstate_in_guest(struct kvm *kvm)
0365 {
0366     return kvm->arch.cstate_in_guest;
0367 }
0368 
0369 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm)
0370 {
0371     return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED;
0372 }
0373 
0374 enum kvm_intr_type {
0375     /* Values are arbitrary, but must be non-zero. */
0376     KVM_HANDLING_IRQ = 1,
0377     KVM_HANDLING_NMI,
0378 };
0379 
0380 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu,
0381                     enum kvm_intr_type intr)
0382 {
0383     WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr);
0384 }
0385 
0386 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
0387 {
0388     WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0);
0389 }
0390 
0391 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu)
0392 {
0393     return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI;
0394 }
0395 
0396 static inline bool kvm_pat_valid(u64 data)
0397 {
0398     if (data & 0xF8F8F8F8F8F8F8F8ull)
0399         return false;
0400     /* 0, 1, 4, 5, 6, 7 are valid values.  */
0401     return (data | ((data & 0x0202020202020202ull) << 1)) == data;
0402 }
0403 
0404 static inline bool kvm_dr7_valid(u64 data)
0405 {
0406     /* Bits [63:32] are reserved */
0407     return !(data >> 32);
0408 }
0409 static inline bool kvm_dr6_valid(u64 data)
0410 {
0411     /* Bits [63:32] are reserved */
0412     return !(data >> 32);
0413 }
0414 
0415 /*
0416  * Trigger machine check on the host. We assume all the MSRs are already set up
0417  * by the CPU and that we still run on the same CPU as the MCE occurred on.
0418  * We pass a fake environment to the machine check handler because we want
0419  * the guest to be always treated like user space, no matter what context
0420  * it used internally.
0421  */
0422 static inline void kvm_machine_check(void)
0423 {
0424 #if defined(CONFIG_X86_MCE)
0425     struct pt_regs regs = {
0426         .cs = 3, /* Fake ring 3 no matter what the guest ran on */
0427         .flags = X86_EFLAGS_IF,
0428     };
0429 
0430     do_machine_check(&regs);
0431 #endif
0432 }
0433 
0434 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
0435 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
0436 int kvm_spec_ctrl_test_value(u64 value);
0437 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
0438 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
0439                   struct x86_exception *e);
0440 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva);
0441 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
0442 
0443 /*
0444  * Internal error codes that are used to indicate that MSR emulation encountered
0445  * an error that should result in #GP in the guest, unless userspace
0446  * handles it.
0447  */
0448 #define  KVM_MSR_RET_INVALID    2   /* in-kernel MSR emulation #GP condition */
0449 #define  KVM_MSR_RET_FILTERED   3   /* #GP due to userspace MSR filter */
0450 
0451 #define __cr4_reserved_bits(__cpu_has, __c)             \
0452 ({                                                      \
0453     u64 __reserved_bits = CR4_RESERVED_BITS;        \
0454                                                         \
0455     if (!__cpu_has(__c, X86_FEATURE_XSAVE))         \
0456         __reserved_bits |= X86_CR4_OSXSAVE;     \
0457     if (!__cpu_has(__c, X86_FEATURE_SMEP))          \
0458         __reserved_bits |= X86_CR4_SMEP;        \
0459     if (!__cpu_has(__c, X86_FEATURE_SMAP))          \
0460         __reserved_bits |= X86_CR4_SMAP;        \
0461     if (!__cpu_has(__c, X86_FEATURE_FSGSBASE))      \
0462         __reserved_bits |= X86_CR4_FSGSBASE;    \
0463     if (!__cpu_has(__c, X86_FEATURE_PKU))           \
0464         __reserved_bits |= X86_CR4_PKE;         \
0465     if (!__cpu_has(__c, X86_FEATURE_LA57))          \
0466         __reserved_bits |= X86_CR4_LA57;        \
0467     if (!__cpu_has(__c, X86_FEATURE_UMIP))          \
0468         __reserved_bits |= X86_CR4_UMIP;        \
0469     if (!__cpu_has(__c, X86_FEATURE_VMX))           \
0470         __reserved_bits |= X86_CR4_VMXE;        \
0471     if (!__cpu_has(__c, X86_FEATURE_PCID))          \
0472         __reserved_bits |= X86_CR4_PCIDE;       \
0473     __reserved_bits;                                \
0474 })
0475 
0476 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
0477               void *dst);
0478 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
0479              void *dst);
0480 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
0481              unsigned int port, void *data,  unsigned int count,
0482              int in);
0483 
0484 #endif
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