x86/kvm/ioapic.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __KVM_IO_APIC_H
0003 #define __KVM_IO_APIC_H
0004
0005 #include <linux/kvm_host.h>
0006 #include <kvm/iodev.h>
0007 #include "irq.h"
0008
0009 struct kvm;
0010 struct kvm_vcpu;
0011
0012 #define IOAPIC_NUM_PINS  KVM_IOAPIC_NUM_PINS
0013 #define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES
0014 #define IOAPIC_VERSION_ID 0x11  /* IOAPIC version */
0015 #define IOAPIC_EDGE_TRIG  0
0016 #define IOAPIC_LEVEL_TRIG 1
0017
0018 #define IOAPIC_DEFAULT_BASE_ADDRESS  0xfec00000
0019 #define IOAPIC_MEM_LENGTH            0x100
0020
0021 /* Direct registers. */
0022 #define IOAPIC_REG_SELECT  0x00
0023 #define IOAPIC_REG_WINDOW  0x10
0024
0025 /* Indirect registers. */
0026 #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
0027 #define IOAPIC_REG_VERSION 0x01
0028 #define IOAPIC_REG_ARB_ID  0x02 /* x86 IOAPIC only */
0029
0030 /*ioapic delivery mode*/
0031 #define IOAPIC_FIXED            0x0
0032 #define IOAPIC_LOWEST_PRIORITY      0x1
0033 #define IOAPIC_PMI          0x2
0034 #define IOAPIC_NMI          0x4
0035 #define IOAPIC_INIT         0x5
0036 #define IOAPIC_EXTINT           0x7
0037
0038 #define RTC_GSI 8
0039
0040 struct dest_map {
0041     /* vcpu bitmap where IRQ has been sent */
0042     DECLARE_BITMAP(map, KVM_MAX_VCPU_IDS);
0043
0044     /*
0045      * Vector sent to a given vcpu, only valid when
0046      * the vcpu's bit in map is set
0047      */
0048     u8 vectors[KVM_MAX_VCPU_IDS];
0049 };
0050
0051
0052 struct rtc_status {
0053     int pending_eoi;
0054     struct dest_map dest_map;
0055 };
0056
0057 union kvm_ioapic_redirect_entry {
0058     u64 bits;
0059     struct {
0060         u8 vector;
0061         u8 delivery_mode:3;
0062         u8 dest_mode:1;
0063         u8 delivery_status:1;
0064         u8 polarity:1;
0065         u8 remote_irr:1;
0066         u8 trig_mode:1;
0067         u8 mask:1;
0068         u8 reserve:7;
0069         u8 reserved[4];
0070         u8 dest_id;
0071     } fields;
0072 };
0073
0074 struct kvm_ioapic {
0075     u64 base_address;
0076     u32 ioregsel;
0077     u32 id;
0078     u32 irr;
0079     u32 pad;
0080     union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
0081     unsigned long irq_states[IOAPIC_NUM_PINS];
0082     struct kvm_io_device dev;
0083     struct kvm *kvm;
0084     spinlock_t lock;
0085     struct rtc_status rtc_status;
0086     struct delayed_work eoi_inject;
0087     u32 irq_eoi[IOAPIC_NUM_PINS];
0088     u32 irr_delivered;
0089 };
0090
0091 #ifdef DEBUG
0092 #define ASSERT(x)                           \
0093 do {                                    \
0094     if (!(x)) {                         \
0095         printk(KERN_EMERG "assertion failed %s: %d: %s\n",  \
0096                __FILE__, __LINE__, #x);             \
0097         BUG();                          \
0098     }                               \
0099 } while (0)
0100 #else
0101 #define ASSERT(x) do { } while (0)
0102 #endif
0103
0104 static inline int ioapic_in_kernel(struct kvm *kvm)
0105 {
0106     return irqchip_kernel(kvm);
0107 }
0108
0109 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
0110 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
0111             int trigger_mode);
0112 int kvm_ioapic_init(struct kvm *kvm);
0113 void kvm_ioapic_destroy(struct kvm *kvm);
0114 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
0115                int level, bool line_status);
0116 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
0117 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
0118 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
0119 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
0120                ulong *ioapic_handled_vectors);
0121 void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
0122                 ulong *ioapic_handled_vectors);
0123 #endif