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0012 #include <linux/init.h>
0013 #include <linux/pci_ids.h>
0014 #include <linux/pci_regs.h>
0015 #include <linux/smp.h>
0016 #include <linux/irq.h>
0017
0018 #include <asm/apic.h>
0019 #include <asm/pci-direct.h>
0020 #include <asm/io.h>
0021 #include <asm/paravirt.h>
0022 #include <asm/setup.h>
0023
0024 #define TOPOLOGY_REGISTER_OFFSET 0x10
0025
0026 #ifdef CONFIG_PCI
0027 static void __init set_vsmp_ctl(void)
0028 {
0029 void __iomem *address;
0030 unsigned int cap, ctl, cfg;
0031
0032
0033 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
0034 address = early_ioremap(cfg, 8);
0035 cap = readl(address);
0036 ctl = readl(address + 4);
0037 printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
0038 cap, ctl);
0039
0040
0041 #ifdef CONFIG_SMP
0042 if (cap & ctl & BIT(8)) {
0043 ctl &= ~BIT(8);
0044
0045 #ifdef CONFIG_PROC_FS
0046
0047 no_irq_affinity = 1;
0048 #endif
0049 }
0050 #endif
0051
0052 writel(ctl, address + 4);
0053 ctl = readl(address + 4);
0054 pr_info("vSMP CTL: control set to:0x%08x\n", ctl);
0055
0056 early_iounmap(address, 8);
0057 }
0058 static int is_vsmp = -1;
0059
0060 static void __init detect_vsmp_box(void)
0061 {
0062 is_vsmp = 0;
0063
0064 if (!early_pci_allowed())
0065 return;
0066
0067
0068 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
0069 (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
0070 is_vsmp = 1;
0071 }
0072
0073 static int is_vsmp_box(void)
0074 {
0075 if (is_vsmp != -1)
0076 return is_vsmp;
0077 else {
0078 WARN_ON_ONCE(1);
0079 return 0;
0080 }
0081 }
0082
0083 #else
0084 static void __init detect_vsmp_box(void)
0085 {
0086 }
0087 static int is_vsmp_box(void)
0088 {
0089 return 0;
0090 }
0091 static void __init set_vsmp_ctl(void)
0092 {
0093 }
0094 #endif
0095
0096 static void __init vsmp_cap_cpus(void)
0097 {
0098 #if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
0099 void __iomem *address;
0100 unsigned int cfg, topology, node_shift, maxcpus;
0101
0102
0103
0104
0105
0106
0107 if (setup_max_cpus != NR_CPUS)
0108 return;
0109
0110
0111 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
0112 address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);
0113 if (WARN_ON(!address))
0114 return;
0115
0116 topology = readl(address);
0117 node_shift = (topology >> 16) & 0x7;
0118 if (!node_shift)
0119
0120 node_shift = 8;
0121 maxcpus = (topology & ((1 << node_shift) - 1)) + 1;
0122
0123 pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
0124 maxcpus);
0125 setup_max_cpus = maxcpus;
0126 early_iounmap(address, 4);
0127 #endif
0128 }
0129
0130 static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
0131 {
0132 return hard_smp_processor_id() >> index_msb;
0133 }
0134
0135 static void vsmp_apic_post_init(void)
0136 {
0137
0138 apic->phys_pkg_id = apicid_phys_pkg_id;
0139 }
0140
0141 void __init vsmp_init(void)
0142 {
0143 detect_vsmp_box();
0144 if (!is_vsmp_box())
0145 return;
0146
0147 x86_platform.apic_post_init = vsmp_apic_post_init;
0148
0149 vsmp_cap_cpus();
0150
0151 set_vsmp_ctl();
0152 return;
0153 }