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0001 /* 0002 * umip.c Emulation for instruction protected by the User-Mode Instruction 0003 * Prevention feature 0004 * 0005 * Copyright (c) 2017, Intel Corporation. 0006 * Ricardo Neri <ricardo.neri-calderon@linux.intel.com> 0007 */ 0008 0009 #include <linux/uaccess.h> 0010 #include <asm/umip.h> 0011 #include <asm/traps.h> 0012 #include <asm/insn.h> 0013 #include <asm/insn-eval.h> 0014 #include <linux/ratelimit.h> 0015 0016 #undef pr_fmt 0017 #define pr_fmt(fmt) "umip: " fmt 0018 0019 /** DOC: Emulation for User-Mode Instruction Prevention (UMIP) 0020 * 0021 * User-Mode Instruction Prevention is a security feature present in recent 0022 * x86 processors that, when enabled, prevents a group of instructions (SGDT, 0023 * SIDT, SLDT, SMSW and STR) from being run in user mode by issuing a general 0024 * protection fault if the instruction is executed with CPL > 0. 0025 * 0026 * Rather than relaying to the user space the general protection fault caused by 0027 * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be 0028 * trapped and emulate the result of such instructions to provide dummy values. 0029 * This allows to both conserve the current kernel behavior and not reveal the 0030 * system resources that UMIP intends to protect (i.e., the locations of the 0031 * global descriptor and interrupt descriptor tables, the segment selectors of 0032 * the local descriptor table, the value of the task state register and the 0033 * contents of the CR0 register). 0034 * 0035 * This emulation is needed because certain applications (e.g., WineHQ and 0036 * DOSEMU2) rely on this subset of instructions to function. 0037 * 0038 * The instructions protected by UMIP can be split in two groups. Those which 0039 * return a kernel memory address (SGDT and SIDT) and those which return a 0040 * value (SLDT, STR and SMSW). 0041 * 0042 * For the instructions that return a kernel memory address, applications 0043 * such as WineHQ rely on the result being located in the kernel memory space, 0044 * not the actual location of the table. The result is emulated as a hard-coded 0045 * value that, lies close to the top of the kernel memory. The limit for the GDT 0046 * and the IDT are set to zero. 0047 * 0048 * The instruction SMSW is emulated to return the value that the register CR0 0049 * has at boot time as set in the head_32. 0050 * SLDT and STR are emulated to return the values that the kernel programmatically 0051 * assigns: 0052 * - SLDT returns (GDT_ENTRY_LDT * 8) if an LDT has been set, 0 if not. 0053 * - STR returns (GDT_ENTRY_TSS * 8). 0054 * 0055 * Emulation is provided for both 32-bit and 64-bit processes. 0056 * 0057 * Care is taken to appropriately emulate the results when segmentation is 0058 * used. That is, rather than relying on USER_DS and USER_CS, the function 0059 * insn_get_addr_ref() inspects the segment descriptor pointed by the 0060 * registers in pt_regs. This ensures that we correctly obtain the segment 0061 * base address and the address and operand sizes even if the user space 0062 * application uses a local descriptor table. 0063 */ 0064 0065 #define UMIP_DUMMY_GDT_BASE 0xfffffffffffe0000ULL 0066 #define UMIP_DUMMY_IDT_BASE 0xffffffffffff0000ULL 0067 0068 /* 0069 * The SGDT and SIDT instructions store the contents of the global descriptor 0070 * table and interrupt table registers, respectively. The destination is a 0071 * memory operand of X+2 bytes. X bytes are used to store the base address of 0072 * the table and 2 bytes are used to store the limit. In 32-bit processes X 0073 * has a value of 4, in 64-bit processes X has a value of 8. 0074 */ 0075 #define UMIP_GDT_IDT_BASE_SIZE_64BIT 8 0076 #define UMIP_GDT_IDT_BASE_SIZE_32BIT 4 0077 #define UMIP_GDT_IDT_LIMIT_SIZE 2 0078 0079 #define UMIP_INST_SGDT 0 /* 0F 01 /0 */ 0080 #define UMIP_INST_SIDT 1 /* 0F 01 /1 */ 0081 #define UMIP_INST_SMSW 2 /* 0F 01 /4 */ 0082 #define UMIP_INST_SLDT 3 /* 0F 00 /0 */ 0083 #define UMIP_INST_STR 4 /* 0F 00 /1 */ 0084 0085 static const char * const umip_insns[5] = { 0086 [UMIP_INST_SGDT] = "SGDT", 0087 [UMIP_INST_SIDT] = "SIDT", 0088 [UMIP_INST_SMSW] = "SMSW", 0089 [UMIP_INST_SLDT] = "SLDT", 0090 [UMIP_INST_STR] = "STR", 0091 }; 0092 0093 #define umip_pr_err(regs, fmt, ...) \ 0094 umip_printk(regs, KERN_ERR, fmt, ##__VA_ARGS__) 0095 #define umip_pr_debug(regs, fmt, ...) \ 0096 umip_printk(regs, KERN_DEBUG, fmt, ##__VA_ARGS__) 0097 0098 /** 0099 * umip_printk() - Print a rate-limited message 0100 * @regs: Register set with the context in which the warning is printed 0101 * @log_level: Kernel log level to print the message 0102 * @fmt: The text string to print 0103 * 0104 * Print the text contained in @fmt. The print rate is limited to bursts of 5 0105 * messages every two minutes. The purpose of this customized version of 0106 * printk() is to print messages when user space processes use any of the 0107 * UMIP-protected instructions. Thus, the printed text is prepended with the 0108 * task name and process ID number of the current task as well as the 0109 * instruction and stack pointers in @regs as seen when entering kernel mode. 0110 * 0111 * Returns: 0112 * 0113 * None. 0114 */ 0115 static __printf(3, 4) 0116 void umip_printk(const struct pt_regs *regs, const char *log_level, 0117 const char *fmt, ...) 0118 { 0119 /* Bursts of 5 messages every two minutes */ 0120 static DEFINE_RATELIMIT_STATE(ratelimit, 2 * 60 * HZ, 5); 0121 struct task_struct *tsk = current; 0122 struct va_format vaf; 0123 va_list args; 0124 0125 if (!__ratelimit(&ratelimit)) 0126 return; 0127 0128 va_start(args, fmt); 0129 vaf.fmt = fmt; 0130 vaf.va = &args; 0131 printk("%s" pr_fmt("%s[%d] ip:%lx sp:%lx: %pV"), log_level, tsk->comm, 0132 task_pid_nr(tsk), regs->ip, regs->sp, &vaf); 0133 va_end(args); 0134 } 0135 0136 /** 0137 * identify_insn() - Identify a UMIP-protected instruction 0138 * @insn: Instruction structure with opcode and ModRM byte. 0139 * 0140 * From the opcode and ModRM.reg in @insn identify, if any, a UMIP-protected 0141 * instruction that can be emulated. 0142 * 0143 * Returns: 0144 * 0145 * On success, a constant identifying a specific UMIP-protected instruction that 0146 * can be emulated. 0147 * 0148 * -EINVAL on error or when not an UMIP-protected instruction that can be 0149 * emulated. 0150 */ 0151 static int identify_insn(struct insn *insn) 0152 { 0153 /* By getting modrm we also get the opcode. */ 0154 insn_get_modrm(insn); 0155 0156 if (!insn->modrm.nbytes) 0157 return -EINVAL; 0158 0159 /* All the instructions of interest start with 0x0f. */ 0160 if (insn->opcode.bytes[0] != 0xf) 0161 return -EINVAL; 0162 0163 if (insn->opcode.bytes[1] == 0x1) { 0164 switch (X86_MODRM_REG(insn->modrm.value)) { 0165 case 0: 0166 return UMIP_INST_SGDT; 0167 case 1: 0168 return UMIP_INST_SIDT; 0169 case 4: 0170 return UMIP_INST_SMSW; 0171 default: 0172 return -EINVAL; 0173 } 0174 } else if (insn->opcode.bytes[1] == 0x0) { 0175 if (X86_MODRM_REG(insn->modrm.value) == 0) 0176 return UMIP_INST_SLDT; 0177 else if (X86_MODRM_REG(insn->modrm.value) == 1) 0178 return UMIP_INST_STR; 0179 else 0180 return -EINVAL; 0181 } else { 0182 return -EINVAL; 0183 } 0184 } 0185 0186 /** 0187 * emulate_umip_insn() - Emulate UMIP instructions and return dummy values 0188 * @insn: Instruction structure with operands 0189 * @umip_inst: A constant indicating the instruction to emulate 0190 * @data: Buffer into which the dummy result is stored 0191 * @data_size: Size of the emulated result 0192 * @x86_64: true if process is 64-bit, false otherwise 0193 * 0194 * Emulate an instruction protected by UMIP and provide a dummy result. The 0195 * result of the emulation is saved in @data. The size of the results depends 0196 * on both the instruction and type of operand (register vs memory address). 0197 * The size of the result is updated in @data_size. Caller is responsible 0198 * of providing a @data buffer of at least UMIP_GDT_IDT_BASE_SIZE + 0199 * UMIP_GDT_IDT_LIMIT_SIZE bytes. 0200 * 0201 * Returns: 0202 * 0203 * 0 on success, -EINVAL on error while emulating. 0204 */ 0205 static int emulate_umip_insn(struct insn *insn, int umip_inst, 0206 unsigned char *data, int *data_size, bool x86_64) 0207 { 0208 if (!data || !data_size || !insn) 0209 return -EINVAL; 0210 /* 0211 * These two instructions return the base address and limit of the 0212 * global and interrupt descriptor table, respectively. According to the 0213 * Intel Software Development manual, the base address can be 24-bit, 0214 * 32-bit or 64-bit. Limit is always 16-bit. If the operand size is 0215 * 16-bit, the returned value of the base address is supposed to be a 0216 * zero-extended 24-byte number. However, it seems that a 32-byte number 0217 * is always returned irrespective of the operand size. 0218 */ 0219 if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) { 0220 u64 dummy_base_addr; 0221 u16 dummy_limit = 0; 0222 0223 /* SGDT and SIDT do not use registers operands. */ 0224 if (X86_MODRM_MOD(insn->modrm.value) == 3) 0225 return -EINVAL; 0226 0227 if (umip_inst == UMIP_INST_SGDT) 0228 dummy_base_addr = UMIP_DUMMY_GDT_BASE; 0229 else 0230 dummy_base_addr = UMIP_DUMMY_IDT_BASE; 0231 0232 /* 0233 * 64-bit processes use the entire dummy base address. 0234 * 32-bit processes use the lower 32 bits of the base address. 0235 * dummy_base_addr is always 64 bits, but we memcpy the correct 0236 * number of bytes from it to the destination. 0237 */ 0238 if (x86_64) 0239 *data_size = UMIP_GDT_IDT_BASE_SIZE_64BIT; 0240 else 0241 *data_size = UMIP_GDT_IDT_BASE_SIZE_32BIT; 0242 0243 memcpy(data + 2, &dummy_base_addr, *data_size); 0244 0245 *data_size += UMIP_GDT_IDT_LIMIT_SIZE; 0246 memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE); 0247 0248 } else if (umip_inst == UMIP_INST_SMSW || umip_inst == UMIP_INST_SLDT || 0249 umip_inst == UMIP_INST_STR) { 0250 unsigned long dummy_value; 0251 0252 if (umip_inst == UMIP_INST_SMSW) { 0253 dummy_value = CR0_STATE; 0254 } else if (umip_inst == UMIP_INST_STR) { 0255 dummy_value = GDT_ENTRY_TSS * 8; 0256 } else if (umip_inst == UMIP_INST_SLDT) { 0257 #ifdef CONFIG_MODIFY_LDT_SYSCALL 0258 down_read(¤t->mm->context.ldt_usr_sem); 0259 if (current->mm->context.ldt) 0260 dummy_value = GDT_ENTRY_LDT * 8; 0261 else 0262 dummy_value = 0; 0263 up_read(¤t->mm->context.ldt_usr_sem); 0264 #else 0265 dummy_value = 0; 0266 #endif 0267 } 0268 0269 /* 0270 * For these 3 instructions, the number 0271 * of bytes to be copied in the result buffer is determined 0272 * by whether the operand is a register or a memory location. 0273 * If operand is a register, return as many bytes as the operand 0274 * size. If operand is memory, return only the two least 0275 * significant bytes. 0276 */ 0277 if (X86_MODRM_MOD(insn->modrm.value) == 3) 0278 *data_size = insn->opnd_bytes; 0279 else 0280 *data_size = 2; 0281 0282 memcpy(data, &dummy_value, *data_size); 0283 } else { 0284 return -EINVAL; 0285 } 0286 0287 return 0; 0288 } 0289 0290 /** 0291 * force_sig_info_umip_fault() - Force a SIGSEGV with SEGV_MAPERR 0292 * @addr: Address that caused the signal 0293 * @regs: Register set containing the instruction pointer 0294 * 0295 * Force a SIGSEGV signal with SEGV_MAPERR as the error code. This function is 0296 * intended to be used to provide a segmentation fault when the result of the 0297 * UMIP emulation could not be copied to the user space memory. 0298 * 0299 * Returns: none 0300 */ 0301 static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs) 0302 { 0303 struct task_struct *tsk = current; 0304 0305 tsk->thread.cr2 = (unsigned long)addr; 0306 tsk->thread.error_code = X86_PF_USER | X86_PF_WRITE; 0307 tsk->thread.trap_nr = X86_TRAP_PF; 0308 0309 force_sig_fault(SIGSEGV, SEGV_MAPERR, addr); 0310 0311 if (!(show_unhandled_signals && unhandled_signal(tsk, SIGSEGV))) 0312 return; 0313 0314 umip_pr_err(regs, "segfault in emulation. error%x\n", 0315 X86_PF_USER | X86_PF_WRITE); 0316 } 0317 0318 /** 0319 * fixup_umip_exception() - Fixup a general protection fault caused by UMIP 0320 * @regs: Registers as saved when entering the #GP handler 0321 * 0322 * The instructions SGDT, SIDT, STR, SMSW and SLDT cause a general protection 0323 * fault if executed with CPL > 0 (i.e., from user space). This function fixes 0324 * the exception up and provides dummy results for SGDT, SIDT and SMSW; STR 0325 * and SLDT are not fixed up. 0326 * 0327 * If operands are memory addresses, results are copied to user-space memory as 0328 * indicated by the instruction pointed by eIP using the registers indicated in 0329 * the instruction operands. If operands are registers, results are copied into 0330 * the context that was saved when entering kernel mode. 0331 * 0332 * Returns: 0333 * 0334 * True if emulation was successful; false if not. 0335 */ 0336 bool fixup_umip_exception(struct pt_regs *regs) 0337 { 0338 int nr_copied, reg_offset, dummy_data_size, umip_inst; 0339 /* 10 bytes is the maximum size of the result of UMIP instructions */ 0340 unsigned char dummy_data[10] = { 0 }; 0341 unsigned char buf[MAX_INSN_SIZE]; 0342 unsigned long *reg_addr; 0343 void __user *uaddr; 0344 struct insn insn; 0345 0346 if (!regs) 0347 return false; 0348 0349 /* 0350 * Give up on emulation if fetching the instruction failed. Should a 0351 * page fault or a #GP be issued? 0352 */ 0353 nr_copied = insn_fetch_from_user(regs, buf); 0354 if (nr_copied <= 0) 0355 return false; 0356 0357 if (!insn_decode_from_regs(&insn, regs, buf, nr_copied)) 0358 return false; 0359 0360 umip_inst = identify_insn(&insn); 0361 if (umip_inst < 0) 0362 return false; 0363 0364 umip_pr_debug(regs, "%s instruction cannot be used by applications.\n", 0365 umip_insns[umip_inst]); 0366 0367 umip_pr_debug(regs, "For now, expensive software emulation returns the result.\n"); 0368 0369 if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size, 0370 user_64bit_mode(regs))) 0371 return false; 0372 0373 /* 0374 * If operand is a register, write result to the copy of the register 0375 * value that was pushed to the stack when entering into kernel mode. 0376 * Upon exit, the value we write will be restored to the actual hardware 0377 * register. 0378 */ 0379 if (X86_MODRM_MOD(insn.modrm.value) == 3) { 0380 reg_offset = insn_get_modrm_rm_off(&insn, regs); 0381 0382 /* 0383 * Negative values are usually errors. In memory addressing, 0384 * the exception is -EDOM. Since we expect a register operand, 0385 * all negative values are errors. 0386 */ 0387 if (reg_offset < 0) 0388 return false; 0389 0390 reg_addr = (unsigned long *)((unsigned long)regs + reg_offset); 0391 memcpy(reg_addr, dummy_data, dummy_data_size); 0392 } else { 0393 uaddr = insn_get_addr_ref(&insn, regs); 0394 if ((unsigned long)uaddr == -1L) 0395 return false; 0396 0397 nr_copied = copy_to_user(uaddr, dummy_data, dummy_data_size); 0398 if (nr_copied > 0) { 0399 /* 0400 * If copy fails, send a signal and tell caller that 0401 * fault was fixed up. 0402 */ 0403 force_sig_info_umip_fault(uaddr, regs); 0404 return true; 0405 } 0406 } 0407 0408 /* increase IP to let the program keep going */ 0409 regs->ip += insn.length; 0410 return true; 0411 }
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