x86/kernel/time.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  *  Copyright (c) 1991,1992,1995  Linus Torvalds
0004  *  Copyright (c) 1994  Alan Modra
0005  *  Copyright (c) 1995  Markus Kuhn
0006  *  Copyright (c) 1996  Ingo Molnar
0007  *  Copyright (c) 1998  Andrea Arcangeli
0008  *  Copyright (c) 2002,2006  Vojtech Pavlik
0009  *  Copyright (c) 2003  Andi Kleen
0010  *
0011  */
0012
0013 #include <linux/clocksource.h>
0014 #include <linux/clockchips.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/irq.h>
0017 #include <linux/i8253.h>
0018 #include <linux/time.h>
0019 #include <linux/export.h>
0020
0021 #include <asm/vsyscall.h>
0022 #include <asm/x86_init.h>
0023 #include <asm/i8259.h>
0024 #include <asm/timer.h>
0025 #include <asm/hpet.h>
0026 #include <asm/time.h>
0027
0028 unsigned long profile_pc(struct pt_regs *regs)
0029 {
0030     unsigned long pc = instruction_pointer(regs);
0031
0032     if (!user_mode(regs) && in_lock_functions(pc)) {
0033 #ifdef CONFIG_FRAME_POINTER
0034         return *(unsigned long *)(regs->bp + sizeof(long));
0035 #else
0036         unsigned long *sp = (unsigned long *)regs->sp;
0037         /*
0038          * Return address is either directly at stack pointer
0039          * or above a saved flags. Eflags has bits 22-31 zero,
0040          * kernel addresses don't.
0041          */
0042         if (sp[0] >> 22)
0043             return sp[0];
0044         if (sp[1] >> 22)
0045             return sp[1];
0046 #endif
0047     }
0048     return pc;
0049 }
0050 EXPORT_SYMBOL(profile_pc);
0051
0052 /*
0053  * Default timer interrupt handler for PIT/HPET
0054  */
0055 static irqreturn_t timer_interrupt(int irq, void *dev_id)
0056 {
0057     global_clock_event->event_handler(global_clock_event);
0058     return IRQ_HANDLED;
0059 }
0060
0061 static void __init setup_default_timer_irq(void)
0062 {
0063     unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER;
0064
0065     /*
0066      * Unconditionally register the legacy timer interrupt; even
0067      * without legacy PIC/PIT we need this for the HPET0 in legacy
0068      * replacement mode.
0069      */
0070     if (request_irq(0, timer_interrupt, flags, "timer", NULL))
0071         pr_info("Failed to register legacy timer interrupt\n");
0072 }
0073
0074 /* Default timer init function */
0075 void __init hpet_time_init(void)
0076 {
0077     if (!hpet_enable()) {
0078         if (!pit_timer_init())
0079             return;
0080     }
0081
0082     setup_default_timer_irq();
0083 }
0084
0085 static __init void x86_late_time_init(void)
0086 {
0087     /*
0088      * Before PIT/HPET init, select the interrupt mode. This is required
0089      * to make the decision whether PIT should be initialized correct.
0090      */
0091     x86_init.irqs.intr_mode_select();
0092
0093     /* Setup the legacy timers */
0094     x86_init.timers.timer_init();
0095
0096     /*
0097      * After PIT/HPET timers init, set up the final interrupt mode for
0098      * delivering IRQs.
0099      */
0100     x86_init.irqs.intr_mode_init();
0101     tsc_init();
0102
0103     if (static_cpu_has(X86_FEATURE_WAITPKG))
0104         use_tpause_delay();
0105 }
0106
0107 /*
0108  * Initialize TSC and delay the periodic timer init to
0109  * late x86_late_time_init() so ioremap works.
0110  */
0111 void __init time_init(void)
0112 {
0113     late_time_init = x86_late_time_init;
0114 }
0115
0116 /*
0117  * Sanity check the vdso related archdata content.
0118  */
0119 void clocksource_arch_init(struct clocksource *cs)
0120 {
0121     if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE)
0122         return;
0123
0124     if (cs->mask != CLOCKSOURCE_MASK(64)) {
0125         pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n",
0126             cs->name, cs->mask);
0127         cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE;
0128     }
0129 }