x86/kernel/head32.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  *  linux/arch/i386/kernel/head32.c -- prepare to run common code
0004  *
0005  *  Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
0006  *  Copyright (C) 2007 Eric Biederman <ebiederm@xmission.com>
0007  */
0008
0009 #include <linux/init.h>
0010 #include <linux/start_kernel.h>
0011 #include <linux/mm.h>
0012 #include <linux/memblock.h>
0013
0014 #include <asm/desc.h>
0015 #include <asm/setup.h>
0016 #include <asm/sections.h>
0017 #include <asm/e820/api.h>
0018 #include <asm/page.h>
0019 #include <asm/apic.h>
0020 #include <asm/io_apic.h>
0021 #include <asm/bios_ebda.h>
0022 #include <asm/tlbflush.h>
0023 #include <asm/bootparam_utils.h>
0024
0025 static void __init i386_default_early_setup(void)
0026 {
0027     /* Initialize 32bit specific setup functions */
0028     x86_init.resources.reserve_resources = i386_reserve_resources;
0029     x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
0030 }
0031
0032 asmlinkage __visible void __init i386_start_kernel(void)
0033 {
0034     /* Make sure IDT is set up before any exception happens */
0035     idt_setup_early_handler();
0036
0037     cr4_init_shadow();
0038
0039     sanitize_boot_params(&boot_params);
0040
0041     x86_early_init_platform_quirks();
0042
0043     /* Call the subarch specific early setup function */
0044     switch (boot_params.hdr.hardware_subarch) {
0045     case X86_SUBARCH_INTEL_MID:
0046         x86_intel_mid_early_setup();
0047         break;
0048     case X86_SUBARCH_CE4100:
0049         x86_ce4100_early_setup();
0050         break;
0051     default:
0052         i386_default_early_setup();
0053         break;
0054     }
0055
0056     start_kernel();
0057 }
0058
0059 /*
0060  * Initialize page tables.  This creates a PDE and a set of page
0061  * tables, which are located immediately beyond __brk_base.  The variable
0062  * _brk_end is set up to point to the first "safe" location.
0063  * Mappings are created both at virtual address 0 (identity mapping)
0064  * and PAGE_OFFSET for up to _end.
0065  *
0066  * In PAE mode initial_page_table is statically defined to contain
0067  * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
0068  * entries). The identity mapping is handled by pointing two PGD entries
0069  * to the first kernel PMD. Note the upper half of each PMD or PTE are
0070  * always zero at this stage.
0071  */
0072 void __init mk_early_pgtbl_32(void)
0073 {
0074 #ifdef __pa
0075 #undef __pa
0076 #endif
0077 #define __pa(x)  ((unsigned long)(x) - PAGE_OFFSET)
0078     pte_t pte, *ptep;
0079     int i;
0080     unsigned long *ptr;
0081     /* Enough space to fit pagetables for the low memory linear map */
0082     const unsigned long limit = __pa(_end) +
0083         (PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT);
0084 #ifdef CONFIG_X86_PAE
0085     pmd_t pl2, *pl2p = (pmd_t *)__pa(initial_pg_pmd);
0086 #define SET_PL2(pl2, val)    { (pl2).pmd = (val); }
0087 #else
0088     pgd_t pl2, *pl2p = (pgd_t *)__pa(initial_page_table);
0089 #define SET_PL2(pl2, val)   { (pl2).pgd = (val); }
0090 #endif
0091
0092     ptep = (pte_t *)__pa(__brk_base);
0093     pte.pte = PTE_IDENT_ATTR;
0094
0095     while ((pte.pte & PTE_PFN_MASK) < limit) {
0096
0097         SET_PL2(pl2, (unsigned long)ptep | PDE_IDENT_ATTR);
0098         *pl2p = pl2;
0099 #ifndef CONFIG_X86_PAE
0100         /* Kernel PDE entry */
0101         *(pl2p +  ((PAGE_OFFSET >> PGDIR_SHIFT))) = pl2;
0102 #endif
0103         for (i = 0; i < PTRS_PER_PTE; i++) {
0104             *ptep = pte;
0105             pte.pte += PAGE_SIZE;
0106             ptep++;
0107         }
0108
0109         pl2p++;
0110     }
0111
0112     ptr = (unsigned long *)__pa(&max_pfn_mapped);
0113     /* Can't use pte_pfn() since it's a call with CONFIG_PARAVIRT */
0114     *ptr = (pte.pte & PTE_PFN_MASK) >> PAGE_SHIFT;
0115
0116     ptr = (unsigned long *)__pa(&_brk_end);
0117     *ptr = (unsigned long)ptep + PAGE_OFFSET;
0118 }
0119